1 # SPDX-License-Identifier: GPL-2.0-or-later
4 # Texas Instruments DaVinci family: OMAPL138
6 if { [info exists CHIPNAME] } {
7 set _CHIPNAME $CHIPNAME
12 source [find target/icepick.cfg]
14 # Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer
15 if { [info exists ETB_TAPID] } {
16 set _ETB_TAPID $ETB_TAPID
18 set _ETB_TAPID 0x2b900f0f
20 jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETB_TAPID -disable
21 jtag configure $_CHIPNAME.etb -event tap-enable \
22 "icepick_c_tapenable $_CHIPNAME.jrc 3"
24 # Subsidiary TAP: ARM926ejs with scan chains for ARM Debug, EmbeddedICE-RT, ETM.
25 if { [info exists CPU_TAPID] } {
26 set _CPU_TAPID $CPU_TAPID
28 set _CPU_TAPID 0x07926001
30 jtag newtap $_CHIPNAME arm -irlen 4 -irmask 0xf -expected-id $_CPU_TAPID -disable
31 jtag configure $_CHIPNAME.arm -event tap-enable \
32 "icepick_c_tapenable $_CHIPNAME.jrc 2"
34 # Primary TAP: ICEpick-C (JTAG route controller) and boundary scan
35 if { [info exists JRC_TAPID] } {
36 set _JRC_TAPID $JRC_TAPID
38 set _JRC_TAPID 0x0b7d102f
40 jtag newtap $_CHIPNAME jrc -irlen 6 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
42 jtag configure $_CHIPNAME.jrc -event setup \
43 "jtag tapenable $_CHIPNAME.etb; jtag tapenable $_CHIPNAME.arm"
46 # GDB target: the ARM, using SRAM1 for scratch. SRAM0 (also 8K)
47 # and the ETB memory (4K) are other options, while trace is unused.
48 # Little-endian; use the OpenOCD default.
49 set _TARGETNAME $_CHIPNAME.arm
51 target create $_TARGETNAME arm926ejs -chain-position $_TARGETNAME
52 $_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 0x2000
54 # be absolutely certain the JTAG clock will work with the worst-case
55 # CLKIN = 20 MHz (best case: 30 MHz) even when no bootloader turns
56 # on the PLL and starts using it. OK to speed up after clock setup.
58 $_TARGETNAME configure -event "reset-start" { adapter speed 1500 }
60 arm7_9 fast_memory_access enable
61 arm7_9 dcc_downloads enable
64 etm config $_TARGETNAME 16 normal full etb
65 etb config $_TARGETNAME $_CHIPNAME.etb
67 gdb_breakpoint_override hard
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