ipdbg: fix double free of virtual-ir data
[openocd.git] / src / jtag / drivers / bitbang.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /***************************************************************************
4 * Copyright (C) 2005 by Dominic Rath *
5 * Dominic.Rath@gmx.de *
6 * *
7 * Copyright (C) 2007,2008 Øyvind Harboe *
8 * oyvind.harboe@zylin.com *
9 ***************************************************************************/
10
11 /* 2014-12: Addition of the SWD protocol support is based on the initial work
12 * by Paul Fertser and modifications by Jean-Christian de Rivaz. */
13
14 #ifdef HAVE_CONFIG_H
15 #include "config.h"
16 #endif
17
18 #include <jtag/jtag.h> /* Added to avoid include loop in commands.h */
19 #include "bitbang.h"
20 #include <jtag/interface.h>
21 #include <jtag/commands.h>
22
23 #include <helper/time_support.h>
24
25 /* Timeout for retrying on SWD WAIT in msec */
26 #define SWD_WAIT_TIMEOUT 500
27
28 /**
29 * Function bitbang_stableclocks
30 * issues a number of clock cycles while staying in a stable state.
31 * Because the TMS value required to stay in the RESET state is a 1, whereas
32 * the TMS value required to stay in any of the other stable states is a 0,
33 * this function checks the current stable state to decide on the value of TMS
34 * to use.
35 */
36 static int bitbang_stableclocks(int num_cycles);
37
38 static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk);
39
40 struct bitbang_interface *bitbang_interface;
41
42 /* DANGER!!!! clock absolutely *MUST* be 0 in idle or reset won't work!
43 *
44 * Set this to 1 and str912 reset halt will fail.
45 *
46 * If someone can submit a patch with an explanation it will be greatly
47 * appreciated, but as far as I can tell (ØH) DCLK is generated upon
48 * clk = 0 in TAP_IDLE. Good luck deducing that from the ARM documentation!
49 * The ARM documentation uses the term "DCLK is asserted while in the TAP_IDLE
50 * state". With hardware there is no such thing as *while* in a state. There
51 * are only edges. So clk => 0 is in fact a very subtle state transition that
52 * happens *while* in the TAP_IDLE state. "#&¤"#¤&"#&"#&
53 *
54 * For "reset halt" the last thing that happens before srst is asserted
55 * is that the breakpoint is set up. If DCLK is not wiggled one last
56 * time before the reset, then the breakpoint is not set up and
57 * "reset halt" will fail to halt.
58 *
59 */
60 #define CLOCK_IDLE() 0
61
62 /* The bitbang driver leaves the TCK 0 when in idle */
63 static void bitbang_end_state(tap_state_t state)
64 {
65 assert(tap_is_state_stable(state));
66 tap_set_end_state(state);
67 }
68
69 static int bitbang_state_move(int skip)
70 {
71 int i = 0, tms = 0;
72 uint8_t tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
73 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
74
75 for (i = skip; i < tms_count; i++) {
76 tms = (tms_scan >> i) & 1;
77 if (bitbang_interface->write(0, tms, 0) != ERROR_OK)
78 return ERROR_FAIL;
79 if (bitbang_interface->write(1, tms, 0) != ERROR_OK)
80 return ERROR_FAIL;
81 }
82 if (bitbang_interface->write(CLOCK_IDLE(), tms, 0) != ERROR_OK)
83 return ERROR_FAIL;
84
85 tap_set_state(tap_get_end_state());
86 return ERROR_OK;
87 }
88
89 /**
90 * Clock a bunch of TMS (or SWDIO) transitions, to change the JTAG
91 * (or SWD) state machine.
92 */
93 static int bitbang_execute_tms(struct jtag_command *cmd)
94 {
95 unsigned num_bits = cmd->cmd.tms->num_bits;
96 const uint8_t *bits = cmd->cmd.tms->bits;
97
98 LOG_DEBUG_IO("TMS: %d bits", num_bits);
99
100 int tms = 0;
101 for (unsigned i = 0; i < num_bits; i++) {
102 tms = ((bits[i/8] >> (i % 8)) & 1);
103 if (bitbang_interface->write(0, tms, 0) != ERROR_OK)
104 return ERROR_FAIL;
105 if (bitbang_interface->write(1, tms, 0) != ERROR_OK)
106 return ERROR_FAIL;
107 }
108 if (bitbang_interface->write(CLOCK_IDLE(), tms, 0) != ERROR_OK)
109 return ERROR_FAIL;
110
111 return ERROR_OK;
112 }
113
114 static int bitbang_path_move(struct pathmove_command *cmd)
115 {
116 int num_states = cmd->num_states;
117 int state_count;
118 int tms = 0;
119
120 state_count = 0;
121 while (num_states) {
122 if (tap_state_transition(tap_get_state(), false) == cmd->path[state_count])
123 tms = 0;
124 else if (tap_state_transition(tap_get_state(), true) == cmd->path[state_count])
125 tms = 1;
126 else {
127 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
128 tap_state_name(tap_get_state()),
129 tap_state_name(cmd->path[state_count]));
130 exit(-1);
131 }
132
133 if (bitbang_interface->write(0, tms, 0) != ERROR_OK)
134 return ERROR_FAIL;
135 if (bitbang_interface->write(1, tms, 0) != ERROR_OK)
136 return ERROR_FAIL;
137
138 tap_set_state(cmd->path[state_count]);
139 state_count++;
140 num_states--;
141 }
142
143 if (bitbang_interface->write(CLOCK_IDLE(), tms, 0) != ERROR_OK)
144 return ERROR_FAIL;
145
146 tap_set_end_state(tap_get_state());
147 return ERROR_OK;
148 }
149
150 static int bitbang_runtest(int num_cycles)
151 {
152 int i;
153
154 tap_state_t saved_end_state = tap_get_end_state();
155
156 /* only do a state_move when we're not already in IDLE */
157 if (tap_get_state() != TAP_IDLE) {
158 bitbang_end_state(TAP_IDLE);
159 if (bitbang_state_move(0) != ERROR_OK)
160 return ERROR_FAIL;
161 }
162
163 /* execute num_cycles */
164 for (i = 0; i < num_cycles; i++) {
165 if (bitbang_interface->write(0, 0, 0) != ERROR_OK)
166 return ERROR_FAIL;
167 if (bitbang_interface->write(1, 0, 0) != ERROR_OK)
168 return ERROR_FAIL;
169 }
170 if (bitbang_interface->write(CLOCK_IDLE(), 0, 0) != ERROR_OK)
171 return ERROR_FAIL;
172
173 /* finish in end_state */
174 bitbang_end_state(saved_end_state);
175 if (tap_get_state() != tap_get_end_state())
176 if (bitbang_state_move(0) != ERROR_OK)
177 return ERROR_FAIL;
178
179 return ERROR_OK;
180 }
181
182 static int bitbang_stableclocks(int num_cycles)
183 {
184 int tms = (tap_get_state() == TAP_RESET ? 1 : 0);
185 int i;
186
187 /* send num_cycles clocks onto the cable */
188 for (i = 0; i < num_cycles; i++) {
189 if (bitbang_interface->write(1, tms, 0) != ERROR_OK)
190 return ERROR_FAIL;
191 if (bitbang_interface->write(0, tms, 0) != ERROR_OK)
192 return ERROR_FAIL;
193 }
194
195 return ERROR_OK;
196 }
197
198 static int bitbang_scan(bool ir_scan, enum scan_type type, uint8_t *buffer,
199 unsigned scan_size)
200 {
201 tap_state_t saved_end_state = tap_get_end_state();
202 unsigned bit_cnt;
203
204 if (!((!ir_scan &&
205 (tap_get_state() == TAP_DRSHIFT)) ||
206 (ir_scan && (tap_get_state() == TAP_IRSHIFT)))) {
207 if (ir_scan)
208 bitbang_end_state(TAP_IRSHIFT);
209 else
210 bitbang_end_state(TAP_DRSHIFT);
211
212 if (bitbang_state_move(0) != ERROR_OK)
213 return ERROR_FAIL;
214 bitbang_end_state(saved_end_state);
215 }
216
217 size_t buffered = 0;
218 for (bit_cnt = 0; bit_cnt < scan_size; bit_cnt++) {
219 int tms = (bit_cnt == scan_size-1) ? 1 : 0;
220 int tdi;
221 int bytec = bit_cnt/8;
222 int bcval = 1 << (bit_cnt % 8);
223
224 /* if we're just reading the scan, but don't care about the output
225 * default to outputting 'low', this also makes valgrind traces more readable,
226 * as it removes the dependency on an uninitialised value
227 */
228 tdi = 0;
229 if ((type != SCAN_IN) && (buffer[bytec] & bcval))
230 tdi = 1;
231
232 if (bitbang_interface->write(0, tms, tdi) != ERROR_OK)
233 return ERROR_FAIL;
234
235 if (type != SCAN_OUT) {
236 if (bitbang_interface->buf_size) {
237 if (bitbang_interface->sample() != ERROR_OK)
238 return ERROR_FAIL;
239 buffered++;
240 } else {
241 switch (bitbang_interface->read()) {
242 case BB_LOW:
243 buffer[bytec] &= ~bcval;
244 break;
245 case BB_HIGH:
246 buffer[bytec] |= bcval;
247 break;
248 default:
249 return ERROR_FAIL;
250 }
251 }
252 }
253
254 if (bitbang_interface->write(1, tms, tdi) != ERROR_OK)
255 return ERROR_FAIL;
256
257 if (type != SCAN_OUT && bitbang_interface->buf_size &&
258 (buffered == bitbang_interface->buf_size ||
259 bit_cnt == scan_size - 1)) {
260 for (unsigned i = bit_cnt + 1 - buffered; i <= bit_cnt; i++) {
261 switch (bitbang_interface->read_sample()) {
262 case BB_LOW:
263 buffer[i/8] &= ~(1 << (i % 8));
264 break;
265 case BB_HIGH:
266 buffer[i/8] |= 1 << (i % 8);
267 break;
268 default:
269 return ERROR_FAIL;
270 }
271 }
272 buffered = 0;
273 }
274 }
275
276 if (tap_get_state() != tap_get_end_state()) {
277 /* we *KNOW* the above loop transitioned out of
278 * the shift state, so we skip the first state
279 * and move directly to the end state.
280 */
281 if (bitbang_state_move(1) != ERROR_OK)
282 return ERROR_FAIL;
283 }
284 return ERROR_OK;
285 }
286
287 static void bitbang_sleep(unsigned int microseconds)
288 {
289 if (bitbang_interface->sleep) {
290 bitbang_interface->sleep(microseconds);
291 } else {
292 jtag_sleep(microseconds);
293 }
294 }
295
296 int bitbang_execute_queue(struct jtag_command *cmd_queue)
297 {
298 struct jtag_command *cmd = cmd_queue; /* currently processed command */
299 int scan_size;
300 enum scan_type type;
301 uint8_t *buffer;
302 int retval;
303
304 if (!bitbang_interface) {
305 LOG_ERROR("BUG: Bitbang interface called, but not yet initialized");
306 exit(-1);
307 }
308
309 /* return ERROR_OK, unless a jtag_read_buffer returns a failed check
310 * that wasn't handled by a caller-provided error handler
311 */
312 retval = ERROR_OK;
313
314 if (bitbang_interface->blink) {
315 if (bitbang_interface->blink(1) != ERROR_OK)
316 return ERROR_FAIL;
317 }
318
319 while (cmd) {
320 switch (cmd->type) {
321 case JTAG_RUNTEST:
322 LOG_DEBUG_IO("runtest %i cycles, end in %s",
323 cmd->cmd.runtest->num_cycles,
324 tap_state_name(cmd->cmd.runtest->end_state));
325 bitbang_end_state(cmd->cmd.runtest->end_state);
326 if (bitbang_runtest(cmd->cmd.runtest->num_cycles) != ERROR_OK)
327 return ERROR_FAIL;
328 break;
329
330 case JTAG_STABLECLOCKS:
331 /* this is only allowed while in a stable state. A check for a stable
332 * state was done in jtag_add_clocks()
333 */
334 if (bitbang_stableclocks(cmd->cmd.stableclocks->num_cycles) != ERROR_OK)
335 return ERROR_FAIL;
336 break;
337
338 case JTAG_TLR_RESET:
339 LOG_DEBUG_IO("statemove end in %s",
340 tap_state_name(cmd->cmd.statemove->end_state));
341 bitbang_end_state(cmd->cmd.statemove->end_state);
342 if (bitbang_state_move(0) != ERROR_OK)
343 return ERROR_FAIL;
344 break;
345 case JTAG_PATHMOVE:
346 LOG_DEBUG_IO("pathmove: %i states, end in %s",
347 cmd->cmd.pathmove->num_states,
348 tap_state_name(cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]));
349 if (bitbang_path_move(cmd->cmd.pathmove) != ERROR_OK)
350 return ERROR_FAIL;
351 break;
352 case JTAG_SCAN:
353 bitbang_end_state(cmd->cmd.scan->end_state);
354 scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
355 LOG_DEBUG_IO("%s scan %d bits; end in %s",
356 (cmd->cmd.scan->ir_scan) ? "IR" : "DR",
357 scan_size,
358 tap_state_name(cmd->cmd.scan->end_state));
359 type = jtag_scan_type(cmd->cmd.scan);
360 if (bitbang_scan(cmd->cmd.scan->ir_scan, type, buffer,
361 scan_size) != ERROR_OK)
362 return ERROR_FAIL;
363 if (jtag_read_buffer(buffer, cmd->cmd.scan) != ERROR_OK)
364 retval = ERROR_JTAG_QUEUE_FAILED;
365 free(buffer);
366 break;
367 case JTAG_SLEEP:
368 LOG_DEBUG_IO("sleep %" PRIu32, cmd->cmd.sleep->us);
369 if (bitbang_interface->flush && (bitbang_interface->flush() != ERROR_OK))
370 return ERROR_FAIL;
371 bitbang_sleep(cmd->cmd.sleep->us);
372 break;
373 case JTAG_TMS:
374 retval = bitbang_execute_tms(cmd);
375 break;
376 default:
377 LOG_ERROR("BUG: unknown JTAG command type encountered");
378 exit(-1);
379 }
380 cmd = cmd->next;
381 }
382 if (bitbang_interface->blink) {
383 if (bitbang_interface->blink(0) != ERROR_OK)
384 return ERROR_FAIL;
385 }
386
387 return retval;
388 }
389
390 static int queued_retval;
391
392 static int bitbang_swd_init(void)
393 {
394 LOG_DEBUG("bitbang_swd_init");
395 return ERROR_OK;
396 }
397
398 static void bitbang_swd_exchange(bool rnw, uint8_t buf[], unsigned int offset, unsigned int bit_cnt)
399 {
400 if (bitbang_interface->blink) {
401 /* FIXME: we should manage errors */
402 bitbang_interface->blink(1);
403 }
404
405 for (unsigned int i = offset; i < bit_cnt + offset; i++) {
406 int bytec = i/8;
407 int bcval = 1 << (i % 8);
408 int swdio = !rnw && (buf[bytec] & bcval);
409
410 bitbang_interface->swd_write(0, swdio);
411
412 if (rnw && buf) {
413 if (bitbang_interface->swdio_read())
414 buf[bytec] |= bcval;
415 else
416 buf[bytec] &= ~bcval;
417 }
418
419 bitbang_interface->swd_write(1, swdio);
420 }
421
422 if (bitbang_interface->blink) {
423 /* FIXME: we should manage errors */
424 bitbang_interface->blink(0);
425 }
426 }
427
428 static int bitbang_swd_switch_seq(enum swd_special_seq seq)
429 {
430 switch (seq) {
431 case LINE_RESET:
432 LOG_DEBUG_IO("SWD line reset");
433 bitbang_swd_exchange(false, (uint8_t *)swd_seq_line_reset, 0, swd_seq_line_reset_len);
434 break;
435 case JTAG_TO_SWD:
436 LOG_DEBUG("JTAG-to-SWD");
437 bitbang_swd_exchange(false, (uint8_t *)swd_seq_jtag_to_swd, 0, swd_seq_jtag_to_swd_len);
438 break;
439 case JTAG_TO_DORMANT:
440 LOG_DEBUG("JTAG-to-DORMANT");
441 bitbang_swd_exchange(false, (uint8_t *)swd_seq_jtag_to_dormant, 0, swd_seq_jtag_to_dormant_len);
442 break;
443 case SWD_TO_JTAG:
444 LOG_DEBUG("SWD-to-JTAG");
445 bitbang_swd_exchange(false, (uint8_t *)swd_seq_swd_to_jtag, 0, swd_seq_swd_to_jtag_len);
446 break;
447 case SWD_TO_DORMANT:
448 LOG_DEBUG("SWD-to-DORMANT");
449 bitbang_swd_exchange(false, (uint8_t *)swd_seq_swd_to_dormant, 0, swd_seq_swd_to_dormant_len);
450 break;
451 case DORMANT_TO_SWD:
452 LOG_DEBUG("DORMANT-to-SWD");
453 bitbang_swd_exchange(false, (uint8_t *)swd_seq_dormant_to_swd, 0, swd_seq_dormant_to_swd_len);
454 break;
455 case DORMANT_TO_JTAG:
456 LOG_DEBUG("DORMANT-to-JTAG");
457 bitbang_swd_exchange(false, (uint8_t *)swd_seq_dormant_to_jtag, 0, swd_seq_dormant_to_jtag_len);
458 break;
459 default:
460 LOG_ERROR("Sequence %d not supported", seq);
461 return ERROR_FAIL;
462 }
463
464 return ERROR_OK;
465 }
466
467 static void swd_clear_sticky_errors(void)
468 {
469 bitbang_swd_write_reg(swd_cmd(false, false, DP_ABORT),
470 STKCMPCLR | STKERRCLR | WDERRCLR | ORUNERRCLR, 0);
471 }
472
473 static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk)
474 {
475 assert(cmd & SWD_CMD_RNW);
476
477 if (queued_retval != ERROR_OK) {
478 LOG_DEBUG("Skip bitbang_swd_read_reg because queued_retval=%d", queued_retval);
479 return;
480 }
481
482 int64_t timeout = timeval_ms() + SWD_WAIT_TIMEOUT;
483 for (unsigned int retry = 0;; retry++) {
484 uint8_t trn_ack_data_parity_trn[DIV_ROUND_UP(4 + 3 + 32 + 1 + 4, 8)];
485
486 cmd |= SWD_CMD_START | SWD_CMD_PARK;
487 bitbang_swd_exchange(false, &cmd, 0, 8);
488
489 bitbang_interface->swdio_drive(false);
490 bitbang_swd_exchange(true, trn_ack_data_parity_trn, 0, 1 + 3 + 32 + 1 + 1);
491 bitbang_interface->swdio_drive(true);
492
493 int ack = buf_get_u32(trn_ack_data_parity_trn, 1, 3);
494 uint32_t data = buf_get_u32(trn_ack_data_parity_trn, 1 + 3, 32);
495 int parity = buf_get_u32(trn_ack_data_parity_trn, 1 + 3 + 32, 1);
496
497 LOG_CUSTOM_LEVEL((ack != SWD_ACK_OK && (retry == 0 || ack != SWD_ACK_WAIT))
498 ? LOG_LVL_DEBUG : LOG_LVL_DEBUG_IO,
499 "%s %s read reg %X = %08" PRIx32,
500 ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
501 cmd & SWD_CMD_APNDP ? "AP" : "DP",
502 (cmd & SWD_CMD_A32) >> 1,
503 data);
504
505 if (ack == SWD_ACK_WAIT && timeval_ms() <= timeout) {
506 swd_clear_sticky_errors();
507 if (retry > 20)
508 alive_sleep(1);
509
510 continue;
511 }
512 if (retry > 1)
513 LOG_DEBUG("SWD WAIT: retried %u times", retry);
514
515 if (ack != SWD_ACK_OK) {
516 queued_retval = swd_ack_to_error_code(ack);
517 return;
518 }
519
520 if (parity != parity_u32(data)) {
521 LOG_ERROR("Wrong parity detected");
522 queued_retval = ERROR_FAIL;
523 return;
524 }
525 if (value)
526 *value = data;
527 if (cmd & SWD_CMD_APNDP)
528 bitbang_swd_exchange(true, NULL, 0, ap_delay_clk);
529 return;
530 }
531 }
532
533 static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk)
534 {
535 assert(!(cmd & SWD_CMD_RNW));
536
537 if (queued_retval != ERROR_OK) {
538 LOG_DEBUG("Skip bitbang_swd_write_reg because queued_retval=%d", queued_retval);
539 return;
540 }
541
542 int64_t timeout = timeval_ms() + SWD_WAIT_TIMEOUT;
543
544 /* Devices do not reply to DP_TARGETSEL write cmd, ignore received ack */
545 bool check_ack = swd_cmd_returns_ack(cmd);
546
547 /* init the array to silence scan-build */
548 uint8_t trn_ack_data_parity_trn[DIV_ROUND_UP(4 + 3 + 32 + 1 + 4, 8)] = {0};
549 for (unsigned int retry = 0;; retry++) {
550 buf_set_u32(trn_ack_data_parity_trn, 1 + 3 + 1, 32, value);
551 buf_set_u32(trn_ack_data_parity_trn, 1 + 3 + 1 + 32, 1, parity_u32(value));
552
553 cmd |= SWD_CMD_START | SWD_CMD_PARK;
554 bitbang_swd_exchange(false, &cmd, 0, 8);
555
556 bitbang_interface->swdio_drive(false);
557 bitbang_swd_exchange(true, trn_ack_data_parity_trn, 0, 1 + 3);
558
559 /* Avoid a glitch on SWDIO when changing the direction to output.
560 * To keep performance penalty minimal, pre-write the first data
561 * bit to SWDIO GPIO output buffer while clocking the turnaround bit.
562 * Following swdio_drive(true) outputs the pre-written value
563 * and the same value is rewritten by the next swd_write()
564 * instead of glitching SWDIO
565 * HiZ/pull-up --------------> 0 -------------> 1
566 * swdio_drive(true) swd_write(0,1)
567 * in case of data bit 0 = 1
568 */
569 bitbang_swd_exchange(false, trn_ack_data_parity_trn, 1 + 3 + 1, 1);
570 bitbang_interface->swdio_drive(true);
571 bitbang_swd_exchange(false, trn_ack_data_parity_trn, 1 + 3 + 1, 32 + 1);
572
573 int ack = buf_get_u32(trn_ack_data_parity_trn, 1, 3);
574 LOG_CUSTOM_LEVEL((check_ack && ack != SWD_ACK_OK && (retry == 0 || ack != SWD_ACK_WAIT))
575 ? LOG_LVL_DEBUG : LOG_LVL_DEBUG_IO,
576 "%s%s %s write reg %X = %08" PRIx32,
577 check_ack ? "" : "ack ignored ",
578 ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
579 cmd & SWD_CMD_APNDP ? "AP" : "DP",
580 (cmd & SWD_CMD_A32) >> 1,
581 buf_get_u32(trn_ack_data_parity_trn, 1 + 3 + 1, 32));
582
583 if (check_ack && ack == SWD_ACK_WAIT && timeval_ms() <= timeout) {
584 swd_clear_sticky_errors();
585 if (retry > 20)
586 alive_sleep(1);
587
588 continue;
589 }
590
591 if (retry > 1)
592 LOG_DEBUG("SWD WAIT: retried %u times", retry);
593
594 if (check_ack && ack != SWD_ACK_OK) {
595 queued_retval = swd_ack_to_error_code(ack);
596 return;
597 }
598
599 if (cmd & SWD_CMD_APNDP)
600 bitbang_swd_exchange(true, NULL, 0, ap_delay_clk);
601 return;
602 }
603 }
604
605 static int bitbang_swd_run_queue(void)
606 {
607 /* A transaction must be followed by another transaction or at least 8 idle cycles to
608 * ensure that data is clocked through the AP. */
609 bitbang_swd_exchange(true, NULL, 0, 8);
610
611 int retval = queued_retval;
612 queued_retval = ERROR_OK;
613 LOG_DEBUG_IO("SWD queue return value: %02x", retval);
614 return retval;
615 }
616
617 const struct swd_driver bitbang_swd = {
618 .init = bitbang_swd_init,
619 .switch_seq = bitbang_swd_switch_seq,
620 .read_reg = bitbang_swd_read_reg,
621 .write_reg = bitbang_swd_write_reg,
622 .run = bitbang_swd_run_queue,
623 };

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)