jtag: linuxgpiod: drop extra parenthesis
[openocd.git] / src / flash / nand / s3c2412.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /***************************************************************************
4 * Copyright (C) 2007, 2008 by Ben Dooks *
5 * ben@fluff.org *
6 ***************************************************************************/
7
8 /*
9 * S3C2412 OpenOCD NAND Flash controller support.
10 *
11 * Many thanks to Simtec Electronics for sponsoring this work.
12 */
13
14 #ifdef HAVE_CONFIG_H
15 #include "config.h"
16 #endif
17
18 #include "s3c24xx.h"
19
20 NAND_DEVICE_COMMAND_HANDLER(s3c2412_nand_device_command)
21 {
22 struct s3c24xx_nand_controller *info;
23 CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
24
25 /* fill in the address fields for the core device */
26 info->cmd = S3C2440_NFCMD;
27 info->addr = S3C2440_NFADDR;
28 info->data = S3C2440_NFDATA;
29 info->nfstat = S3C2412_NFSTAT;
30
31 return ERROR_OK;
32 }
33
34 static int s3c2412_init(struct nand_device *nand)
35 {
36 struct target *target = nand->target;
37
38 target_write_u32(target, S3C2410_NFCONF,
39 S3C2440_NFCONF_TACLS(3) |
40 S3C2440_NFCONF_TWRPH0(7) |
41 S3C2440_NFCONF_TWRPH1(7));
42
43 target_write_u32(target, S3C2440_NFCONT,
44 S3C2412_NFCONT_INIT_MAIN_ECC |
45 S3C2440_NFCONT_ENABLE);
46
47 return ERROR_OK;
48 }
49
50 struct nand_flash_controller s3c2412_nand_controller = {
51 .name = "s3c2412",
52 .nand_device_command = &s3c2412_nand_device_command,
53 .init = &s3c2412_init,
54 .reset = &s3c24xx_reset,
55 .command = &s3c24xx_command,
56 .address = &s3c24xx_address,
57 .write_data = &s3c24xx_write_data,
58 .read_data = &s3c24xx_read_data,
59 .write_page = s3c24xx_write_page,
60 .read_page = s3c24xx_read_page,
61 .write_block_data = &s3c2440_write_block_data,
62 .read_block_data = &s3c2440_read_block_data,
63 .nand_ready = &s3c2440_nand_ready,
64 };

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