SimonQian <simonqian@simonqian.com> AVR wip

git-svn-id: svn://svn.berlios.de/openocd/trunk@1540 b42882b7-edfa-0310-969c-e2dbd0fdcd60

diff --git a/src/flash/Makefile.am b/src/flash/Makefile.am
index 7e57386b71d0362bcf95a24204c541098cc58574..b384c553f23b96ea7c6b0aec69f73f8a4a751afa 100644 (file)
--- a/src/flash/Makefile.am
+++ b/src/flash/Makefile.am
@@ -7,10 +7,10 @@ libflash_a_SOURCES = \
        str7x.c str9x.c aduc702x.c nand.c nand_ecc.c \
        lpc3180_nand_controller.c stellaris.c str9xpec.c stm32x.c tms470.c \
        ecos.c orion_nand.c s3c24xx_nand.c s3c2410_nand.c s3c2412_nand.c \
-       s3c2440_nand.c s3c2443_nand.c lpc288x.c ocl.c mflash.c pic32mx.c
+       s3c2440_nand.c s3c2443_nand.c lpc288x.c ocl.c mflash.c pic32mx.c avrf.c
 noinst_HEADERS = \
        flash.h lpc2000.h cfi.h non_cfi.h at91sam7.h at91sam7_old.h str7x.h \
        str9x.h nand.h lpc3180_nand_controller.h stellaris.h str9xpec.h \
        stm32x.h tms470.h s3c24xx_nand.h s3c24xx_regs_nand.h lpc288x.h \
-       mflash.h ocl.h pic32mx.h
+       mflash.h ocl.h pic32mx.h avrf.h
 MAINTAINERCLEANFILES = Makefile.in

diff --git a/src/flash/avrf.c b/src/flash/avrf.c
new file mode 100644 (file)
index 0000000..3351ded
--- /dev/null
+++ b/src/flash/avrf.c
@@ -0,0 +1,500 @@
+/***************************************************************************\r
+ *   Copyright (C) 2009 by Simon Qian                                      *\r
+ *   SimonQian@SimonQian.com                                               *\r
+ *                                                                         *\r
+ *   This program is free software; you can redistribute it and/or modify  *\r
+ *   it under the terms of the GNU General Public License as published by  *\r
+ *   the Free Software Foundation; either version 2 of the License, or     *\r
+ *   (at your option) any later version.                                   *\r
+ *                                                                         *\r
+ *   This program is distributed in the hope that it will be useful,       *\r
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *\r
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *\r
+ *   GNU General Public License for more details.                          *\r
+ *                                                                         *\r
+ *   You should have received a copy of the GNU General Public License     *\r
+ *   along with this program; if not, write to the                         *\r
+ *   Free Software Foundation, Inc.,                                       *\r
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *\r
+ ***************************************************************************/\r
+#ifdef HAVE_CONFIG_H\r
+#include "config.h"\r
+#endif\r
+\r
+#include "replacements.h"\r
+\r
+#include "avrf.h"\r
+#include "avrt.h"\r
+#include "flash.h"\r
+#include "target.h"\r
+#include "log.h"\r
+#include "algorithm.h"\r
+#include "binarybuffer.h"\r
+\r
+#include <stdlib.h>\r
+#include <string.h>\r
+\r
+/* AVR_JTAG_Instructions */\r
+#define AVR_JTAG_INS_LEN                                                       4\r
+// Public Instructions:\r
+#define AVR_JTAG_INS_EXTEST                                                    0x00\r
+#define AVR_JTAG_INS_IDCODE                                                    0x01\r
+#define AVR_JTAG_INS_SAMPLE_PRELOAD                                    0x02\r
+#define AVR_JTAG_INS_BYPASS                                                    0x0F\r
+// AVR Specified Public Instructions:\r
+#define AVR_JTAG_INS_AVR_RESET                                         0x0C\r
+#define AVR_JTAG_INS_PROG_ENABLE                                       0x04\r
+#define AVR_JTAG_INS_PROG_COMMANDS                                     0x05\r
+#define AVR_JTAG_INS_PROG_PAGELOAD                                     0x06\r
+#define AVR_JTAG_INS_PROG_PAGEREAD                                     0x07\r
+\r
+// Data Registers:\r
+#define AVR_JTAG_REG_Bypass_Len                                                1\r
+#define AVR_JTAG_REG_DeviceID_Len                                      32\r
+\r
+#define AVR_JTAG_REG_Reset_Len                                         1\r
+#define AVR_JTAG_REG_JTAGID_Len                                                32\r
+#define AVR_JTAG_REG_ProgrammingEnable_Len                     16\r
+#define AVR_JTAG_REG_ProgrammingCommand_Len                    15\r
+#define AVR_JTAG_REG_FlashDataByte_Len                         16\r
+\r
+avrf_type_t avft_chips_info[] = \r
+{\r
+//      name,                  chip_id,        flash_page_size,        flash_page_num, eeprom_page_size,       eeprom_page_num\r
+       {"atmega128",   0x9702,         256,                            512,                    8,                                      512},\r
+};\r
+\r
+static int avrf_register_commands(struct command_context_s *cmd_ctx);\r
+static int avrf_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);\r
+static int avrf_erase(struct flash_bank_s *bank, int first, int last);\r
+static int avrf_protect(struct flash_bank_s *bank, int set, int first, int last);\r
+static int avrf_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);\r
+static int avrf_probe(struct flash_bank_s *bank);\r
+static int avrf_auto_probe(struct flash_bank_s *bank);\r
+//static int avrf_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);\r
+static int avrf_protect_check(struct flash_bank_s *bank);\r
+static int avrf_info(struct flash_bank_s *bank, char *buf, int buf_size);\r
+\r
+static int avrf_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);\r
+\r
+extern int avr_jtag_sendinstr(jtag_tap_t *tap, u8 *ir_in, u8 ir_out);\r
+extern int avr_jtag_senddat(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int len);\r
+\r
+extern int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti);\r
+extern int mcu_write_dr(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int dr_len, int rti);\r
+extern int mcu_write_ir_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int ir_len, int rti);\r
+extern int mcu_write_dr_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int dr_len, int rti);\r
+extern int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti);\r
+extern int mcu_write_dr_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int dr_len, int rti);\r
+extern int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti);\r
+extern int mcu_write_dr_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int dr_len, int rti);\r
+extern int mcu_execute_queue(void);\r
+\r
+flash_driver_t avr_flash =\r
+{\r
+       .name = "avr",\r
+       .register_commands = avrf_register_commands,\r
+       .flash_bank_command = avrf_flash_bank_command,\r
+       .erase = avrf_erase,\r
+       .protect = avrf_protect,\r
+       .write = avrf_write,\r
+       .probe = avrf_probe,\r
+       .auto_probe = avrf_auto_probe,\r
+       .erase_check = default_flash_mem_blank_check,\r
+       .protect_check = avrf_protect_check,\r
+       .info = avrf_info\r
+};\r
+\r
+/* avr program functions */\r
+static int avr_jtag_reset(avr_common_t *avr, u32 reset)\r
+{\r
+       avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);\r
+       avr_jtag_senddat(avr->jtag_info.tap, NULL, reset ,AVR_JTAG_REG_Reset_Len);\r
+       \r
+       return ERROR_OK;\r
+}\r
+\r
+static int avr_jtag_read_jtagid(avr_common_t *avr, u32 *id)\r
+{\r
+       avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);\r
+       avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);\r
+       \r
+       return ERROR_OK;\r
+}\r
+\r
+static int avr_jtagprg_enterprogmode(avr_common_t *avr)\r
+{\r
+       avr_jtag_reset(avr, 1);\r
+       \r
+       avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);\r
+       avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);\r
+       \r
+       return ERROR_OK;\r
+}\r
+\r
+static int avr_jtagprg_leaveprogmode(avr_common_t *avr)\r
+{\r
+       avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);\r
+       avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);\r
+       avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);\r
+\r
+       avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);\r
+       avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);\r
+\r
+       avr_jtag_reset(avr, 0);\r
+       \r
+       return ERROR_OK;\r
+}\r
+\r
+static int avr_jtagprg_chiperase(avr_common_t *avr)\r
+{\r
+       u32 poll_value;\r
+       \r
+       avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);\r
+       avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);\r
+       avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);\r
+       avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);\r
+       avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);\r
+       \r
+       do{\r
+               poll_value = 0;\r
+               avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);\r
+               if (ERROR_OK != mcu_execute_queue())\r
+               {\r
+                       return ERROR_FAIL;\r
+               }\r
+               LOG_DEBUG("poll_value = 0x%04X", poll_value);\r
+       }while(!(poll_value & 0x0200));\r
+       \r
+       return ERROR_OK;\r
+}\r
+\r
+static int avr_jtagprg_writeflashpage(avr_common_t *avr, u8 *page_buf, u32 buf_size, u32 addr, u32 page_size)\r
+{\r
+       u32 i, poll_value;\r
+       \r
+       avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);\r
+       avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);\r
+       \r
+       // load addr high byte\r
+       avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0700 | ((addr >> 9) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);\r
+       \r
+       // load addr low byte\r
+       avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0300 | ((addr >> 1) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);\r
+       \r
+       avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);\r
+       \r
+       for (i = 0; i < page_size; i++)\r
+       {\r
+               if (i < buf_size)\r
+               {\r
+                       avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);\r
+               }\r
+               else\r
+               {\r
+                       avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);\r
+               }\r
+       }\r
+       \r
+       avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);\r
+       \r
+       avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);\r
+       avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);\r
+       avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);\r
+       avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);\r
+       \r
+       do{\r
+               poll_value = 0;\r
+               avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);\r
+               if (ERROR_OK != mcu_execute_queue())\r
+               {\r
+                       return ERROR_FAIL;\r
+               }\r
+               LOG_DEBUG("poll_value = 0x%04X", poll_value);\r
+       }while(!(poll_value & 0x0200));\r
+       \r
+       return ERROR_OK;\r
+}\r
+\r
+/* interface command */\r
+static int avrf_register_commands(struct command_context_s *cmd_ctx)\r
+{\r
+       command_t *avr_cmd = register_command(cmd_ctx, NULL, "avr", NULL, COMMAND_ANY, "avr flash specific commands");\r
+       \r
+       register_command(cmd_ctx, avr_cmd, "mass_erase", avrf_handle_mass_erase_command, COMMAND_EXEC,\r
+                                        "mass erase device");\r
+       \r
+       return ERROR_OK;\r
+}\r
+\r
+static int avrf_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)\r
+{\r
+       avrf_flash_bank_t *avrf_info;\r
+       \r
+       if (argc < 6)\r
+       {\r
+               LOG_WARNING("incomplete flash_bank avr configuration");\r
+               return ERROR_FLASH_BANK_INVALID;\r
+       }\r
+       \r
+       avrf_info = malloc(sizeof(avrf_flash_bank_t));\r
+       bank->driver_priv = avrf_info;\r
+       \r
+       avrf_info->probed = 0;\r
+       \r
+       return ERROR_OK;\r
+}\r
+\r
+static int avrf_erase(struct flash_bank_s *bank, int first, int last)\r
+{\r
+       LOG_INFO(__FUNCTION__);\r
+       return ERROR_OK;\r
+}\r
+\r
+static int avrf_protect(struct flash_bank_s *bank, int set, int first, int last)\r
+{\r
+       LOG_INFO(__FUNCTION__);\r
+       return ERROR_OK;\r
+}\r
+\r
+static int avrf_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)\r
+{\r
+       target_t *target = bank->target;\r
+       avr_common_t *avr = target->arch_info;\r
+       u32 cur_size, cur_buffer_size, page_size;\r
+       \r
+       if (bank->target->state != TARGET_HALTED)\r
+       {\r
+               LOG_ERROR("Target not halted");\r
+               return ERROR_TARGET_NOT_HALTED;\r
+       }\r
+       \r
+       page_size = bank->sectors[0].size;\r
+       if ((offset % page_size) != 0)\r
+       {\r
+               LOG_WARNING("offset 0x%x breaks required %d-byte alignment", offset, page_size);\r
+               return ERROR_FLASH_DST_BREAKS_ALIGNMENT;\r
+       }\r
+       \r
+       LOG_DEBUG("offset is 0x%08X", offset);\r
+       LOG_DEBUG("count is %d", count);\r
+       \r
+       if (ERROR_OK != avr_jtagprg_enterprogmode(avr))\r
+       {\r
+               return ERROR_FAIL;\r
+       }\r
+       \r
+       cur_size = 0;\r
+       while(count > 0)\r
+       {\r
+               if (count > page_size)\r
+               {\r
+                       cur_buffer_size = page_size;\r
+               }\r
+               else\r
+               {\r
+                       cur_buffer_size = count;\r
+               }\r
+               avr_jtagprg_writeflashpage(avr, buffer + cur_size, cur_buffer_size, offset + cur_size, page_size);\r
+               count -= cur_buffer_size;\r
+               cur_size += cur_buffer_size;\r
+               \r
+               keep_alive();\r
+       }\r
+       \r
+       return avr_jtagprg_leaveprogmode(avr);\r
+}\r
+\r
+#define EXTRACT_MFG(X)  (((X) & 0xffe) >> 1)\r
+#define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)\r
+#define EXTRACT_VER(X)  (((X) & 0xf0000000) >> 28)\r
+static int avrf_probe(struct flash_bank_s *bank)\r
+{\r
+       target_t *target = bank->target;\r
+       avrf_flash_bank_t *avrf_info = bank->driver_priv;\r
+       avr_common_t *avr = target->arch_info;\r
+       avrf_type_t *avr_info;\r
+       int i;\r
+       u32 device_id;\r
+       \r
+       if (bank->target->state != TARGET_HALTED)\r
+       {\r
+               LOG_ERROR("Target not halted");\r
+               return ERROR_TARGET_NOT_HALTED;\r
+       }\r
+\r
+       avrf_info->probed = 0;\r
+       \r
+       avr_jtag_read_jtagid(avr, &device_id);\r
+       if (ERROR_OK != mcu_execute_queue())\r
+       {\r
+               return ERROR_FAIL;\r
+       }\r
+       \r
+       LOG_INFO( "device id = 0x%08x", device_id );\r
+       if (EXTRACT_MFG(device_id) != 0x1F)\r
+       {\r
+               LOG_ERROR("0x%X is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);\r
+       }\r
+       \r
+       for (i = 0; i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])); i++)\r
+       {\r
+               if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))\r
+               {\r
+                       avr_info = &avft_chips_info[i];\r
+                       LOG_INFO("target device is %s", avr_info->name);\r
+                       break;\r
+               }\r
+       }\r
+       \r
+       if (i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])))\r
+       {\r
+               // chip found\r
+               bank->base = 0x00000000;\r
+               bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);\r
+               bank->num_sectors = avr_info->flash_page_num;\r
+               bank->sectors = malloc(sizeof(flash_sector_t) * avr_info->flash_page_num);\r
+               \r
+               for (i = 0; i < avr_info->flash_page_num; i++)\r
+               {\r
+                       bank->sectors[i].offset = i * avr_info->flash_page_size;\r
+                       bank->sectors[i].size = avr_info->flash_page_size;\r
+                       bank->sectors[i].is_erased = -1;\r
+                       bank->sectors[i].is_protected = 1;\r
+               }\r
+               \r
+               avrf_info->probed = 1;\r
+               return ERROR_OK;\r
+       }\r
+       else\r
+       {\r
+               // chip not supported\r
+               LOG_ERROR("0x%X is not support for avr", EXTRACT_PART(device_id));\r
+               \r
+               avrf_info->probed = 1;\r
+               return ERROR_FAIL;\r
+       }\r
+}\r
+\r
+static int avrf_auto_probe(struct flash_bank_s *bank)\r
+{\r
+       avrf_flash_bank_t *avrf_info = bank->driver_priv;\r
+       if (avrf_info->probed)\r
+               return ERROR_OK;\r
+       return avrf_probe(bank);\r
+}\r
+\r
+static int avrf_protect_check(struct flash_bank_s *bank)\r
+{\r
+       LOG_INFO(__FUNCTION__);\r
+       return ERROR_OK;\r
+}\r
+\r
+static int avrf_info(struct flash_bank_s *bank, char *buf, int buf_size)\r
+{\r
+       target_t *target = bank->target;\r
+       avr_common_t *avr = target->arch_info;\r
+       avrf_type_t *avr_info;\r
+       int i;\r
+       u32 device_id;\r
+       \r
+       if (bank->target->state != TARGET_HALTED)\r
+       {\r
+               LOG_ERROR("Target not halted");\r
+               return ERROR_TARGET_NOT_HALTED;\r
+       }\r
+       \r
+       avr_jtag_read_jtagid(avr, &device_id);\r
+       if (ERROR_OK != mcu_execute_queue())\r
+       {\r
+               return ERROR_FAIL;\r
+       }\r
+       \r
+       LOG_INFO( "device id = 0x%08x", device_id );\r
+       if (EXTRACT_MFG(device_id) != 0x1F)\r
+       {\r
+               LOG_ERROR("0x%X is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);\r
+       }\r
+       \r
+       for (i = 0; i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])); i++)\r
+       {\r
+               if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))\r
+               {\r
+                       avr_info = &avft_chips_info[i];\r
+                       LOG_INFO("target device is %s", avr_info->name);\r
+                       \r
+                       return ERROR_OK;\r
+               }\r
+       }\r
+       \r
+       if (i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])))\r
+       {\r
+               // chip found\r
+               snprintf(buf, buf_size, "%s - Rev: 0x%X", avr_info->name, EXTRACT_VER(device_id));\r
+               return ERROR_OK;\r
+       }\r
+       else\r
+       {\r
+               // chip not supported\r
+               snprintf(buf, buf_size, "Cannot identify target as a avr\n");\r
+               return ERROR_FLASH_OPERATION_FAILED;\r
+       }\r
+}\r
+\r
+static int avrf_mass_erase(struct flash_bank_s *bank)\r
+{\r
+       target_t *target = bank->target;\r
+       avr_common_t *avr = target->arch_info;\r
+       \r
+       if (target->state != TARGET_HALTED)\r
+       {\r
+               LOG_ERROR("Target not halted");\r
+               return ERROR_TARGET_NOT_HALTED;\r
+       }\r
+       \r
+       if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))\r
+               || (ERROR_OK != avr_jtagprg_chiperase(avr))\r
+               || (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))\r
+       {\r
+               return ERROR_FAIL;\r
+       }\r
+       \r
+       return ERROR_OK;\r
+}\r
+\r
+static int avrf_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)\r
+{\r
+       flash_bank_t *bank;\r
+       int i;\r
+       \r
+       if (argc < 1)\r
+       {\r
+               command_print(cmd_ctx, "avr mass_erase <bank>");\r
+               return ERROR_OK;        \r
+       }\r
+       \r
+       bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));\r
+       if (!bank)\r
+       {\r
+               command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);\r
+               return ERROR_OK;\r
+       }\r
+       \r
+       if (avrf_mass_erase(bank) == ERROR_OK)\r
+       {\r
+               /* set all sectors as erased */\r
+               for (i = 0; i < bank->num_sectors; i++)\r
+               {\r
+                       bank->sectors[i].is_erased = 1;\r
+               }\r
+               \r
+               command_print(cmd_ctx, "avr mass erase complete");\r
+       }\r
+       else\r
+       {\r
+               command_print(cmd_ctx, "avr mass erase failed");\r
+       }\r
+       \r
+       LOG_DEBUG(__FUNCTION__);\r
+       return ERROR_OK;\r
+}\r

diff --git a/src/flash/avrf.h b/src/flash/avrf.h
new file mode 100644 (file)
index 0000000..d1c976c
--- /dev/null
+++ b/src/flash/avrf.h
@@ -0,0 +1,39 @@
+/***************************************************************************\r
+ *   Copyright (C) 2009 by Simon Qian                                      *\r
+ *   SimonQian@SimonQian.com                                               *\r
+ *                                                                         *\r
+ *   This program is free software; you can redistribute it and/or modify  *\r
+ *   it under the terms of the GNU General Public License as published by  *\r
+ *   the Free Software Foundation; either version 2 of the License, or     *\r
+ *   (at your option) any later version.                                   *\r
+ *                                                                         *\r
+ *   This program is distributed in the hope that it will be useful,       *\r
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *\r
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *\r
+ *   GNU General Public License for more details.                          *\r
+ *                                                                         *\r
+ *   You should have received a copy of the GNU General Public License     *\r
+ *   along with this program; if not, write to the                         *\r
+ *   Free Software Foundation, Inc.,                                       *\r
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *\r
+ ***************************************************************************/\r
+#ifndef AVRF_H\r
+#define AVRF_H\r
+\r
+typedef struct avrf_type_s\r
+{\r
+       char name[15];\r
+       u16 chip_id;\r
+       int flash_page_size;\r
+       int flash_page_num;\r
+       int eeprom_page_size;\r
+       int eeprom_page_num;\r
+} avrf_type_t;\r
+\r
+typedef struct avrf_flash_bank_s\r
+{\r
+       int ppage_size;\r
+       int probed;\r
+} avrf_flash_bank_t;\r
+\r
+#endif /* AVRF_H */\r

diff --git a/src/flash/flash.c b/src/flash/flash.c
index 3d5e08f8dd52b14be504871553b1d138eb4f9976..0490e759245afd2273112fbb5be621d9f526f366 100644 (file)
--- a/src/flash/flash.c
+++ b/src/flash/flash.c
@@ -77,6 +77,7 @@ extern flash_driver_t ecosflash_flash;
 extern flash_driver_t lpc288x_flash;
 extern flash_driver_t ocl_flash;
 extern flash_driver_t pic32mx_flash;
+extern flash_driver_t avr_flash;
 
 flash_driver_t *flash_drivers[] = {
        &lpc2000_flash,
@@ -94,6 +95,7 @@ flash_driver_t *flash_drivers[] = {
        &lpc288x_flash,
        &ocl_flash,
        &pic32mx_flash,
+       &avr_flash,
        NULL,
 };
 

diff --git a/src/target/Makefile.am b/src/target/Makefile.am
index b852c57270e37530c43ab00072f6d1bff9bab7d7..fb0ce3b04e5002a0626fef665700f7f97381a8b2 100644 (file)
--- a/src/target/Makefile.am
+++ b/src/target/Makefile.am
@@ -13,11 +13,11 @@ libtarget_a_SOURCES = target.c register.c breakpoints.c armv4_5.c embeddedice.c
        arm_jtag.c arm7_9_common.c algorithm.c arm920t.c arm720t.c armv4_5_mmu.c armv4_5_cache.c arm_disassembler.c \
        arm966e.c arm926ejs.c feroceon.c etb.c xscale.c arm_simulator.c image.c armv7m.c cortex_m3.c arm_adi_v5.c \
        etm_dummy.c $(OOCD_TRACE_FILES) target_request.c trace.c arm11.c arm11_dbgtap.c mips32.c mips_m4k.c \
-       mips32_pracc.c mips32_dmaacc.c mips_ejtag.c
+       mips32_pracc.c mips32_dmaacc.c mips_ejtag.c avrt.c
 noinst_HEADERS = target.h trace.h register.h armv4_5.h embeddedice.h etm.h arm7tdmi.h arm9tdmi.h \
        arm_jtag.h arm7_9_common.h arm920t.h arm720t.h armv4_5_mmu.h armv4_5_cache.h breakpoints.h algorithm.h \
        arm_disassembler.h arm966e.h arm926ejs.h etb.h xscale.h arm_simulator.h image.h armv7m.h cortex_m3.h arm_adi_v5.h \
-       etm_dummy.h oocd_trace.h target_request.h trace.h arm11.h mips32.h mips_m4k.h mips_ejtag.h mips32_pracc.h mips32_dmaacc.h
+       etm_dummy.h oocd_trace.h target_request.h trace.h arm11.h mips32.h mips_m4k.h mips_ejtag.h mips32_pracc.h mips32_dmaacc.h avrt.h
 
 nobase_dist_pkglib_DATA =
 nobase_dist_pkglib_DATA += xscale/debug_handler.bin 

diff --git a/src/target/avrt.c b/src/target/avrt.c
new file mode 100644 (file)
index 0000000..f67f196
--- /dev/null
+++ b/src/target/avrt.c
@@ -0,0 +1,354 @@
+/***************************************************************************\r
+ *   Copyright (C) 2009 by Simon Qian                                      *\r
+ *   SimonQian@SimonQian.com                                               *\r
+ *                                                                         *\r
+ *   This program is free software; you can redistribute it and/or modify  *\r
+ *   it under the terms of the GNU General Public License as published by  *\r
+ *   the Free Software Foundation; either version 2 of the License, or     *\r
+ *   (at your option) any later version.                                   *\r
+ *                                                                         *\r
+ *   This program is distributed in the hope that it will be useful,       *\r
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *\r
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *\r
+ *   GNU General Public License for more details.                          *\r
+ *                                                                         *\r
+ *   You should have received a copy of the GNU General Public License     *\r
+ *   along with this program; if not, write to the                         *\r
+ *   Free Software Foundation, Inc.,                                       *\r
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *\r
+ ***************************************************************************/\r
+#ifdef HAVE_CONFIG_H\r
+#include "config.h"\r
+#endif\r
+\r
+#include "replacements.h"\r
+\r
+#include "avrt.h"\r
+\r
+#include "register.h"\r
+#include "target.h"\r
+#include "log.h"\r
+#include "jtag.h"\r
+#include "binarybuffer.h"\r
+#include "time_support.h"\r
+#include "breakpoints.h"\r
+#include "fileio.h"\r
+\r
+#include <stdlib.h>\r
+#include <string.h>\r
+\r
+#include <sys/types.h>\r
+#include <unistd.h>\r
+#include <errno.h>\r
+\r
+#define AVR_JTAG_INS_LEN                                                       4\r
+\r
+/* cli handling */\r
+int avr_register_commands(struct command_context_s *cmd_ctx);\r
+\r
+/* forward declarations */\r
+int avr_target_create(struct target_s *target, Jim_Interp *interp);\r
+int avr_init_target(struct command_context_s *cmd_ctx, struct target_s *target);\r
+int avr_quit(void);\r
+\r
+int avr_arch_state(struct target_s *target);\r
+int avr_poll(target_t *target);\r
+int avr_halt(target_t *target);\r
+int avr_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);\r
+int avr_step(struct target_s *target, int current, u32 address, int handle_breakpoints);\r
+\r
+int avr_assert_reset(target_t *target);\r
+int avr_deassert_reset(target_t *target);\r
+int avr_soft_reset_halt(struct target_s *target);\r
+\r
+/* IR and DR functions */\r
+int avr_jtag_sendinstr(jtag_tap_t *tap, u8 *ir_in, u8 ir_out);\r
+int avr_jtag_senddat(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int len);\r
+\r
+int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti);\r
+int mcu_write_dr(jtag_tap_t *tap, u8 *dr_in, u8 *dr_out, int dr_len, int rti);\r
+int mcu_write_ir_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int ir_len, int rti);\r
+int mcu_write_dr_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int dr_len, int rti);\r
+int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti);\r
+int mcu_write_dr_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int dr_len, int rti);\r
+int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti);\r
+int mcu_write_dr_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int dr_len, int rti);\r
+int mcu_execute_queue(void);\r
+\r
+target_type_t avr_target =\r
+{\r
+       .name = "avr",\r
+\r
+       .poll = avr_poll,\r
+       .arch_state = avr_arch_state,\r
+\r
+       .target_request_data = NULL,\r
+\r
+       .halt = avr_halt,\r
+       .resume = avr_resume,\r
+       .step = avr_step,\r
+\r
+       .assert_reset = avr_assert_reset,\r
+       .deassert_reset = avr_deassert_reset,\r
+       .soft_reset_halt = avr_soft_reset_halt,\r
+/*\r
+       .get_gdb_reg_list = avr_get_gdb_reg_list,\r
+\r
+       .read_memory = avr_read_memory,\r
+       .write_memory = avr_write_memory,\r
+       .bulk_write_memory = avr_bulk_write_memory,\r
+       .checksum_memory = avr_checksum_memory,\r
+       .blank_check_memory = avr_blank_check_memory,\r
+\r
+       .run_algorithm = avr_run_algorithm,\r
+\r
+       .add_breakpoint = avr_add_breakpoint,\r
+       .remove_breakpoint = avr_remove_breakpoint,\r
+       .add_watchpoint = avr_add_watchpoint,\r
+       .remove_watchpoint = avr_remove_watchpoint,\r
+*/\r
+       .register_commands = avr_register_commands,\r
+       .target_create = avr_target_create,\r
+       .init_target = avr_init_target,\r
+       .quit = avr_quit,\r
+/*\r
+       .virt2phys = avr_virt2phys,\r
+       .mmu = avr_mmu\r
+*/\r
+};\r
+\r
+int avr_register_commands(struct command_context_s *cmd_ctx)\r
+{\r
+       LOG_DEBUG(__FUNCTION__);\r
+       return ERROR_OK;\r
+}\r
+\r
+int avr_target_create(struct target_s *target, Jim_Interp *interp)\r
+{\r
+       avr_common_t *avr = calloc(1, sizeof(avr_common_t));\r
+       \r
+       avr->jtag_info.tap = target->tap;\r
+       target->arch_info = avr;\r
+       \r
+       return ERROR_OK;\r
+}\r
+\r
+int avr_init_target(struct command_context_s *cmd_ctx, struct target_s *target)\r
+{\r
+       LOG_DEBUG(__FUNCTION__);\r
+       return ERROR_OK;\r
+}\r
+\r
+int avr_quit(void)\r
+{\r
+       LOG_DEBUG(__FUNCTION__);\r
+       return ERROR_OK;\r
+}\r
+\r
+int avr_arch_state(struct target_s *target)\r
+{\r
+       LOG_DEBUG(__FUNCTION__);\r
+       return ERROR_OK;\r
+}\r
+\r
+int avr_poll(target_t *target)\r
+{\r
+       if ((target->state == TARGET_RUNNING) || (target->state == TARGET_DEBUG_RUNNING))\r
+       {\r
+               target->state = TARGET_HALTED;\r
+       }\r
+       \r
+       LOG_DEBUG(__FUNCTION__);\r
+       return ERROR_OK;\r
+}\r
+\r
+int avr_halt(target_t *target)\r
+{\r
+       LOG_DEBUG(__FUNCTION__);\r
+       return ERROR_OK;\r
+}\r
+\r
+int avr_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution)\r
+{\r
+       LOG_DEBUG(__FUNCTION__);\r
+       return ERROR_OK;\r
+}\r
+\r
+int avr_step(struct target_s *target, int current, u32 address, int handle_breakpoints)\r
+{\r
+       LOG_DEBUG(__FUNCTION__);\r
+       return ERROR_OK;\r
+}\r
+\r
+int avr_assert_reset(target_t *target)\r
+{\r
+       target->state = TARGET_RESET;\r
+       \r
+       LOG_DEBUG(__FUNCTION__);\r
+       return ERROR_OK;\r
+}\r
+\r
+int avr_deassert_reset(target_t *target)\r
+{\r
+       target->state = TARGET_RUNNING;\r
+       \r
+       LOG_DEBUG(__FUNCTION__);\r
+       return ERROR_OK;\r
+}\r
+\r
+int avr_soft_reset_halt(struct target_s *target)\r
+{\r
+       LOG_DEBUG(__FUNCTION__);\r
+       return ERROR_OK;\r
+}\r
+\r
+int avr_jtag_senddat(jtag_tap_t *tap, u32* dr_in, u32 dr_out, int len)\r
+{\r
+       return mcu_write_dr_u32(tap, dr_in, dr_out, len, 1);\r
+}\r
+\r
+int avr_jtag_sendinstr(jtag_tap_t *tap, u8 *ir_in, u8 ir_out)\r
+{\r
+       return mcu_write_ir_u8(tap, ir_in, ir_out, AVR_JTAG_INS_LEN, 1);\r
+}\r
+\r
+/* IR and DR functions */\r
+int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti)\r
+{\r
+       if (NULL == tap)\r
+       {\r
+               LOG_ERROR("invalid tap");\r
+               return ERROR_FAIL;\r
+       }\r
+       if (ir_len != tap->ir_length)\r
+       {\r
+               LOG_ERROR("invalid ir_len");\r
+               return ERROR_FAIL;\r
+       }\r
+       \r
+       {\r
+               scan_field_t field[1];\r
+               \r
+               field[0].tap = tap;\r
+               field[0].num_bits = tap->ir_length;\r
+               field[0].out_value = ir_out;\r
+               field[0].out_mask = NULL;\r
+               field[0].in_value = ir_in;\r
+               field[0].in_check_value = NULL;\r
+               field[0].in_check_mask = NULL;\r
+               field[0].in_handler = NULL;\r
+               field[0].in_handler_priv = NULL;\r
+               jtag_add_plain_ir_scan(sizeof(field) / sizeof(field[0]), field, TAP_IDLE);\r
+       }\r
+       \r
+       return ERROR_OK;\r
+}\r
+\r
+int mcu_write_dr(jtag_tap_t *tap, u8 *dr_in, u8 *dr_out, int dr_len, int rti)\r
+{\r
+       if (NULL == tap)\r
+       {\r
+               LOG_ERROR("invalid tap");\r
+               return ERROR_FAIL;\r
+       }\r
+       \r
+       {\r
+               scan_field_t field[1];\r
+               \r
+               field[0].tap = tap;\r
+               field[0].num_bits = dr_len;\r
+               field[0].out_value = dr_out;\r
+               field[0].out_mask = NULL;\r
+               field[0].in_value = dr_in;\r
+               field[0].in_check_value = NULL;\r
+               field[0].in_check_mask = NULL;\r
+               field[0].in_handler = NULL;\r
+               field[0].in_handler_priv = NULL;\r
+               jtag_add_plain_dr_scan(sizeof(field) / sizeof(field[0]), field, TAP_IDLE);\r
+       }\r
+       \r
+       return ERROR_OK;\r
+}\r
+\r
+int mcu_write_ir_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int ir_len, int rti)\r
+{\r
+       if (ir_len > 8)\r
+       {\r
+               LOG_ERROR("ir_len overflow, maxium is 8");\r
+               return ERROR_FAIL;\r
+       }\r
+       \r
+       mcu_write_ir(tap, ir_in, &ir_out, ir_len, rti);\r
+       \r
+       return ERROR_OK;\r
+}\r
+\r
+int mcu_write_dr_u8(jtag_tap_t *tap, u8 *dr_in, u8 dr_out, int dr_len, int rti)\r
+{\r
+       if (dr_len > 8)\r
+       {\r
+               LOG_ERROR("dr_len overflow, maxium is 8");\r
+               return ERROR_FAIL;\r
+       }\r
+       \r
+       mcu_write_dr(tap, dr_in, &dr_out, dr_len, rti);\r
+       \r
+       return ERROR_OK;\r
+}\r
+\r
+int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti)\r
+{\r
+       if (ir_len > 16)\r
+       {\r
+               LOG_ERROR("ir_len overflow, maxium is 16");\r
+               return ERROR_FAIL;\r
+       }\r
+       \r
+       mcu_write_ir(tap, (u8*)ir_in, (u8*)&ir_out, ir_len, rti);\r
+       \r
+       return ERROR_OK;\r
+}\r
+\r
+int mcu_write_dr_u16(jtag_tap_t *tap, u16 *dr_in, u16 dr_out, int dr_len, int rti)\r
+{\r
+       if (dr_len > 16)\r
+       {\r
+               LOG_ERROR("dr_len overflow, maxium is 16");\r
+               return ERROR_FAIL;\r
+       }\r
+       \r
+       mcu_write_dr(tap, (u8*)dr_in, (u8*)&dr_out, dr_len, rti);\r
+       \r
+       return ERROR_OK;\r
+}\r
+\r
+int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti)\r
+{\r
+       if (ir_len > 32)\r
+       {\r
+               LOG_ERROR("ir_len overflow, maxium is 32");\r
+               return ERROR_FAIL;\r
+       }\r
+       \r
+       mcu_write_ir(tap, (u8*)ir_in, (u8*)&ir_out, ir_len, rti);\r
+       \r
+       return ERROR_OK;\r
+}\r
+\r
+int mcu_write_dr_u32(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int dr_len, int rti)\r
+{\r
+       if (dr_len > 32)\r
+       {\r
+               LOG_ERROR("dr_len overflow, maxium is 32");\r
+               return ERROR_FAIL;\r
+       }\r
+       \r
+       mcu_write_dr(tap, (u8*)dr_in, (u8*)&dr_out, dr_len, rti);\r
+       \r
+       return ERROR_OK;\r
+}\r
+\r
+int mcu_execute_queue(void)\r
+{\r
+       return jtag_execute_queue();\r
+}\r

diff --git a/src/target/avrt.h b/src/target/avrt.h
new file mode 100644 (file)
index 0000000..fccba44
--- /dev/null
+++ b/src/target/avrt.h
@@ -0,0 +1,33 @@
+/***************************************************************************\r
+ *   Copyright (C) 2009 by Simon Qian                                      *\r
+ *   SimonQian@SimonQian.com                                               *\r
+ *                                                                         *\r
+ *   This program is free software; you can redistribute it and/or modify  *\r
+ *   it under the terms of the GNU General Public License as published by  *\r
+ *   the Free Software Foundation; either version 2 of the License, or     *\r
+ *   (at your option) any later version.                                   *\r
+ *                                                                         *\r
+ *   This program is distributed in the hope that it will be useful,       *\r
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *\r
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *\r
+ *   GNU General Public License for more details.                          *\r
+ *                                                                         *\r
+ *   You should have received a copy of the GNU General Public License     *\r
+ *   along with this program; if not, write to the                         *\r
+ *   Free Software Foundation, Inc.,                                       *\r
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *\r
+ ***************************************************************************/\r
+#ifndef AVRT_H\r
+#define AVRT_H\r
+\r
+typedef struct mcu_jtag_s\r
+{\r
+       jtag_tap_t *tap;\r
+} mcu_jtag_t;\r
+\r
+typedef struct avr_common_s\r
+{\r
+       mcu_jtag_t jtag_info;\r
+} avr_common_t;\r
+\r
+#endif /* AVRT_H */\r

diff --git a/src/target/target.c b/src/target/target.c
index 39b603a29bbe44b94044d4e52fe01b0e06bedf49..0b058aeb01062e106bab0d983e6ebd71c51824c3 100644 (file)
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -105,6 +105,7 @@ extern target_type_t xscale_target;
 extern target_type_t cortexm3_target;
 extern target_type_t arm11_target;
 extern target_type_t mips_m4k_target;
+extern target_type_t avr_target;
 
 target_type_t *target_types[] =
 {
@@ -119,6 +120,7 @@ target_type_t *target_types[] =
        &cortexm3_target,
        &arm11_target,
        &mips_m4k_target,
+       &avr_target,
        NULL,
 };