SimonQian <simonqian@simonqian.com> AVR wip
[openocd.git] / src / flash / avrf.c
1 /***************************************************************************
2 * Copyright (C) 2009 by Simon Qian *
3 * SimonQian@SimonQian.com *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20 #ifdef HAVE_CONFIG_H
21 #include "config.h"
22 #endif
23
24 #include "replacements.h"
25
26 #include "avrf.h"
27 #include "avrt.h"
28 #include "flash.h"
29 #include "target.h"
30 #include "log.h"
31 #include "algorithm.h"
32 #include "binarybuffer.h"
33
34 #include <stdlib.h>
35 #include <string.h>
36
37 /* AVR_JTAG_Instructions */
38 #define AVR_JTAG_INS_LEN 4
39 // Public Instructions:
40 #define AVR_JTAG_INS_EXTEST 0x00
41 #define AVR_JTAG_INS_IDCODE 0x01
42 #define AVR_JTAG_INS_SAMPLE_PRELOAD 0x02
43 #define AVR_JTAG_INS_BYPASS 0x0F
44 // AVR Specified Public Instructions:
45 #define AVR_JTAG_INS_AVR_RESET 0x0C
46 #define AVR_JTAG_INS_PROG_ENABLE 0x04
47 #define AVR_JTAG_INS_PROG_COMMANDS 0x05
48 #define AVR_JTAG_INS_PROG_PAGELOAD 0x06
49 #define AVR_JTAG_INS_PROG_PAGEREAD 0x07
50
51 // Data Registers:
52 #define AVR_JTAG_REG_Bypass_Len 1
53 #define AVR_JTAG_REG_DeviceID_Len 32
54
55 #define AVR_JTAG_REG_Reset_Len 1
56 #define AVR_JTAG_REG_JTAGID_Len 32
57 #define AVR_JTAG_REG_ProgrammingEnable_Len 16
58 #define AVR_JTAG_REG_ProgrammingCommand_Len 15
59 #define AVR_JTAG_REG_FlashDataByte_Len 16
60
61 avrf_type_t avft_chips_info[] =
62 {
63 // name, chip_id, flash_page_size, flash_page_num, eeprom_page_size, eeprom_page_num
64 {"atmega128", 0x9702, 256, 512, 8, 512},
65 };
66
67 static int avrf_register_commands(struct command_context_s *cmd_ctx);
68 static int avrf_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
69 static int avrf_erase(struct flash_bank_s *bank, int first, int last);
70 static int avrf_protect(struct flash_bank_s *bank, int set, int first, int last);
71 static int avrf_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
72 static int avrf_probe(struct flash_bank_s *bank);
73 static int avrf_auto_probe(struct flash_bank_s *bank);
74 //static int avrf_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
75 static int avrf_protect_check(struct flash_bank_s *bank);
76 static int avrf_info(struct flash_bank_s *bank, char *buf, int buf_size);
77
78 static int avrf_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
79
80 extern int avr_jtag_sendinstr(jtag_tap_t *tap, u8 *ir_in, u8 ir_out);
81 extern int avr_jtag_senddat(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int len);
82
83 extern int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti);
84 extern int mcu_write_dr(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int dr_len, int rti);
85 extern int mcu_write_ir_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int ir_len, int rti);
86 extern int mcu_write_dr_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int dr_len, int rti);
87 extern int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti);
88 extern int mcu_write_dr_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int dr_len, int rti);
89 extern int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti);
90 extern int mcu_write_dr_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int dr_len, int rti);
91 extern int mcu_execute_queue(void);
92
93 flash_driver_t avr_flash =
94 {
95 .name = "avr",
96 .register_commands = avrf_register_commands,
97 .flash_bank_command = avrf_flash_bank_command,
98 .erase = avrf_erase,
99 .protect = avrf_protect,
100 .write = avrf_write,
101 .probe = avrf_probe,
102 .auto_probe = avrf_auto_probe,
103 .erase_check = default_flash_mem_blank_check,
104 .protect_check = avrf_protect_check,
105 .info = avrf_info
106 };
107
108 /* avr program functions */
109 static int avr_jtag_reset(avr_common_t *avr, u32 reset)
110 {
111 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
112 avr_jtag_senddat(avr->jtag_info.tap, NULL, reset ,AVR_JTAG_REG_Reset_Len);
113
114 return ERROR_OK;
115 }
116
117 static int avr_jtag_read_jtagid(avr_common_t *avr, u32 *id)
118 {
119 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
120 avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
121
122 return ERROR_OK;
123 }
124
125 static int avr_jtagprg_enterprogmode(avr_common_t *avr)
126 {
127 avr_jtag_reset(avr, 1);
128
129 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
130 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
131
132 return ERROR_OK;
133 }
134
135 static int avr_jtagprg_leaveprogmode(avr_common_t *avr)
136 {
137 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
138 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
139 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
140
141 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
142 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
143
144 avr_jtag_reset(avr, 0);
145
146 return ERROR_OK;
147 }
148
149 static int avr_jtagprg_chiperase(avr_common_t *avr)
150 {
151 u32 poll_value;
152
153 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
154 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
155 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
156 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
157 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
158
159 do{
160 poll_value = 0;
161 avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
162 if (ERROR_OK != mcu_execute_queue())
163 {
164 return ERROR_FAIL;
165 }
166 LOG_DEBUG("poll_value = 0x%04X", poll_value);
167 }while(!(poll_value & 0x0200));
168
169 return ERROR_OK;
170 }
171
172 static int avr_jtagprg_writeflashpage(avr_common_t *avr, u8 *page_buf, u32 buf_size, u32 addr, u32 page_size)
173 {
174 u32 i, poll_value;
175
176 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
177 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
178
179 // load addr high byte
180 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0700 | ((addr >> 9) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);
181
182 // load addr low byte
183 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0300 | ((addr >> 1) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);
184
185 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
186
187 for (i = 0; i < page_size; i++)
188 {
189 if (i < buf_size)
190 {
191 avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
192 }
193 else
194 {
195 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
196 }
197 }
198
199 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
200
201 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
202 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
203 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
204 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
205
206 do{
207 poll_value = 0;
208 avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
209 if (ERROR_OK != mcu_execute_queue())
210 {
211 return ERROR_FAIL;
212 }
213 LOG_DEBUG("poll_value = 0x%04X", poll_value);
214 }while(!(poll_value & 0x0200));
215
216 return ERROR_OK;
217 }
218
219 /* interface command */
220 static int avrf_register_commands(struct command_context_s *cmd_ctx)
221 {
222 command_t *avr_cmd = register_command(cmd_ctx, NULL, "avr", NULL, COMMAND_ANY, "avr flash specific commands");
223
224 register_command(cmd_ctx, avr_cmd, "mass_erase", avrf_handle_mass_erase_command, COMMAND_EXEC,
225 "mass erase device");
226
227 return ERROR_OK;
228 }
229
230 static int avrf_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
231 {
232 avrf_flash_bank_t *avrf_info;
233
234 if (argc < 6)
235 {
236 LOG_WARNING("incomplete flash_bank avr configuration");
237 return ERROR_FLASH_BANK_INVALID;
238 }
239
240 avrf_info = malloc(sizeof(avrf_flash_bank_t));
241 bank->driver_priv = avrf_info;
242
243 avrf_info->probed = 0;
244
245 return ERROR_OK;
246 }
247
248 static int avrf_erase(struct flash_bank_s *bank, int first, int last)
249 {
250 LOG_INFO(__FUNCTION__);
251 return ERROR_OK;
252 }
253
254 static int avrf_protect(struct flash_bank_s *bank, int set, int first, int last)
255 {
256 LOG_INFO(__FUNCTION__);
257 return ERROR_OK;
258 }
259
260 static int avrf_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
261 {
262 target_t *target = bank->target;
263 avr_common_t *avr = target->arch_info;
264 u32 cur_size, cur_buffer_size, page_size;
265
266 if (bank->target->state != TARGET_HALTED)
267 {
268 LOG_ERROR("Target not halted");
269 return ERROR_TARGET_NOT_HALTED;
270 }
271
272 page_size = bank->sectors[0].size;
273 if ((offset % page_size) != 0)
274 {
275 LOG_WARNING("offset 0x%x breaks required %d-byte alignment", offset, page_size);
276 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
277 }
278
279 LOG_DEBUG("offset is 0x%08X", offset);
280 LOG_DEBUG("count is %d", count);
281
282 if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
283 {
284 return ERROR_FAIL;
285 }
286
287 cur_size = 0;
288 while(count > 0)
289 {
290 if (count > page_size)
291 {
292 cur_buffer_size = page_size;
293 }
294 else
295 {
296 cur_buffer_size = count;
297 }
298 avr_jtagprg_writeflashpage(avr, buffer + cur_size, cur_buffer_size, offset + cur_size, page_size);
299 count -= cur_buffer_size;
300 cur_size += cur_buffer_size;
301
302 keep_alive();
303 }
304
305 return avr_jtagprg_leaveprogmode(avr);
306 }
307
308 #define EXTRACT_MFG(X) (((X) & 0xffe) >> 1)
309 #define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
310 #define EXTRACT_VER(X) (((X) & 0xf0000000) >> 28)
311 static int avrf_probe(struct flash_bank_s *bank)
312 {
313 target_t *target = bank->target;
314 avrf_flash_bank_t *avrf_info = bank->driver_priv;
315 avr_common_t *avr = target->arch_info;
316 avrf_type_t *avr_info;
317 int i;
318 u32 device_id;
319
320 if (bank->target->state != TARGET_HALTED)
321 {
322 LOG_ERROR("Target not halted");
323 return ERROR_TARGET_NOT_HALTED;
324 }
325
326 avrf_info->probed = 0;
327
328 avr_jtag_read_jtagid(avr, &device_id);
329 if (ERROR_OK != mcu_execute_queue())
330 {
331 return ERROR_FAIL;
332 }
333
334 LOG_INFO( "device id = 0x%08x", device_id );
335 if (EXTRACT_MFG(device_id) != 0x1F)
336 {
337 LOG_ERROR("0x%X is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
338 }
339
340 for (i = 0; i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])); i++)
341 {
342 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))
343 {
344 avr_info = &avft_chips_info[i];
345 LOG_INFO("target device is %s", avr_info->name);
346 break;
347 }
348 }
349
350 if (i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])))
351 {
352 // chip found
353 bank->base = 0x00000000;
354 bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
355 bank->num_sectors = avr_info->flash_page_num;
356 bank->sectors = malloc(sizeof(flash_sector_t) * avr_info->flash_page_num);
357
358 for (i = 0; i < avr_info->flash_page_num; i++)
359 {
360 bank->sectors[i].offset = i * avr_info->flash_page_size;
361 bank->sectors[i].size = avr_info->flash_page_size;
362 bank->sectors[i].is_erased = -1;
363 bank->sectors[i].is_protected = 1;
364 }
365
366 avrf_info->probed = 1;
367 return ERROR_OK;
368 }
369 else
370 {
371 // chip not supported
372 LOG_ERROR("0x%X is not support for avr", EXTRACT_PART(device_id));
373
374 avrf_info->probed = 1;
375 return ERROR_FAIL;
376 }
377 }
378
379 static int avrf_auto_probe(struct flash_bank_s *bank)
380 {
381 avrf_flash_bank_t *avrf_info = bank->driver_priv;
382 if (avrf_info->probed)
383 return ERROR_OK;
384 return avrf_probe(bank);
385 }
386
387 static int avrf_protect_check(struct flash_bank_s *bank)
388 {
389 LOG_INFO(__FUNCTION__);
390 return ERROR_OK;
391 }
392
393 static int avrf_info(struct flash_bank_s *bank, char *buf, int buf_size)
394 {
395 target_t *target = bank->target;
396 avr_common_t *avr = target->arch_info;
397 avrf_type_t *avr_info;
398 int i;
399 u32 device_id;
400
401 if (bank->target->state != TARGET_HALTED)
402 {
403 LOG_ERROR("Target not halted");
404 return ERROR_TARGET_NOT_HALTED;
405 }
406
407 avr_jtag_read_jtagid(avr, &device_id);
408 if (ERROR_OK != mcu_execute_queue())
409 {
410 return ERROR_FAIL;
411 }
412
413 LOG_INFO( "device id = 0x%08x", device_id );
414 if (EXTRACT_MFG(device_id) != 0x1F)
415 {
416 LOG_ERROR("0x%X is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
417 }
418
419 for (i = 0; i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])); i++)
420 {
421 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))
422 {
423 avr_info = &avft_chips_info[i];
424 LOG_INFO("target device is %s", avr_info->name);
425
426 return ERROR_OK;
427 }
428 }
429
430 if (i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])))
431 {
432 // chip found
433 snprintf(buf, buf_size, "%s - Rev: 0x%X", avr_info->name, EXTRACT_VER(device_id));
434 return ERROR_OK;
435 }
436 else
437 {
438 // chip not supported
439 snprintf(buf, buf_size, "Cannot identify target as a avr\n");
440 return ERROR_FLASH_OPERATION_FAILED;
441 }
442 }
443
444 static int avrf_mass_erase(struct flash_bank_s *bank)
445 {
446 target_t *target = bank->target;
447 avr_common_t *avr = target->arch_info;
448
449 if (target->state != TARGET_HALTED)
450 {
451 LOG_ERROR("Target not halted");
452 return ERROR_TARGET_NOT_HALTED;
453 }
454
455 if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
456 || (ERROR_OK != avr_jtagprg_chiperase(avr))
457 || (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
458 {
459 return ERROR_FAIL;
460 }
461
462 return ERROR_OK;
463 }
464
465 static int avrf_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
466 {
467 flash_bank_t *bank;
468 int i;
469
470 if (argc < 1)
471 {
472 command_print(cmd_ctx, "avr mass_erase <bank>");
473 return ERROR_OK;
474 }
475
476 bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
477 if (!bank)
478 {
479 command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
480 return ERROR_OK;
481 }
482
483 if (avrf_mass_erase(bank) == ERROR_OK)
484 {
485 /* set all sectors as erased */
486 for (i = 0; i < bank->num_sectors; i++)
487 {
488 bank->sectors[i].is_erased = 1;
489 }
490
491 command_print(cmd_ctx, "avr mass erase complete");
492 }
493 else
494 {
495 command_print(cmd_ctx, "avr mass erase failed");
496 }
497
498 LOG_DEBUG(__FUNCTION__);
499 return ERROR_OK;
500 }

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)