case 2 << 2:
LOG_DEBUG("main area readed with more than 1 (incorrectable) error");
return ERROR_NAND_OPERATION_FAILED;
- break;
}
switch (ecc_status & 0x0003) {
case 1:
case 2:
LOG_DEBUG("main area readed with more than 1 (incorrectable) error");
return ERROR_NAND_OPERATION_FAILED;
- break;
}
}
break;
case 2 << 2:
LOG_INFO("main area read with more than 1 (incorrectable) error");
return ERROR_NAND_OPERATION_FAILED;
- break;
}
switch (ecc_status & 0x0003) {
case 1:
case 2:
LOG_INFO("main area read with more than 1 (incorrectable) error");
return ERROR_NAND_OPERATION_FAILED;
- break;
}
return ERROR_OK;
}
switch (choice) {
case 0:
return aducm360_write_block_sync(bank, buffer, offset, count);
- break;
case 1:
return aducm360_write_block_async(bank, buffer, offset, count);
- break;
default:
LOG_ERROR("aducm360_write_block was cancelled (no writing method was chosen)!");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
((unsigned int)(FLASH_BANK1_BASE_256K_AX)),
((unsigned int)(FLASH_BANK1_BASE_512K_AX)));
return ERROR_FAIL;
- break;
/* at91sam3s and at91sam3n series only has bank 0*/
/* at91sam3u and at91sam3ax series has the same address for bank 0*/
switch (CMD_ARGC) {
default:
return ERROR_COMMAND_SYNTAX_ERROR;
- break;
case 0:
goto showall;
- break;
case 1:
who = -1;
break;
/* error */
command_print(CMD, "Too many parameters");
return ERROR_COMMAND_SYNTAX_ERROR;
- break;
}
command_print(CMD, "Slowclk freq: %d.%03dkhz",
(int)(pChip->cfg.slow_freq / 1000),
((unsigned int)(bank->base)),
((unsigned int)(FLASH_BANK_BASE_S)));
return ERROR_FAIL;
- break;
/* at91sam4s series only has bank 0*/
/* at91sam4sd series has the same address for bank 0 (FLASH_BANK0_BASE_SD)*/
switch (CMD_ARGC) {
default:
return ERROR_COMMAND_SYNTAX_ERROR;
- break;
case 0:
goto showall;
- break;
case 1:
who = -1;
break;
/* error */
command_print(CMD, "Too many parameters");
return ERROR_COMMAND_SYNTAX_ERROR;
- break;
}
command_print(CMD, "Slowclk freq: %d.%03dkhz",
(int)(pChip->cfg.slow_freq / 1000),
default:
LOG_ERROR("unrecognized flash size code: %d", nvm_size_code);
return ERROR_FAIL;
- break;
}
struct samv_flash_bank *samv_info = bank->driver_priv;
switch (CMD_ARGC) {
case 0:
goto showall;
- break;
case 1:
who = -1;
break;
break;
default:
return ERROR_COMMAND_SYNTAX_ERROR;
- break;
}
uint32_t v;
case 1:
case 3:
return cfi_intel_erase(bank, first, last);
- break;
case 2:
return cfi_spansion_erase(bank, first, last);
- break;
default:
LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
break;
case 1:
case 3:
return cfi_intel_protect(bank, set, first, last);
- break;
default:
LOG_WARNING("protect: cfi primary command set %i unsupported", cfi_info->pri_id);
return ERROR_OK;
switch (bank->bus_width) {
case 1:
return buf[0];
- break;
case 2:
return target_buffer_get_u16(target, buf);
- break;
case 4:
return target_buffer_get_u32(target, buf);
- break;
default:
LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes",
bank->bus_width);
case 1:
case 3:
return cfi_intel_write_word(bank, word, address);
- break;
case 2:
return cfi_spansion_write_word(bank, word, address);
- break;
default:
LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
break;
case 1:
case 3:
return cfi_intel_write_words(bank, word, wordcount, address);
- break;
case 2:
return cfi_spansion_write_words(bank, word, wordcount, address);
- break;
default:
LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
break;
case 1:
case 3:
return cfi_intel_protect_check(bank);
- break;
case 2:
return cfi_spansion_protect_check(bank);
- break;
default:
LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
break;
switch (protection) {
case PROTECTION_VIRGIN:
return "VIRGIN";
- break;
case PROTECTION_NORMAL:
return "NORMAL";
- break;
case PROTECTION_SECURE:
return "SECURE";
- break;
case PROTECTION_DEAD:
return "DEAD";
- break;
case PROTECTION_UNKNOWN:
default:
return "UNKNOWN";
- break;
}
}
default:
LOG_ERROR("Unknown flash device ID 0x%X", id);
return ERROR_FAIL;
- break;
}
bank->sectors = malloc(bank->num_sectors * sizeof(struct flash_sector));
switch (h->transport) {
case HL_TRANSPORT_SWIM:
return stlink_speed_swim(handle, khz, query);
- break;
case HL_TRANSPORT_SWD:
if (h->version.jtag_api == STLINK_JTAG_API_V3)
return stlink_speed_v3(handle, false, khz, query);
switch (id) {
case CMD_SCAN_IN:
return "CMD_SCAN_IN";
- break;
case CMD_SLOW_SCAN_IN:
return "CMD_SLOW_SCAN_IN";
- break;
case CMD_SCAN_OUT:
return "CMD_SCAN_OUT";
- break;
case CMD_SLOW_SCAN_OUT:
return "CMD_SLOW_SCAN_OUT";
- break;
case CMD_SCAN_IO:
return "CMD_SCAN_IO";
- break;
case CMD_SLOW_SCAN_IO:
return "CMD_SLOW_SCAN_IO";
- break;
case CMD_CLOCK_TMS:
return "CMD_CLOCK_TMS";
- break;
case CMD_SLOW_CLOCK_TMS:
return "CMD_SLOW_CLOCK_TMS";
- break;
case CMD_CLOCK_TCK:
return "CMD_CLOCK_TCK";
- break;
case CMD_SLOW_CLOCK_TCK:
return "CMD_SLOW_CLOCK_TCK";
- break;
case CMD_SLEEP_US:
return "CMD_SLEEP_US";
- break;
case CMD_SLEEP_MS:
return "CMD_SLEEP_MS";
- break;
case CMD_GET_SIGNALS:
return "CMD_GET_SIGNALS";
- break;
case CMD_SET_SIGNALS:
return "CMD_SET_SIGNALS";
- break;
case CMD_CONFIGURE_TCK_FREQ:
return "CMD_CONFIGURE_TCK_FREQ";
- break;
case CMD_SET_LEDS:
return "CMD_SET_LEDS";
- break;
case CMD_TEST:
return "CMD_TEST";
- break;
default:
return "CMD_UNKNOWN";
- break;
}
}
case PIOMAP:
LOG_ERROR("PIO and PIOMAP are not supported");
return ERROR_FAIL;
- break;
case RUNTEST:
/* RUNTEST [run_state] run_count run_clk [min_time SEC [MAXIMUM max_time
* SEC]] [ENDSTATE end_state] */
default:
LOG_ERROR("invalid svf command: %s", argus[0]);
return ERROR_FAIL;
- break;
}
if (!svf_quiet) {
address, opcode);
}
return ERROR_OK;
- break;
}
} else {
switch (op) {
break;
case ARM_VFP_V3_D0 ... ARM_VFP_V3_D31:
return dpm_read_reg_u64(dpm, r, regnum);
- break;
case ARM_VFP_V3_FPSCR:
/* "VMRS r0, FPSCR"; then return via DCC */
retval = dpm->instr_read_data_r0(dpm,
break;
case ARM_VFP_V3_D0 ... ARM_VFP_V3_D31:
return dpm_write_reg_u64(dpm, r, regnum);
- break;
case ARM_VFP_V3_FPSCR:
/* move to r0 from DCC, then "VMSR FPSCR, r0" */
retval = dpm->instr_write_data_r0(dpm,
(*reg_list)[25] = arm->cpsr;
return ERROR_OK;
- break;
case REG_CLASS_ALL:
switch (arm->core_type) {
}
return ERROR_OK;
- break;
default:
LOG_ERROR("not a valid register class type in query.");
return ERROR_FAIL;
- break;
}
}
break;
case 1:
return avr32_jtag_read_memory8(&ap7k->jtag, address, count, buffer);
- break;
default:
break;
}
break;
case 1:
return avr32_jtag_write_memory8(&ap7k->jtag, address, count, buffer);
- break;
default:
break;
}
return set_field(0, AC_ACCESS_REGISTER_SIZE, 2);
case 64:
return set_field(0, AC_ACCESS_REGISTER_SIZE, 3);
- break;
case 128:
return set_field(0, AC_ACCESS_REGISTER_SIZE, 4);
- break;
default:
LOG_ERROR("Unsupported register width: %d", width);
return 0;
}
Jim_SetResultString(interp, session->name, -1);
return JIM_OK;
- break;
case 2: /* assign */
if (session) {
if (!strcmp(session->name, argv[1]->bytes)) {
LOG_ERROR("Debug adapter doesn't support '%s' transport", argv[1]->bytes);
return JIM_ERR;
- break;
default:
Jim_WrongNumArgs(interp, 1, argv, "[too many parameters]");
return JIM_ERR;