- Fixes '<=' whitespace

- Replace '\(\w\)\(<=\)\(\w\)' with '\1 \2 \3'.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2368 b42882b7-edfa-0310-969c-e2dbd0fdcd60

diff --git a/src/flash/at91sam7.c b/src/flash/at91sam7.c
index 259f01217d7d107dc236f75334e6d7cf340694d3..bb059c06ff7ee48a61b711680100e6fc44007a78 100644 (file)
--- a/src/flash/at91sam7.c
+++ b/src/flash/at91sam7.c
@@ -916,7 +916,7 @@ static int at91sam7_erase(struct flash_bank_s *bank, int first, int last)
        }
 
        /* mark erased sectors */
        }
 
        /* mark erased sectors */

-       for (sec=first; sec<=last; sec++)
+       for (sec=first; sec <= last; sec++)

        {
                bank->sectors[sec].is_erased = 1;
        }
        {
                bank->sectors[sec].is_erased = 1;
        }


@@ -952,7 +952,7 @@ static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int l
        at91sam7_read_clock_info(bank);
        at91sam7_set_flash_mode(bank, FMR_TIMING_NVBITS);
 
        at91sam7_read_clock_info(bank);
        at91sam7_set_flash_mode(bank, FMR_TIMING_NVBITS);
 

-       for (sector=first; sector<=last; sector++)
+       for (sector=first; sector <= last; sector++)

        {
                if (set)
                        cmd = SLB;
        {
                if (set)
                        cmd = SLB;

diff --git a/src/helper/jim.c b/src/helper/jim.c
index e5d2d4dc6e8651c896c56661fa50ee34d532702b..58241d4a60a582f0a7b0660dc96808a68e3956dc 100644 (file)
--- a/src/helper/jim.c
+++ b/src/helper/jim.c
@@ -6955,7 +6955,7 @@ int Jim_EvalExpression(Jim_Interp *interp, Jim_Obj *exprObjPtr,
             case JIM_EXPROP_MUL: wC = wA*wB; break;
             case JIM_EXPROP_LT: wC = wA<wB; break;
             case JIM_EXPROP_GT: wC = wA>wB; break;
             case JIM_EXPROP_MUL: wC = wA*wB; break;
             case JIM_EXPROP_LT: wC = wA<wB; break;
             case JIM_EXPROP_GT: wC = wA>wB; break;

-            case JIM_EXPROP_LTE: wC = wA<=wB; break;
+            case JIM_EXPROP_LTE: wC = wA <= wB; break;

             case JIM_EXPROP_GTE: wC = wA >= wB; break;
             case JIM_EXPROP_LSHIFT: wC = wA<<wB; break;
             case JIM_EXPROP_RSHIFT: wC = wA>>wB; break;
             case JIM_EXPROP_GTE: wC = wA >= wB; break;
             case JIM_EXPROP_LSHIFT: wC = wA<<wB; break;
             case JIM_EXPROP_RSHIFT: wC = wA>>wB; break;


@@ -7060,7 +7060,7 @@ trydouble:
             case JIM_EXPROP_MUL: dC = dA*dB; break;
             case JIM_EXPROP_LT: dC = dA<dB; break;
             case JIM_EXPROP_GT: dC = dA>dB; break;
             case JIM_EXPROP_MUL: dC = dA*dB; break;
             case JIM_EXPROP_LT: dC = dA<dB; break;
             case JIM_EXPROP_GT: dC = dA>dB; break;

-            case JIM_EXPROP_LTE: dC = dA<=dB; break;
+            case JIM_EXPROP_LTE: dC = dA <= dB; break;

             case JIM_EXPROP_GTE: dC = dA >= dB; break;
             case JIM_EXPROP_NUMEQ: dC = dA==dB; break;
             case JIM_EXPROP_NUMNE: dC = dA != dB; break;
             case JIM_EXPROP_GTE: dC = dA >= dB; break;
             case JIM_EXPROP_NUMEQ: dC = dA==dB; break;
             case JIM_EXPROP_NUMNE: dC = dA != dB; break;

diff --git a/src/jtag/bitq.c b/src/jtag/bitq.c
index 1af1be5424ef92fcfc6422bed7902e7fa9f72f6e..65dbb6568efdd93c02a9387a893f964d7a7310fa 100644 (file)
--- a/src/jtag/bitq.c
+++ b/src/jtag/bitq.c
@@ -175,7 +175,7 @@ void bitq_path_move(pathmove_command_t* cmd)
 {
        int i;
 
 {
        int i;
 

-       for (i = 0; i<=cmd->num_states; i++)
+       for (i = 0; i <= cmd->num_states; i++)

        {
                if (tap_state_transition(tap_get_state(), false) == cmd->path[i])
                        bitq_io(0, 0, 0);
        {
                if (tap_state_transition(tap_get_state(), false) == cmd->path[i])
                        bitq_io(0, 0, 0);

diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index 692ab16f6a0e6327cc12278c268bece08b1359e0..985b9f63db84d2ca9e59e1c6ffd6336e163cd6fb 100644 (file)
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -1428,7 +1428,7 @@ int arm7_9_debug_entry(target_t *target)
        if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
                return ERROR_FAIL;
 
        if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
                return ERROR_FAIL;
 

-       for (i=0; i<=15; i++)
+       for (i=0; i <= 15; i++)

        {
                LOG_DEBUG("r%i: 0x%8.8" PRIx32 "", i, context[i]);
                buf_set_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).value, 0, 32, context[i]);
        {
                LOG_DEBUG("r%i: 0x%8.8" PRIx32 "", i, context[i]);
                buf_set_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).value, 0, 32, context[i]);


@@ -2362,7 +2362,7 @@ int arm7_9_read_memory(struct target_s *target, uint32_t address, uint32_t size,
        if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
                return ERROR_FAIL;
 
        if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
                return ERROR_FAIL;
 

-       for (i=0; i<=last_reg; i++)
+       for (i=0; i <= last_reg; i++)

                ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).valid;
 
        arm7_9->read_xpsr(target, &cpsr, 0);
                ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).valid;
 
        arm7_9->read_xpsr(target, &cpsr, 0);


@@ -2545,7 +2545,7 @@ int arm7_9_write_memory(struct target_s *target, uint32_t address, uint32_t size
        if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
                return ERROR_FAIL;
 
        if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
                return ERROR_FAIL;
 

-       for (i=0; i<=last_reg; i++)
+       for (i=0; i <= last_reg; i++)

                ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).valid;
 
        arm7_9->read_xpsr(target, &cpsr, 0);
                ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).valid;
 
        arm7_9->read_xpsr(target, &cpsr, 0);