target/stm32: make APCSW cacheable

[openocd.git] / tcl / target / stm32f2x.cfg

diff --git a/tcl/target/stm32f2x.cfg b/tcl/target/stm32f2x.cfg
index 0095615d004362ca5a16d3ad04a9b351bb1e8650..80f9274d577eac87039a3b1bdf34b0518ae7583f 100644 (file)
--- a/tcl/target/stm32f2x.cfg
+++ b/tcl/target/stm32f2x.cfg
@@ -49,22 +49,14 @@ if { [info exists CPUTAPID] } {
 }
 
 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-if { [info exists BSTAPID] } {
-   set _BSTAPID $BSTAPID
-} else {
-  # See STM Document RM0033
-  # Section 32.6.2
-  # 
-  set _BSTAPID 0x06411041
-}
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 if {[using_jtag]} {
- swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
+       jtag newtap $_CHIPNAME bs -irlen 5
 }
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
@@ -84,8 +76,8 @@ $_TARGETNAME configure -event examine-end {
        mmw 0xE0042004 0x00000007 0
 
        # Stop watchdog counters during halt
-       # DBGMCU_APB1_FZ = DBG_IWDG_STOP | DBG_WWDG_STOP
-       mww 0xE0042008 0x00001800
+       # DBGMCU_APB1_FZ |= DBG_IWDG_STOP | DBG_WWDG_STOP
+       mmw 0xE0042008 0x00001800 0
 }
 
 $_TARGETNAME configure -event trace-config {