reverse order of Jim stack trace output

[openocd.git] / tcl / target / pic32mx.cfg

diff --git a/tcl/target/pic32mx.cfg b/tcl/target/pic32mx.cfg
index daa54eb97b13ad9b1d63d1749e3d1a23e28117e7..202668b88ae57a5ed317f9b9b9fbe104e54c66cc 100644 (file)
--- a/tcl/target/pic32mx.cfg
+++ b/tcl/target/pic32mx.cfg
@@ -14,27 +14,70 @@ if { [info exists ENDIAN] } {
 if { [info exists CPUTAPID ] } {
    set _CPUTAPID $CPUTAPID
 } else {
-  # force an error till we get a good number
+   # force an error till we get a good number
    set _CPUTAPID 0x30938053
 }
 
-jtag_nsrst_delay 100
-jtag_ntrst_delay 100
+# default working area is 16384
+if { [info exists WORKAREASIZE] } {
+   set  _WORKAREASIZE $WORKAREASIZE
+} else {
+   set  _WORKAREASIZE 0x4000
+}
 
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config srst_only
+
+adapter_nsrst_delay 100
+jtag_ntrst_delay 100
 
 #jtag scan chain
 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag newtap $_CHIPNAME cpu -irlen 5  -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
+jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME
 
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0xa0000000 -work-area-size 16384 -work-area-backup 0
+#
+# At reset the pic32mx does not allow code execution from RAM
+# we have to setup the BMX registers to allow this.
+# One limitation is that we loose the first 2k of RAM.
+#
+
+global _PIC32MX_DATASIZE
+global _PIC32MX_PROGSIZE
+set _PIC32MX_DATASIZE 0x800
+set _PIC32MX_PROGSIZE [expr ($_WORKAREASIZE - $_PIC32MX_DATASIZE)]
+
+$_TARGETNAME configure -work-area-phys 0xa0000800 -work-area-size $_PIC32MX_PROGSIZE -work-area-backup 0
+$_TARGETNAME configure -event reset-init {
+       #
+       # from reset the pic32 cannot execute code in ram - enable ram execution
+       # minimum offset from start of ram is 2k
+       #
+
+       global _PIC32MX_DATASIZE
+       global _PIC32MX_PROGSIZE
+
+       # BMXCON
+       mww 0xbf882000 0x001f0040
+       # BMXDKPBA: 2k kernel data @ 0xa0000800
+       mww 0xbf882010 $_PIC32MX_DATASIZE
+       # BMXDUDBA: 16k kernel program @ 0xa0000800
+       mww 0xbf882020 $_PIC32MX_PROGSIZE
+       # BMXDUPBA: 0k user program
+       mww 0xbf882030 $_PIC32MX_PROGSIZE
+}
+
+set _FLASHNAME $_CHIPNAME.flash0
+flash bank $_FLASHNAME pic32mx 0x1fc00000 0 0 0 $_TARGETNAME
+# add virtual banks for kseg0 and kseg1
+flash bank vbank0 virtual 0xbfc00000 0 0 0 $_TARGETNAME $_FLASHNAME
+flash bank vbank1 virtual 0x9fc00000 0 0 0 $_TARGETNAME $_FLASHNAME
 
-flash bank pic32mx 0xbd000000 0 0 0 0
-flash bank pic32mx 0xbfc00000 0 0 0 0
+set _FLASHNAME $_CHIPNAME.flash1
+flash bank $_FLASHNAME pic32mx 0x1d000000 0 0 0 $_TARGETNAME
+# add virtual banks for kseg0 and kseg1
+flash bank vbank2 virtual 0xbd000000 0 0 0 $_TARGETNAME $_FLASHNAME
+flash bank vbank3 virtual 0x9d000000 0 0 0 $_TARGETNAME $_FLASHNAME
 
 # For more information about the configuration files, take a look at:
 # openocd.texi