target/stm32: make APCSW cacheable

[openocd.git] / tcl / target / at91r40008.cfg

diff --git a/tcl/target/at91r40008.cfg b/tcl/target/at91r40008.cfg
index 9c0c4839cef7d79a44ee92d85c0cfaa554f6d6c3..912bd0ea2f8810790d8ff3928c7412b31aa61ff6 100644 (file)
--- a/tcl/target/at91r40008.cfg
+++ b/tcl/target/at91r40008.cfg
@@ -5,19 +5,19 @@ reset_config srst_only srst_pulls_trst
 
 
 if {[info exists CHIPNAME]} {
-   set  _CHIPNAME $CHIPNAME
+   set _CHIPNAME $CHIPNAME
 } else {
-   set  _CHIPNAME at91r40008
+   set _CHIPNAME at91r40008
 }
 
 if { [info exists ENDIAN] } {
-   set  _ENDIAN $ENDIAN
+   set _ENDIAN $ENDIAN
 } else {
-   set  _ENDIAN little
+   set _ENDIAN little
 }
 
 # Setup the JTAG scan chain.
-if { [info exists CPUTAPID ] } {
+if { [info exists CPUTAPID] } {
    set _CPUTAPID $CPUTAPID
 } else {
    set _CPUTAPID 0x1f0f0f0f
@@ -25,5 +25,5 @@ if { [info exists CPUTAPID ] } {
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
 $_TARGETNAME configure -work-area-phys 0x20000 -work-area-size 0x20000 -work-area-backup 0