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ipdbg: fix double free of virtual-ir data
[openocd.git] / src / target / dsp563xx.c
diff --git a/src/target/dsp563xx.c b/src/target/dsp563xx.c
index 1d728dff863a2662af050d773caca41811a42721..80cca1ed5098d7110dcb7e0e8bf64376ec86f8cc 100644 (file)
--- a/src/target/dsp563xx.c
+++ b/src/target/dsp563xx.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
 /***************************************************************************
  *   Copyright (C) 2009-2011 by Mathias Kuester                            *
  *   mkdorg@users.sourceforge.net                                          *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -96,10 +85,10 @@
 /*
  * OBCR Register bit definitions
  */
-#define OBCR_b0_and_b1            ((0x0) << 10)
-#define OBCR_b0_or_b1             ((0x1) << 10)
-#define OBCR_b1_after_b0          ((0x2) << 10)
-#define OBCR_b0_after_b1          ((0x3) << 10)
+#define OBCR_B0_AND_B1            ((0x0) << 10)
+#define OBCR_B0_OR_B1             ((0x1) << 10)
+#define OBCR_B1_AFTER_B0          ((0x2) << 10)
+#define OBCR_B0_AFTER_B1          ((0x3) << 10)
 
 #define OBCR_BP_DISABLED          (0x0)
 #define OBCR_BP_MEM_P             (0x1)
@@ -322,7 +311,7 @@ enum watchpoint_condition {
 #define INSTR_JUMP      0x0AF080
 /* Effective Addressing Mode Encoding */
 #define EAME_R0         0x10
-/* instrcution encoder */
+/* instruction encoder */
 /* movep
  * s - peripheral space X/Y (X=0,Y=1)
  * w - write/read
@@ -384,8 +373,8 @@ static int dsp563xx_read_core_reg(struct target *target, int num)
 
        reg_value = dsp563xx->core_regs[num];
        buf_set_u32(dsp563xx->core_cache->reg_list[num].value, 0, 32, reg_value);
-       dsp563xx->core_cache->reg_list[num].valid = 1;
-       dsp563xx->core_cache->reg_list[num].dirty = 0;
+       dsp563xx->core_cache->reg_list[num].valid = true;
+       dsp563xx->core_cache->reg_list[num].dirty = false;
 
        return ERROR_OK;
 }
@@ -400,8 +389,8 @@ static int dsp563xx_write_core_reg(struct target *target, int num)
 
        reg_value = buf_get_u32(dsp563xx->core_cache->reg_list[num].value, 0, 32);
        dsp563xx->core_regs[num] = reg_value;
-       dsp563xx->core_cache->reg_list[num].valid = 1;
-       dsp563xx->core_cache->reg_list[num].dirty = 0;
+       dsp563xx->core_cache->reg_list[num].valid = true;
+       dsp563xx->core_cache->reg_list[num].dirty = false;
 
        return ERROR_OK;
 }
@@ -432,8 +421,8 @@ static int dsp563xx_set_core_reg(struct reg *reg, uint8_t *buf)
                return ERROR_TARGET_NOT_HALTED;
 
        buf_set_u32(reg->value, 0, reg->size, value);
-       reg->dirty = 1;
-       reg->valid = 1;
+       reg->dirty = true;
+       reg->valid = true;
 
        return ERROR_OK;
 }
@@ -473,8 +462,9 @@ static void dsp563xx_build_reg_cache(struct target *target)
                reg_list[i].name = dsp563xx_regs[i].name;
                reg_list[i].size = 32;  /* dsp563xx_regs[i].bits; */
                reg_list[i].value = calloc(1, 4);
-               reg_list[i].dirty = 0;
-               reg_list[i].valid = 0;
+               reg_list[i].dirty = false;
+               reg_list[i].valid = false;
+               reg_list[i].exist = true;
                reg_list[i].type = &dsp563xx_reg_type;
                reg_list[i].arch_info = &arch_info[i];
        }
@@ -508,7 +498,7 @@ static int dsp563xx_reg_read_high_io(struct target *target, uint32_t instr_mask,
        if (err != ERROR_OK)
                return err;
        /* r0 is no longer valid on target */
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R0].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R0].dirty = true;
 
        return ERROR_OK;
 }
@@ -534,7 +524,7 @@ static int dsp563xx_reg_write_high_io(struct target *target, uint32_t instr_mask
                return err;
 
        /* r0 is no longer valid on target */
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R0].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R0].dirty = true;
 
        return ERROR_OK;
 }
@@ -745,7 +735,7 @@ static int dsp563xx_read_register(struct target *target, int num, int force)
        struct dsp563xx_core_reg *arch_info;
 
        if (force)
-               dsp563xx->core_cache->reg_list[num].valid = 0;
+               dsp563xx->core_cache->reg_list[num].valid = false;
 
        if (!dsp563xx->core_cache->reg_list[num].valid) {
                arch_info = dsp563xx->core_cache->reg_list[num].arch_info;
@@ -795,7 +785,7 @@ static int dsp563xx_write_register(struct target *target, int num, int force)
        struct dsp563xx_core_reg *arch_info;
 
        if (force)
-               dsp563xx->core_cache->reg_list[num].dirty = 1;
+               dsp563xx->core_cache->reg_list[num].dirty = true;
 
        if (dsp563xx->core_cache->reg_list[num].dirty) {
                arch_info = dsp563xx->core_cache->reg_list[num].arch_info;
@@ -884,8 +874,8 @@ static void dsp563xx_invalidate_x_context(struct target *target,
 
                if ((arch_info->instr_mask >= addr_start) &&
                        (arch_info->instr_mask <= addr_end)) {
-                       dsp563xx->core_cache->reg_list[i].valid = 0;
-                       dsp563xx->core_cache->reg_list[i].dirty = 0;
+                       dsp563xx->core_cache->reg_list[i].valid = false;
+                       dsp563xx->core_cache->reg_list[i].dirty = false;
                }
        }
 }
@@ -912,7 +902,7 @@ static int dsp563xx_init_target(struct command_context *cmd_ctx, struct target *
        dsp563xx_build_reg_cache(target);
        struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
 
-       dsp563xx->hardware_breakpoints_cleared = 0;
+       dsp563xx->hardware_breakpoints_cleared = false;
        dsp563xx->hardware_breakpoint[0].used = BPU_NONE;
 
        return ERROR_OK;
@@ -922,7 +912,7 @@ static int dsp563xx_examine(struct target *target)
 {
        uint32_t chip;
 
-       if (target->tap->hasidcode == false) {
+       if (!target->tap->has_idcode) {
                LOG_ERROR("no IDCODE present on device");
                return ERROR_COMMAND_SYNTAX_ERROR;
        }
@@ -936,7 +926,7 @@ static int dsp563xx_examine(struct target *target)
                if (((chip>>5)&0x1f) == 0)
                        chip += 300;
 
-               LOG_INFO("DSP56%03" PRId32 " device found", chip);
+               LOG_INFO("DSP56%03" PRIu32 " device found", chip);
 
                /* Clear all breakpoints */
                dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OBCR, 0);
@@ -985,7 +975,7 @@ static int dsp563xx_debug_init(struct target *target)
                err = dsp563xx_once_execute_dw_ir(target->tap, 1, arch_info->instr_mask, sr);
                if (err != ERROR_OK)
                        return err;
-               dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_SR].dirty = 1;
+               dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_SR].dirty = true;
        }
 
        err = dsp563xx_read_register(target, DSP563XX_REG_IDX_N0, 0);
@@ -1007,7 +997,7 @@ static int dsp563xx_debug_init(struct target *target)
                if (err != ERROR_OK)
                        return err;
        }
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_N0].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_N0].dirty = true;
 
        if (dsp563xx->core_regs[DSP563XX_REG_IDX_N1] != 0x000000) {
                arch_info = dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_N1].arch_info;
@@ -1015,7 +1005,7 @@ static int dsp563xx_debug_init(struct target *target)
                if (err != ERROR_OK)
                        return err;
        }
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_N1].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_N1].dirty = true;
 
        if (dsp563xx->core_regs[DSP563XX_REG_IDX_M0] != 0xffffff) {
                arch_info = dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_M0].arch_info;
@@ -1023,7 +1013,7 @@ static int dsp563xx_debug_init(struct target *target)
                if (err != ERROR_OK)
                        return err;
        }
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_M0].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_M0].dirty = true;
 
        if (dsp563xx->core_regs[DSP563XX_REG_IDX_M1] != 0xffffff) {
                arch_info = dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_M1].arch_info;
@@ -1031,7 +1021,7 @@ static int dsp563xx_debug_init(struct target *target)
                if (err != ERROR_OK)
                        return err;
        }
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_M1].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_M1].dirty = true;
 
        err = dsp563xx_save_context(target);
        if (err != ERROR_OK)
@@ -1084,9 +1074,18 @@ static int dsp563xx_poll(struct target *target)
 
        if (!dsp563xx->hardware_breakpoints_cleared) {
                err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OBCR, 0);
+               if (err != ERROR_OK)
+                       return err;
+
                err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OMLR0, 0);
+               if (err != ERROR_OK)
+                       return err;
+
                err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OMLR1, 0);
-               dsp563xx->hardware_breakpoints_cleared = 1;
+               if (err != ERROR_OK)
+                       return err;
+
+               dsp563xx->hardware_breakpoints_cleared = true;
        }
 
        return ERROR_OK;
@@ -1297,7 +1296,7 @@ static int dsp563xx_step(struct target *target,
        struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
 
        if (target->state != TARGET_HALTED) {
-               LOG_WARNING("target not halted");
+               LOG_TARGET_ERROR(target, "not halted");
                return ERROR_TARGET_NOT_HALTED;
        }
 
@@ -1358,7 +1357,7 @@ static int dsp563xx_deassert_reset(struct target *target)
                if (target->state == TARGET_HALTED) {
                        /* after a reset the cpu jmp to the
                         * reset vector and need 2 cycles to fill
-                        * the cache (fetch,decode,excecute)
+                        * the cache (fetch,decode,execute)
                         */
                        err = dsp563xx_step_ex(target, 1, 0, 1, 1);
                        if (err != ERROR_OK)
@@ -1375,18 +1374,20 @@ static int dsp563xx_run_algorithm(struct target *target,
        int num_mem_params, struct mem_param *mem_params,
        int num_reg_params, struct reg_param *reg_params,
        target_addr_t entry_point, target_addr_t exit_point,
-       int timeout_ms, void *arch_info)
+       unsigned int timeout_ms, void *arch_info)
 {
        int i;
        int retval = ERROR_OK;
        struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
 
        if (target->state != TARGET_HALTED) {
-               LOG_WARNING("target not halted");
+               LOG_TARGET_ERROR(target, "not halted (run target algo)");
                return ERROR_TARGET_NOT_HALTED;
        }
 
        for (i = 0; i < num_mem_params; i++) {
+               if (mem_params[i].direction == PARAM_IN)
+                       continue;
                retval = target_write_buffer(target, mem_params[i].address,
                                mem_params[i].size, mem_params[i].value);
                if (retval != ERROR_OK)
@@ -1394,9 +1395,12 @@ static int dsp563xx_run_algorithm(struct target *target,
        }
 
        for (i = 0; i < num_reg_params; i++) {
+               if (reg_params[i].direction == PARAM_IN)
+                       continue;
+
                struct reg *reg = register_get_by_name(dsp563xx->core_cache,
                                reg_params[i].reg_name,
-                               0);
+                               false);
 
                if (!reg) {
                        LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
@@ -1438,7 +1442,7 @@ static int dsp563xx_run_algorithm(struct target *target,
 
                        struct reg *reg = register_get_by_name(dsp563xx->core_cache,
                                        reg_params[i].reg_name,
-                                       0);
+                                       false);
                        if (!reg) {
                                LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
                                continue;
@@ -1547,9 +1551,9 @@ static int dsp563xx_read_memory_core(struct target *target,
                dsp563xx->read_core_reg(target, DSP563XX_REG_IDX_R1);
 
        /* r0 is no longer valid on target */
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R0].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R0].dirty = true;
        /* r1 is no longer valid on target */
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R1].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R1].dirty = true;
 
        x = count;
        b = buffer;
@@ -1701,7 +1705,7 @@ static int dsp563xx_write_memory_core(struct target *target,
                count);
 
        if (target->state != TARGET_HALTED) {
-               LOG_WARNING("target not halted");
+               LOG_TARGET_ERROR(target, "not halted");
                return ERROR_TARGET_NOT_HALTED;
        }
 
@@ -1729,9 +1733,9 @@ static int dsp563xx_write_memory_core(struct target *target,
                dsp563xx->read_core_reg(target, DSP563XX_REG_IDX_R1);
 
        /* r0 is no longer valid on target */
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R0].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R0].dirty = true;
        /* r1 is no longer valid on target */
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R1].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R1].dirty = true;
 
        x = count;
        b = buffer;
@@ -1870,78 +1874,17 @@ static int dsp563xx_remove_watchpoint(struct target *target, struct watchpoint *
        return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 }
 
-static void handle_md_output(struct command_context *cmd_ctx,
-       struct target *target,
-       uint32_t address,
-       unsigned size,
-       unsigned count,
-       const uint8_t *buffer)
-{
-       const unsigned line_bytecnt = 32;
-       unsigned line_modulo = line_bytecnt / size;
-
-       char output[line_bytecnt * 4 + 1];
-       unsigned output_len = 0;
-
-       const char *value_fmt;
-       switch (size) {
-               case 4:
-                       value_fmt = "%8.8x ";
-                       break;
-               case 2:
-                       value_fmt = "%4.4x ";
-                       break;
-               case 1:
-                       value_fmt = "%2.2x ";
-                       break;
-               default:
-                       /* "can't happen", caller checked */
-                       LOG_ERROR("invalid memory read size: %u", size);
-                       return;
-       }
-
-       for (unsigned i = 0; i < count; i++) {
-               if (i % line_modulo == 0)
-                       output_len += snprintf(output + output_len,
-                                       sizeof(output) - output_len,
-                                       "0x%8.8x: ",
-                                       (unsigned) (address + i));
-
-               uint32_t value = 0;
-               const uint8_t *value_ptr = buffer + i * size;
-               switch (size) {
-                       case 4:
-                               value = target_buffer_get_u32(target, value_ptr);
-                               break;
-                       case 2:
-                               value = target_buffer_get_u16(target, value_ptr);
-                               break;
-                       case 1:
-                               value = *value_ptr;
-               }
-               output_len += snprintf(output + output_len,
-                               sizeof(output) - output_len,
-                               value_fmt,
-                               value);
-
-               if ((i % line_modulo == line_modulo - 1) || (i == count - 1)) {
-                       command_print(cmd_ctx, "%s", output);
-                       output_len = 0;
-               }
-       }
-}
-
-static int dsp563xx_add_custom_watchpoint(struct target *target, uint32_t address, uint32_t memType,
+static int dsp563xx_add_custom_watchpoint(struct target *target, uint32_t address, uint32_t mem_type,
                enum watchpoint_rw rw, enum watchpoint_condition cond)
 {
        int err = ERROR_OK;
        struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
 
-       bool wasRunning = false;
+       bool was_running = false;
        /* Only set breakpoint when halted */
        if (target->state != TARGET_HALTED) {
                dsp563xx_halt(target);
-               wasRunning = true;
+               was_running = true;
        }
 
        if (dsp563xx->hardware_breakpoint[0].used) {
@@ -1951,8 +1894,8 @@ static int dsp563xx_add_custom_watchpoint(struct target *target, uint32_t addres
 
        uint32_t obcr_value = 0;
        if      (err == ERROR_OK) {
-               obcr_value |= OBCR_b0_or_b1;
-               switch (memType) {
+               obcr_value |= OBCR_B0_OR_B1;
+               switch (mem_type) {
                        case MEM_X:
                                obcr_value |= OBCR_BP_MEM_X;
                                break;
@@ -1963,7 +1906,7 @@ static int dsp563xx_add_custom_watchpoint(struct target *target, uint32_t addres
                                obcr_value |= OBCR_BP_MEM_P;
                                break;
                        default:
-                               LOG_ERROR("Unknown memType parameter (%" PRIu32 ")", memType);
+                               LOG_ERROR("Unknown mem_type parameter (%" PRIu32 ")", mem_type);
                                err = ERROR_TARGET_INVALID;
                }
        }
@@ -2027,7 +1970,7 @@ static int dsp563xx_add_custom_watchpoint(struct target *target, uint32_t addres
        if (err == ERROR_OK)
                dsp563xx->hardware_breakpoint[0].used = BPU_WATCHPOINT;
 
-       if (err == ERROR_OK && wasRunning) {
+       if (err == ERROR_OK && was_running) {
                /* Resume from current PC */
                err = dsp563xx_resume(target, 1, 0x0, 0, 0);
        }
@@ -2197,13 +2140,13 @@ COMMAND_HANDLER(dsp563xx_mem_command)
                        COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], count);
        }
 
-       buffer = calloc(count, sizeof(uint32_t));
+       buffer = calloc(count, 4);
 
        if (read_mem == 1) {
                err = dsp563xx_read_memory(target, mem_type, address, sizeof(uint32_t),
                                count, buffer);
                if (err == ERROR_OK)
-                       handle_md_output(CMD_CTX, target, address, sizeof(uint32_t), count, buffer);
+                       target_handle_md_output(CMD, target, address, sizeof(uint32_t), count, buffer);
 
        } else {
                b = buffer;
@@ -2298,7 +2241,7 @@ static const struct command_registration dsp563xx_command_handlers[] = {
                .handler = dsp563xx_remove_watchpoint_command,
                .mode = COMMAND_EXEC,
                .help = "remove watchpoint custom",
-               .usage = " ",
+               .usage = "",
        },
        COMMAND_REGISTRATION_DONE
 };
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