ipdbg: fix double free of virtual-ir data

[openocd.git] / src / target / armv4_5_mmu.h

diff --git a/src/target/armv4_5_mmu.h b/src/target/armv4_5_mmu.h
index e2dde7fe79ceeb87ba1e807aff3ba4abf2fde932..774f1056eb42b6d0a7ff124770ce7b6a554b8a47 100644 (file)
--- a/src/target/armv4_5_mmu.h
+++ b/src/target/armv4_5_mmu.h
@@ -1,25 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
 /***************************************************************************
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  ***************************************************************************/
 
-#ifndef ARMV4_5_MMU_H
-#define ARMV4_5_MMU_H
+#ifndef OPENOCD_TARGET_ARMV4_5_MMU_H
+#define OPENOCD_TARGET_ARMV4_5_MMU_H
 
 #include "armv4_5_cache.h"
 
@@ -27,8 +14,9 @@ struct target;
 
 struct armv4_5_mmu_common {
        int (*get_ttb)(struct target *target, uint32_t *result);
-       int (*read_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-       int (*write_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
+       int (*read_memory)(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+       int (*write_memory)(struct target *target, target_addr_t address,
+                           uint32_t size, uint32_t count, const uint8_t *buffer);
        int (*disable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
        int (*enable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
        struct armv4_5_cache_common armv4_5_cache;
@@ -55,4 +43,4 @@ enum {
        ARMV4_5_MMU_R_BIT = 0x200
 };
 
-#endif /* ARMV4_5_MMU_H */
+#endif /* OPENOCD_TARGET_ARMV4_5_MMU_H */