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target/xtensa: avoid IHI for writes to non-executable memory
[openocd.git] / contrib / loaders / checksum / Makefile
1 # SPDX-License-Identifier: GPL-2.0-or-later
2
3 BIN2C = ../../../src/helper/bin2char.sh
4
5 ARM_CROSS_COMPILE ?= arm-none-eabi-
6 ARM_AS ?= $(ARM_CROSS_COMPILE)as
7 ARM_OBJCOPY ?= $(ARM_CROSS_COMPILE)objcopy
8
9 ARM_AFLAGS = -EL
10
11 RISCV_CROSS_COMPILE ?= riscv64-unknown-elf-
12 RISCV_CC ?= $(RISCV_CROSS_COMPILE)gcc
13 RISCV_OBJCOPY ?= $(RISCV_CROSS_COMPILE)objcopy
14 RISCV32_CFLAGS = -march=rv32e -mabi=ilp32e -nostdlib -nostartfiles -Os -fPIC
15 RISCV64_CFLAGS = -march=rv64i -mabi=lp64 -nostdlib -nostartfiles -Os -fPIC
16
17 all: arm riscv
18
19 arm: armv4_5_crc.inc armv7m_crc.inc
20
21 riscv: riscv32_crc.inc riscv64_crc.inc
22
23 armv4_5_%.elf: armv4_5_%.s
24 $(ARM_AS) $(ARM_AFLAGS) $< -o $@
25
26 armv4_5_%.bin: armv4_5_%.elf
27 $(ARM_OBJCOPY) -Obinary $< $@
28
29 armv7m_%.elf: armv7m_%.s
30 $(ARM_AS) $(ARM_AFLAGS) $< -o $@
31
32 armv7m_%.bin: armv7m_%.elf
33 $(ARM_OBJCOPY) -Obinary $< $@
34
35 %.inc: %.bin
36 $(BIN2C) < $< > $@
37
38 riscv32_%.elf: riscv_%.c
39 $(RISCV_CC) $(RISCV32_CFLAGS) $< -o $@
40
41 riscv64_%.elf: riscv_%.c
42 $(RISCV_CC) $(RISCV64_CFLAGS) $< -o $@
43
44 riscv%.bin: riscv%.elf
45 $(RISCV_OBJCOPY) -Obinary $< $@
46
47 clean:
48 -rm -f *.elf *.bin *.inc
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