target/cortex_m: support Infineon Cortex-M33 from SLx2 MCU

The secure microcontroller Infineon SLx2 uses a custom Cortex-M33.
The register CPUID reports value 0x490FDB00.

Reference link to the product:
Link: https://www.infineon.com/cms/en/about-infineon/press/market-news/2022/INFCSS202211-034.html
Change-Id: I8911712c55bd50e24ed53cf49958352f470027a5
Signed-off-by: Ahmed Boughanmi <boughanmi.external@infineon.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7879
Reviewed-by: Karl Palsson <karlp@tweak.au>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

diff --git a/src/target/arm.h b/src/target/arm.h
index 28e53301919e85e647790c9248b677083be548e4..cc0f14cb648c36af4cd5ef0b83d96d7c4e124822 100644 (file)
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -61,6 +61,7 @@ enum arm_arch {
 /** Known ARM implementor IDs */
 enum arm_implementor {
        ARM_IMPLEMENTOR_ARM = 0x41,
+       ARM_IMPLEMENTOR_INFINEON = 0x49,
        ARM_IMPLEMENTOR_REALTEK = 0x72,
 };
 

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 854e8eb586adb300819490b4734c020f30d4bc64..3eafee0a16f3f4fa0d48b45f3c6a367dc2116cf0 100644 (file)
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -111,6 +111,11 @@ static const struct cortex_m_part_info cortex_m_parts[] = {
                .arch = ARM_ARCH_V8M,
                .flags = CORTEX_M_F_HAS_FPV5,
        },
+       {
+               .impl_part = INFINEON_SLX2_PARTNO,
+               .name = "Infineon-SLx2",
+               .arch = ARM_ARCH_V8M,
+       },
        {
                .impl_part = REALTEK_M200_PARTNO,
                .name = "Real-M200 (KM0)",

diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index 065e4d47bc6dfa807c8c5b299a9172e0d138f4ff..0bc139911a111669bba364835bc5c65a54b089e2 100644 (file)
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -45,19 +45,20 @@
  */
 enum cortex_m_impl_part {
        CORTEX_M_PARTNO_INVALID,
-       STAR_MC1_PARTNO    = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0x132), /* FIXME - confirm implementor! */
-       CORTEX_M0_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC20),
-       CORTEX_M1_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC21),
-       CORTEX_M3_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC23),
-       CORTEX_M4_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC24),
-       CORTEX_M7_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC27),
-       CORTEX_M0P_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC60),
-       CORTEX_M23_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD20),
-       CORTEX_M33_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD21),
-       CORTEX_M35P_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD31),
-       CORTEX_M55_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD22),
-       REALTEK_M200_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd20),
-       REALTEK_M300_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd22),
+       STAR_MC1_PARTNO      = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0x132), /* FIXME - confirm implementor! */
+       CORTEX_M0_PARTNO     = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC20),
+       CORTEX_M1_PARTNO     = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC21),
+       CORTEX_M3_PARTNO     = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC23),
+       CORTEX_M4_PARTNO     = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC24),
+       CORTEX_M7_PARTNO     = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC27),
+       CORTEX_M0P_PARTNO    = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC60),
+       CORTEX_M23_PARTNO    = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD20),
+       CORTEX_M33_PARTNO    = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD21),
+       CORTEX_M35P_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD31),
+       CORTEX_M55_PARTNO    = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD22),
+       INFINEON_SLX2_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_INFINEON, 0xDB0),
+       REALTEK_M200_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd20),
+       REALTEK_M300_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd22),
 };
 
 /* Relevant Cortex-M flags, used in struct cortex_m_part_info.flags */