The quit entry point was not being invoked. Just a source
of confusion at this point. XScale ran 100x reset upon
quit, but that code made no sense, wasn't commented
and never invoke.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
16 files changed:
ARM11_HANDLER(target_create),
ARM11_HANDLER(init_target),
ARM11_HANDLER(examine),
ARM11_HANDLER(target_create),
ARM11_HANDLER(init_target),
ARM11_HANDLER(examine),
};
int arm11_regs_arch_type = -1;
};
int arm11_regs_arch_type = -1;
-int arm11_quit(void)
-{
- FNC_INFO_NOTIMPLEMENTED;
-
- return ERROR_OK;
-}
/** Load a register that is marked !valid in the register cache */
int arm11_get_reg(reg_t *reg)
/** Load a register that is marked !valid in the register cache */
int arm11_get_reg(reg_t *reg)
int arm11_register_commands(struct command_context_s *cmd_ctx);
int arm11_target_create(struct target_s *target, Jim_Interp *interp);
int arm11_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm11_register_commands(struct command_context_s *cmd_ctx);
int arm11_target_create(struct target_s *target, Jim_Interp *interp);
int arm11_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
/* helpers */
int arm11_build_reg_cache(target_t *target);
/* helpers */
int arm11_build_reg_cache(target_t *target);
/* forward declarations */
int arm720t_target_create(struct target_s *target,Jim_Interp *interp);
int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
/* forward declarations */
int arm720t_target_create(struct target_s *target,Jim_Interp *interp);
int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm720t_arch_state(struct target_s *target);
int arm720t_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
int arm720t_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
int arm720t_arch_state(struct target_s *target);
int arm720t_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
int arm720t_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
.target_create = arm720t_target_create,
.init_target = arm720t_init_target,
.examine = arm7tdmi_examine,
.target_create = arm720t_target_create,
.init_target = arm720t_init_target,
.examine = arm7tdmi_examine,
.mrc = arm720t_mrc,
.mcr = arm720t_mcr,
.mrc = arm720t_mrc,
.mcr = arm720t_mcr,
-int arm720t_quit(void)
-{
- return ERROR_OK;
-}
int arm720t_init_arch_info(target_t *target, arm720t_common_t *arm720t, jtag_tap_t *tap)
{
int arm720t_init_arch_info(target_t *target, arm720t_common_t *arm720t, jtag_tap_t *tap)
{
/* forward declarations */
int arm7tdmi_target_create(struct target_s *target,Jim_Interp *interp);
/* forward declarations */
int arm7tdmi_target_create(struct target_s *target,Jim_Interp *interp);
-int arm7tdmi_quit(void);
/* target function declarations */
int arm7tdmi_poll(struct target_s *target);
/* target function declarations */
int arm7tdmi_poll(struct target_s *target);
.target_create = arm7tdmi_target_create,
.init_target = arm7tdmi_init_target,
.examine = arm7tdmi_examine,
.target_create = arm7tdmi_target_create,
.init_target = arm7tdmi_init_target,
.examine = arm7tdmi_examine,
};
int arm7tdmi_examine_debug_reason(target_t *target)
};
int arm7tdmi_examine_debug_reason(target_t *target)
-int arm7tdmi_quit(void)
-{
- return ERROR_OK;
-}
-
int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_tap_t *tap)
{
armv4_5_common_t *armv4_5;
int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_tap_t *tap)
{
armv4_5_common_t *armv4_5;
/* forward declarations */
int arm920t_target_create(struct target_s *target, Jim_Interp *interp);
int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
/* forward declarations */
int arm920t_target_create(struct target_s *target, Jim_Interp *interp);
int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
#define ARM920T_CP15_PHYS_ADDR(x, y, z) ((x << 5) | (y << 1) << (z))
#define ARM920T_CP15_PHYS_ADDR(x, y, z) ((x << 5) | (y << 1) << (z))
.target_create = arm920t_target_create,
.init_target = arm920t_init_target,
.examine = arm9tdmi_examine,
.target_create = arm920t_target_create,
.init_target = arm920t_init_target,
.examine = arm9tdmi_examine,
};
int arm920t_read_cp15_physical(target_t *target, int reg_addr, uint32_t *value)
};
int arm920t_read_cp15_physical(target_t *target, int reg_addr, uint32_t *value)
-int arm920t_quit(void)
-{
- return ERROR_OK;
-}
-
int arm920t_init_arch_info(target_t *target, arm920t_common_t *arm920t, jtag_tap_t *tap)
{
arm9tdmi_common_t *arm9tdmi = &arm920t->arm9tdmi_common;
int arm920t_init_arch_info(target_t *target, arm920t_common_t *arm920t, jtag_tap_t *tap)
{
arm9tdmi_common_t *arm9tdmi = &arm920t->arm9tdmi_common;
-static int arm926ejs_quit(void)
-{
- return ERROR_OK;
-}
-
int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs,
jtag_tap_t *tap)
{
int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs,
jtag_tap_t *tap)
{
.target_create = arm926ejs_target_create,
.init_target = arm926ejs_init_target,
.examine = arm9tdmi_examine,
.target_create = arm926ejs_target_create,
.init_target = arm926ejs_init_target,
.examine = arm9tdmi_examine,
- .quit = arm926ejs_quit,
.virt2phys = arm926ejs_virt2phys,
.mmu = arm926ejs_mmu,
.virt2phys = arm926ejs_virt2phys,
.mmu = arm926ejs_mmu,
/* forward declarations */
int arm966e_target_create(struct target_s *target, Jim_Interp *interp);
int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
/* forward declarations */
int arm966e_target_create(struct target_s *target, Jim_Interp *interp);
int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
target_type_t arm966e_target =
{
target_type_t arm966e_target =
{
.target_create = arm966e_target_create,
.init_target = arm966e_init_target,
.examine = arm9tdmi_examine,
.target_create = arm966e_target_create,
.init_target = arm966e_init_target,
.examine = arm9tdmi_examine,
};
int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
};
int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
-int arm966e_quit(void)
-{
- return ERROR_OK;
-}
-
int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, jtag_tap_t *tap)
{
arm9tdmi_common_t *arm9tdmi = &arm966e->arm9tdmi_common;
int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, jtag_tap_t *tap)
{
arm9tdmi_common_t *arm9tdmi = &arm966e->arm9tdmi_common;
/* forward declarations */
static int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp);
/* forward declarations */
static int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp);
-static int arm9tdmi_quit(void);
target_type_t arm9tdmi_target =
{
target_type_t arm9tdmi_target =
{
.target_create = arm9tdmi_target_create,
.init_target = arm9tdmi_init_target,
.examine = arm9tdmi_examine,
.target_create = arm9tdmi_target_create,
.init_target = arm9tdmi_init_target,
.examine = arm9tdmi_examine,
};
static arm9tdmi_vector_t arm9tdmi_vectors[] =
};
static arm9tdmi_vector_t arm9tdmi_vectors[] =
-static int arm9tdmi_quit(void)
-{
- return ERROR_OK;
-}
-
int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap)
{
armv4_5_common_t *armv4_5;
int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap)
{
armv4_5_common_t *armv4_5;
/* forward declarations */
int avr_target_create(struct target_s *target, Jim_Interp *interp);
int avr_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
/* forward declarations */
int avr_target_create(struct target_s *target, Jim_Interp *interp);
int avr_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int avr_arch_state(struct target_s *target);
int avr_poll(target_t *target);
int avr_arch_state(struct target_s *target);
int avr_poll(target_t *target);
.register_commands = avr_register_commands,
.target_create = avr_target_create,
.init_target = avr_init_target,
.register_commands = avr_register_commands,
.target_create = avr_target_create,
.init_target = avr_init_target,
/*
.virt2phys = avr_virt2phys,
.mmu = avr_mmu
/*
.virt2phys = avr_virt2phys,
.mmu = avr_mmu
-int avr_quit(void)
-{
- LOG_DEBUG("%s", __FUNCTION__);
- return ERROR_OK;
-}
-
int avr_arch_state(struct target_s *target)
{
LOG_DEBUG("%s", __FUNCTION__);
int avr_arch_state(struct target_s *target)
{
LOG_DEBUG("%s", __FUNCTION__);
.target_create = cortex_a8_target_create,
.init_target = cortex_a8_init_target,
.examine = cortex_a8_examine,
.target_create = cortex_a8_target_create,
.init_target = cortex_a8_init_target,
.examine = cortex_a8_examine,
-static int cortex_m3_quit(void)
-{
- return ERROR_OK;
-}
-
static int cortex_m3_dcc_read(swjdp_common_t *swjdp, uint8_t *value, uint8_t *ctrl)
{
uint16_t dcrdr;
static int cortex_m3_dcc_read(swjdp_common_t *swjdp, uint8_t *value, uint8_t *ctrl)
{
uint16_t dcrdr;
.target_create = cortex_m3_target_create,
.init_target = cortex_m3_init_target,
.examine = cortex_m3_examine,
.target_create = cortex_m3_target_create,
.init_target = cortex_m3_init_target,
.examine = cortex_m3_examine,
int fa526_target_create(struct target_s *target, Jim_Interp *interp);
int fa526_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int fa526_target_create(struct target_s *target, Jim_Interp *interp);
int fa526_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
target_type_t fa526_target =
{
target_type_t fa526_target =
{
.target_create = fa526_target_create,
.init_target = fa526_init_target,
.examine = arm9tdmi_examine,
.target_create = fa526_target_create,
.init_target = fa526_init_target,
.examine = arm9tdmi_examine,
};
void fa526_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc)
};
void fa526_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc)
arm9tdmi_init_target(cmd_ctx, target);
return ERROR_OK;
}
arm9tdmi_init_target(cmd_ctx, target);
return ERROR_OK;
}
-
-int fa526_quit(void)
-{
- return ERROR_OK;
-}
-int feroceon_quit(void)
-{
- return ERROR_OK;
-}
-
void feroceon_common_setup(struct target_s *target)
{
armv4_5_common_t *armv4_5 = target->arch_info;
void feroceon_common_setup(struct target_s *target)
{
armv4_5_common_t *armv4_5 = target->arch_info;
.target_create = feroceon_target_create,
.init_target = feroceon_init_target,
.examine = feroceon_examine,
.target_create = feroceon_target_create,
.init_target = feroceon_init_target,
.examine = feroceon_examine,
};
target_type_t dragonite_target =
};
target_type_t dragonite_target =
.target_create = dragonite_target_create,
.init_target = feroceon_init_target,
.examine = feroceon_examine,
.target_create = dragonite_target_create,
.init_target = feroceon_init_target,
.examine = feroceon_examine,
int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
int mips_m4k_register_commands(struct command_context_s *cmd_ctx);
int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
int mips_m4k_register_commands(struct command_context_s *cmd_ctx);
int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-int mips_m4k_quit(void);
int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp);
int mips_m4k_examine(struct target_s *target);
int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp);
int mips_m4k_examine(struct target_s *target);
.target_create = mips_m4k_target_create,
.init_target = mips_m4k_init_target,
.examine = mips_m4k_examine,
.target_create = mips_m4k_target_create,
.init_target = mips_m4k_init_target,
.examine = mips_m4k_examine,
};
int mips_m4k_examine_debug_reason(target_t *target)
};
int mips_m4k_examine_debug_reason(target_t *target)
-int mips_m4k_quit(void)
-{
- return ERROR_OK;
-}
-
int mips_m4k_init_arch_info(target_t *target, mips_m4k_common_t *mips_m4k, jtag_tap_t *tap)
{
mips32_common_t *mips32 = &mips_m4k->mips32_common;
int mips_m4k_init_arch_info(target_t *target, mips_m4k_common_t *mips_m4k, jtag_tap_t *tap)
{
mips32_common_t *mips32 = &mips_m4k->mips32_common;
* before the JTAG chain has been examined/verified
* */
int (*init_target)(struct command_context_s *cmd_ctx, struct target_s *target);
* before the JTAG chain has been examined/verified
* */
int (*init_target)(struct command_context_s *cmd_ctx, struct target_s *target);
/* translate from virtual to physical address. Default implementation is successful
* no-op(i.e. virtual==physical).
/* translate from virtual to physical address. Default implementation is successful
* no-op(i.e. virtual==physical).
-static int xscale_quit(void)
-{
- jtag_add_runtest(100, TAP_RESET);
- return ERROR_OK;
-}
-
static int xscale_init_arch_info(target_t *target,
xscale_common_t *xscale, jtag_tap_t *tap, const char *variant)
{
static int xscale_init_arch_info(target_t *target,
xscale_common_t *xscale, jtag_tap_t *tap, const char *variant)
{
.register_commands = xscale_register_commands,
.target_create = xscale_target_create,
.init_target = xscale_init_target,
.register_commands = xscale_register_commands,
.target_create = xscale_target_create,
.init_target = xscale_init_target,
.virt2phys = xscale_virt2phys,
.mmu = xscale_mmu
.virt2phys = xscale_virt2phys,
.mmu = xscale_mmu
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