David Brownell <david-b@pacbell.net>:

Fix for a goofy "board" config ... reuse target/pxa270.cfg
instead of using a private copy.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2266 b42882b7-edfa-0310-969c-e2dbd0fdcd60

diff --git a/tcl/board/crossbow_tech_imote2.cfg b/tcl/board/crossbow_tech_imote2.cfg
index 7527bef8fa53bd7036fe22ce05b0b0227f67ceb1..c271440231c3944d075e9404bdc13143e1945a94 100644 (file)
--- a/tcl/board/crossbow_tech_imote2.cfg
+++ b/tcl/board/crossbow_tech_imote2.cfg
@@ -1,46 +1,10 @@
 # Crossbow Technology iMote2
 
-if { [info exists CHIPNAME] } {        
-   set  _CHIPNAME $CHIPNAME    
-} else {        
-   set  _CHIPNAME imote2
-}
+set  CHIPNAME imote2
+source [find target/pxa270.cfg]
 
-if { [info exists ENDIAN] } {  
-   set  _ENDIAN $ENDIAN    
-} else {        
-   set  _ENDIAN little
-}
-
-if { [info exists CPUTAPID ] } {
-   set _CPUTAPID $CPUTAPID
-} else {
-  # force an error till we get a good number
-   set _CPUTAPID 0xffffffff
-}
-
-# PXA271 and an Intel Strataflash of 32 Megabytes (p30)
-# 
-# Marvell/Intel PXA270 Script
-# set jtag_nsrst_delay to the delay introduced by your reset circuit
-# the rest of the needed delays are built into the openocd program
+# longer-than-normal reset delay
 jtag_nsrst_delay 800 
-# set the jtag_ntrst_delay to the delay introduced by a reset circuit
-# the rest of the needed delays are built into the openocd program
-jtag_ntrst_delay 0
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst separate
-#jtag scan chain
-
-jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID
-
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant pxa27x
-$_TARGETNAME configure -work-area-virt 0x0x5c000000 -work-area-phys 0x0x5c000000 -work-area-size 0x10000 -work-area-backup 1
-# maps to PXA internal RAM. If you are using a PXA255
-# you must initialize SDRAM or leave this option off
-
 
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
 # works for P30 flash
-flash bank cfi 0x00000000 0x2000000 2 2 0
+flash bank cfi 0x00000000 0x2000000 2 2 $_TARGETNAME