This patch introduced a bug preventing flash writes from working
on Cortex-M3 targets like the STM32. Moreover, it's the wrong
approach for handling no-MMU targets.
The right way to handle no-MMU targets is to provide accessors
for physical addresses, and use them everywhere; and any code
which tries to work with virtual-to-physical mappings should use
a identity mapping (which can be defaulted).
And ... we can tell if a target has an MMU by seeing if it's
got an mmu() method. No such methood means no MMU.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
extern reg_t armv7m_gdb_dummy_cpsr_reg;
#endif
extern reg_t armv7m_gdb_dummy_cpsr_reg;
#endif
-static int cortex_m3_has_mmu(struct target_s *target, bool *has_mmu)
-{
- *has_mmu = false;
- return ERROR_OK;
-}
-
static int cortexm3_dap_read_coreregister_u32(swjdp_common_t *swjdp,
uint32_t *value, int regnum)
{
static int cortexm3_dap_read_coreregister_u32(swjdp_common_t *swjdp,
uint32_t *value, int regnum)
{
.register_commands = cortex_m3_register_commands,
.target_create = cortex_m3_target_create,
.init_target = cortex_m3_init_target,
.register_commands = cortex_m3_register_commands,
.target_create = cortex_m3_target_create,
.init_target = cortex_m3_init_target,
- .has_mmu = cortex_m3_has_mmu,
.examine = cortex_m3_examine,
};
.examine = cortex_m3_examine,
};
static int default_mmu(struct target_s *target, int *enabled)
{
static int default_mmu(struct target_s *target, int *enabled)
{
- LOG_ERROR("Not implemented.");
- return ERROR_FAIL;
-}
-
-static int default_has_mmu(struct target_s *target, bool *has_mmu)
-{
- *has_mmu = true;
static int default_read_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
static int default_read_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
- int retval;
- bool mmu;
- retval = target->type->has_mmu(target, &mmu);
- if (retval != ERROR_OK)
- return retval;
- if (mmu)
- {
- LOG_ERROR("Not implemented");
- return ERROR_FAIL;
- }
- return target_read_memory(target, address, size, count, buffer);
+ LOG_ERROR("Not implemented");
+ return ERROR_FAIL;
}
static int default_write_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
}
static int default_write_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
- int retval;
- bool mmu;
- retval = target->type->has_mmu(target, &mmu);
- if (retval != ERROR_OK)
- return retval;
- if (mmu)
- {
- LOG_ERROR("Not implemented");
- return ERROR_FAIL;
- }
- return target_write_memory(target, address, size, count, buffer);
+ LOG_ERROR("Not implemented");
+ return ERROR_FAIL;
{
target->type->mmu = default_mmu;
}
{
target->type->mmu = default_mmu;
}
- if (target->type->has_mmu == NULL)
- {
- target->type->has_mmu = default_has_mmu;
- }
*/
int (*write_phys_memory)(struct target_s *target, uint32_t phys_address, uint32_t size, uint32_t count, uint8_t *buffer);
*/
int (*write_phys_memory)(struct target_s *target, uint32_t phys_address, uint32_t size, uint32_t count, uint8_t *buffer);
- /* returns true if the mmu is enabled. Default implementation returns error. */
int (*mmu)(struct target_s *target, int *enabled);
int (*mmu)(struct target_s *target, int *enabled);
- /* returns true if the target has an mmu. This can only be
- determined after the target has been examined.
-
- Default implementation returns success and has_mmu==true.
- */
- int (*has_mmu)(struct target_s *target, bool *has_mmu);
-
/* Read coprocessor - arm specific. Default implementation returns error. */
int (*mrc)(struct target_s *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value);
/* Read coprocessor - arm specific. Default implementation returns error. */
int (*mrc)(struct target_s *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value);
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