STR912 uses RCLK if available
authoroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Mon, 25 Aug 2008 13:18:55 +0000 (13:18 +0000)
committeroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Mon, 25 Aug 2008 13:18:55 +0000 (13:18 +0000)
git-svn-id: svn://svn.berlios.de/openocd/trunk@967 b42882b7-edfa-0310-969c-e2dbd0fdcd60

src/helper/startup.tcl
src/target/target/str912.cfg

index e60ad976f467b2fa1fee7f846a633c10cf2bcbe4..1b5c06e25b5904166c5cb1d6ac78148eb79663a2 100644 (file)
@@ -160,4 +160,14 @@ proc ocd_gdb_restart {target_num} {
        # Fix!!! we're resetting all targets here! Really we should reset only
        # one target
        reset halt
-}
\ No newline at end of file
+}
+
+
+# If RCLK is not supported, use fallback_speed_khz
+proc jtag_rclk {fallback_speed_khz} {
+       if {[catch {jtag_khz 0}]!=0} {
+               jtag_khz $fallback_speed_khz
+       }
+}
+
+add_help_text jtag_rclk "fallback_speed_khz - set JTAG speed to RCLK or use fallback speed"
\ No newline at end of file
index c583a4d641d88d853446292beafca0973d7c9ca6..ca2fb8ca4038528e60c2e76a92a1d70bc5b0df45 100644 (file)
@@ -2,14 +2,14 @@
 
 # jtag speed. We need to stick to 16kHz until we've finished reset.
 
-jtag_khz 16
+jtag_rclk 16
 proc target_0_pre_reset {} {
-       jtag_khz 16
+       jtag_rclk 16
 }
 
 proc target_0_post_reset {} {
        # We can increase speed now that we know the target is halted.
-       jtag_khz 3000
+       jtag_rclk 3000
        
        # -- Enable 96K RAM
        # PFQBC enabled / DTCM & AHB wait-states disabled

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