Use opcode definitions from armv8_opcodes.h where appropriate
Change-Id: Iead33fb8e62eb2dd2419ef8932f7d46c087f51a8
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
retval = aarch64_exec_opcode(
a8->armv8_common.arm.target,
retval = aarch64_exec_opcode(
a8->armv8_common.arm.target,
+ ARMV8_MRS(SYSTEM_DBG_DTRRX_EL0, 0),
&dscr);
if (retval != ERROR_OK)
return retval;
&dscr);
if (retval != ERROR_OK)
return retval;
retval = aarch64_exec_opcode(
a8->armv8_common.arm.target,
retval = aarch64_exec_opcode(
a8->armv8_common.arm.target,
+ ARMV8_MRS(SYSTEM_DBG_DBGDTR_EL0, 0),
&dscr);
if (retval != ERROR_OK)
return retval;
&dscr);
if (retval != ERROR_OK)
return retval;
/* "Prefetch flush" after modifying execution status in CPSR */
return aarch64_exec_opcode(target,
/* "Prefetch flush" after modifying execution status in CPSR */
return aarch64_exec_opcode(target,
- ARMV4_5_MCR(15, 0, 0, 7, 5, 4),
/* write R0 to DCC */
retval = aarch64_exec_opcode(
a8->armv8_common.arm.target,
/* write R0 to DCC */
retval = aarch64_exec_opcode(
a8->armv8_common.arm.target,
- 0xd5130400, /* msr dbgdtr_el0, x0 */
+ ARMV8_MSR_GP(SYSTEM_DBG_DTRTX_EL0, 0), /* msr dbgdtr_el0, x0 */
&dscr);
if (retval != ERROR_OK)
return retval;
&dscr);
if (retval != ERROR_OK)
return retval;
/* write R0 to DCC */
retval = aarch64_exec_opcode(
a8->armv8_common.arm.target,
/* write R0 to DCC */
retval = aarch64_exec_opcode(
a8->armv8_common.arm.target,
- 0xd5130400, /* msr dbgdtr_el0, x0 */
+ ARMV8_MSR_GP(SYSTEM_DBG_DBGDTR_EL0, 0), /* msr dbgdtr_el0, x0 */
&dscr);
if (retval != ERROR_OK)
return retval;
&dscr);
if (retval != ERROR_OK)
return retval;
} else if (breakpoint->type == BKPT_SOFT) {
uint8_t code[4];
} else if (breakpoint->type == BKPT_SOFT) {
uint8_t code[4];
- buf_set_u32(code, 0, 32, 0xD4400000);
-
+ buf_set_u32(code, 0, 32, ARMV8_BKPT(0x11));
retval = target_read_memory(target,
breakpoint->address & 0xFFFFFFFFFFFFFFFE,
breakpoint->length, 1,
retval = target_read_memory(target,
breakpoint->address & 0xFFFFFFFFFFFFFFFE,
breakpoint->length, 1,
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