- Replace ')\(&&\)(' with ') \1 ('.
- Replace '\(\w\)\(&&\)(' with '\1 \2 ('.
- Replace '\(\w\)\(&&\)\(\w\)' with '\1 \2 \3'.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2366
b42882b7-edfa-0310-969c-
e2dbd0fdcd60
target_write_u32(target, MC_FCR[bank->bank_number], fcr);
LOG_DEBUG("Flash command: 0x%" PRIx32 ", flash bank: %i, page number: %u", fcr, bank->bank_number+1, pagen);
target_write_u32(target, MC_FCR[bank->bank_number], fcr);
LOG_DEBUG("Flash command: 0x%" PRIx32 ", flash bank: %i, page number: %u", fcr, bank->bank_number+1, pagen);
- if ((at91sam7_info->cidr_arch == 0x60)&&((cmd==SLB)|(cmd==CLB)))
+ if ((at91sam7_info->cidr_arch == 0x60) && ((cmd==SLB)|(cmd==CLB)))
{
/* Lock bit manipulation on AT91SAM7A3 waits for FC_FSR bit 1, EOL */
if (at91sam7_wait_status_busy(bank, MC_FSR_EOL, 10)&0x0C)
{
/* Lock bit manipulation on AT91SAM7A3 waits for FC_FSR bit 1, EOL */
if (at91sam7_wait_status_busy(bank, MC_FSR_EOL, 10)&0x0C)
/* inlining this will help show what fn that is taking time during profiling. */
static inline void buf_set_u32(uint8_t* buffer, unsigned int first, unsigned int num, uint32_t value)
{
/* inlining this will help show what fn that is taking time during profiling. */
static inline void buf_set_u32(uint8_t* buffer, unsigned int first, unsigned int num, uint32_t value)
{
- if ((num==32)&&(first==0))
+ if ((num==32) && (first==0))
{
buffer[3]=(value>>24)&0xff;
buffer[2]=(value>>16)&0xff;
{
buffer[3]=(value>>24)&0xff;
buffer[2]=(value>>16)&0xff;
}
static inline uint32_t buf_get_u32(const uint8_t* buffer, unsigned int first, unsigned int num)
{
}
static inline uint32_t buf_get_u32(const uint8_t* buffer, unsigned int first, unsigned int num)
{
- if ((num==32)&&(first==0))
+ if ((num==32) && (first==0))
{
return (((uint32_t)buffer[3])<<24)|(((uint32_t)buffer[2])<<16)|(((uint32_t)buffer[1])<<8)|(((uint32_t)buffer[0])<<0);
} else
{
return (((uint32_t)buffer[3])<<24)|(((uint32_t)buffer[2])<<16)|(((uint32_t)buffer[1])<<8)|(((uint32_t)buffer[0])<<0);
} else
- if ((i==argc)&&(fwrite("\n", 1, 1, config_file)==1))
+ if ((i==argc) && (fwrite("\n", 1, 1, config_file)==1))
- if ((retval==ERROR_OK)&&(fwrite(((char *)data)+pos, 1, chunk, f) != chunk))
+ if ((retval==ERROR_OK) && (fwrite(((char *)data)+pos, 1, chunk, f) != chunk))
retval = ERROR_INVALID_ARGUMENTS;
if (retval != ERROR_OK)
retval = ERROR_INVALID_ARGUMENTS;
if (retval != ERROR_OK)
void jtag_add_ir_scan(int in_num_fields, scan_field_t *in_fields, tap_state_t state)
{
void jtag_add_ir_scan(int in_num_fields, scan_field_t *in_fields, tap_state_t state)
{
- if (jtag_verify&&jtag_verify_capture_ir)
+ if (jtag_verify && jtag_verify_capture_ir)
{
/* 8 x 32 bit id's is enough for all invocations */
{
/* 8 x 32 bit id's is enough for all invocations */
((jtag_reset_config & RESET_SRST_PULLS_TRST)==0))
{
if (((req_tlr_or_trst&&!jtag_trst)||
((jtag_reset_config & RESET_SRST_PULLS_TRST)==0))
{
if (((req_tlr_or_trst&&!jtag_trst)||
- (!req_tlr_or_trst&&jtag_trst))&&
+ (!req_tlr_or_trst && jtag_trst))&&
((req_srst&&!jtag_srst)||
((req_srst&&!jtag_srst)||
- (!req_srst&&jtag_srst)))
+ (!req_srst && jtag_srst)))
{
/* FIX!!! srst_pulls_trst allows 1,1 => 0,0 transition.... */
//LOG_ERROR("BUG: transition of req_tlr_or_trst and req_srst in the same jtag_add_reset() call is undefined");
{
/* FIX!!! srst_pulls_trst allows 1,1 => 0,0 transition.... */
//LOG_ERROR("BUG: transition of req_tlr_or_trst and req_srst in the same jtag_add_reset() call is undefined");
ZY1000_POKE(ZY1000_JTAG_BASE+0xc, value);
#if 1
#if TEST_MANUAL()
ZY1000_POKE(ZY1000_JTAG_BASE+0xc, value);
#if 1
#if TEST_MANUAL()
- if ((state==TAP_DRSHIFT)&&(endState != TAP_DRSHIFT))
+ if ((state==TAP_DRSHIFT) && (endState != TAP_DRSHIFT))
{
int i;
setCurrentState(state);
{
int i;
setCurrentState(state);
- if ((i==repeat-1)&&(state != endState))
+ if ((i==repeat-1) && (state != endState))
#endif
#else
/* maximum debug version */
#endif
#else
/* maximum debug version */
- if ((repeat>0)&&((state==TAP_DRSHIFT)||(state==TAP_SI)))
+ if ((repeat>0) && ((state==TAP_DRSHIFT)||(state==TAP_SI)))
{
int i;
/* sample shift register for every bit. */
{
int i;
/* sample shift register for every bit. */
{
int singletap=(jtag_tap_next_enabled(jtag_tap_next_enabled(NULL))==NULL);
{
int singletap=(jtag_tap_next_enabled(jtag_tap_next_enabled(NULL))==NULL);
- if ((singletap)&&(num_fields==3))
+ if ((singletap) && (num_fields==3))
{
/* used by embeddedice_write_reg_inner() */
shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, num_bits[0], value[0]);
shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, num_bits[1], value[1]);
shiftValueInner(TAP_DRSHIFT, end_state, num_bits[2], value[2]);
{
/* used by embeddedice_write_reg_inner() */
shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, num_bits[0], value[0]);
shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, num_bits[1], value[1]);
shiftValueInner(TAP_DRSHIFT, end_state, num_bits[2], value[2]);
- } else if ((singletap)&&(num_fields==2))
+ } else if ((singletap) && (num_fields==2))
{
/* used by arm7 code */
shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, num_bits[0], value[0]);
{
/* used by arm7 code */
shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, num_bits[0], value[0]);
ZY1000_POKE(ZY1000_JTAG_BASE+0x10, 0x00000002);
}
ZY1000_POKE(ZY1000_JTAG_BASE+0x10, 0x00000002);
}
- if (trst||(srst&&(jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
+ if (trst||(srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
{
waitIdle();
/* we're now in the RESET state until trst is deasserted */
{
waitIdle();
/* we're now in the RESET state until trst is deasserted */
else if (type == 4) /* access watchpoint */
wp_type = WPT_ACCESS;
else if (type == 4) /* access watchpoint */
wp_type = WPT_ACCESS;
- if (gdb_breakpoint_override&&((bp_type==BKPT_SOFT)||(bp_type==BKPT_HARD)))
+ if (gdb_breakpoint_override && ((bp_type==BKPT_SOFT)||(bp_type==BKPT_HARD)))
{
bp_type=gdb_breakpoint_override_type;
}
{
bp_type=gdb_breakpoint_override_type;
}
xml_printf(&retval, &buffer, &pos, &size,
"PacketSize=%x;qXfer:memory-map:read%c;qXfer:features:read-;QStartNoAckMode+",
xml_printf(&retval, &buffer, &pos, &size,
"PacketSize=%x;qXfer:memory-map:read%c;qXfer:features:read-;QStartNoAckMode+",
- (GDB_BUFFER_SIZE - 1), ((gdb_use_memory_map == 1)&&(flash_get_bank_count()>0)) ? '+' : '-');
+ (GDB_BUFFER_SIZE - 1), ((gdb_use_memory_map == 1) && (flash_get_bank_count()>0)) ? '+' : '-');
if (retval != ERROR_OK)
{
if (retval != ERROR_OK)
{
- else if (strstr(packet, "qXfer:memory-map:read::")&&(flash_get_bank_count()>0))
+ else if (strstr(packet, "qXfer:memory-map:read::") && (flash_get_bank_count()>0))
{
/* We get away with only specifying flash here. Regions that are not
* specified are treated as if we provided no memory map(if not we
{
/* We get away with only specifying flash here. Regions that are not
* specified are treated as if we provided no memory map(if not we
armv4_5_invalidate_core_regs(target);
armv4_5_invalidate_core_regs(target);
- if ((target->reset_halt)&&((jtag_reset_config & RESET_SRST_PULLS_TRST)==0))
+ if ((target->reset_halt) && ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0))
{
/* debug entry was already prepared in arm7_9_assert_reset() */
target->debug_reason = DBG_REASON_DBGRQ;
{
/* debug entry was already prepared in arm7_9_assert_reset() */
target->debug_reason = DBG_REASON_DBGRQ;
jtag_add_reset(0, 0);
enum reset_types jtag_reset_config = jtag_get_reset_config();
jtag_add_reset(0, 0);
enum reset_types jtag_reset_config = jtag_get_reset_config();
- if (target->reset_halt&&(jtag_reset_config & RESET_SRST_PULLS_TRST) != 0)
+ if (target->reset_halt && (jtag_reset_config & RESET_SRST_PULLS_TRST) != 0)
{
LOG_WARNING("srst pulls trst - can not reset into halted mode. Issuing halt after reset.");
/* set up embedded ice registers again */
{
LOG_WARNING("srst pulls trst - can not reset into halted mode. Issuing halt after reset.");
/* set up embedded ice registers again */
dap_ap_read_reg_u32(swjdp, 0xFC, &apid);
swjdp_transaction_endcheck(swjdp);
/* Now we read ROM table ID registers, ref. ARM IHI 0029B sec */
dap_ap_read_reg_u32(swjdp, 0xFC, &apid);
swjdp_transaction_endcheck(swjdp);
/* Now we read ROM table ID registers, ref. ARM IHI 0029B sec */
- mem_ap = ((apid&0x10000)&&((apid&0x0F) != 0));
+ mem_ap = ((apid&0x10000) && ((apid&0x0F) != 0));
command_print(cmd_ctx, "ap identification register 0x%8.8" PRIx32 "", apid);
if (apid)
{
command_print(cmd_ctx, "ap identification register 0x%8.8" PRIx32 "", apid);
if (apid)
{
command_print(cmd_ctx, "No AP found at this apsel 0x%x", apsel);
}
command_print(cmd_ctx, "No AP found at this apsel 0x%x", apsel);
}
- romtable_present = ((mem_ap)&&(dbgbase != 0xFFFFFFFF));
+ romtable_present = ((mem_ap) && (dbgbase != 0xFFFFFFFF));
if (romtable_present)
{
uint32_t cid0,cid1,cid2,cid3,memtype,romentry;
if (romtable_present)
{
uint32_t cid0,cid1,cid2,cid3,memtype,romentry;
&&(isxdigit(buffer[5]))
&&(isxdigit(buffer[6]))
&&(buffer[7]=='0') /* record type : 00 -> 05 */
&&(isxdigit(buffer[5]))
&&(isxdigit(buffer[6]))
&&(buffer[7]=='0') /* record type : 00 -> 05 */
- &&(buffer[8]>='0')&&(buffer[8]<'6'))
+ &&(buffer[8]>='0') && (buffer[8]<'6'))
{
LOG_DEBUG("IHEX image detected.");
image->type = IMAGE_IHEX;
{
LOG_DEBUG("IHEX image detected.");
image->type = IMAGE_IHEX;
if (area->free)
return ERROR_OK;
if (area->free)
return ERROR_OK;
- if (restore&&target->backup_working_area)
+ if (restore && target->backup_working_area)
{
int retval;
if ((retval = target_write_memory(target, area->address, 4, area->size / 4, area->backup)) != ERROR_OK)
{
int retval;
if ((retval = target_write_memory(target, area->address, 4, area->size / 4, area->backup)) != ERROR_OK)
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