review.openocd Code Review - openocd.git/commit

author	Matthias Welwarsky <matthias@welwarsky.de>
	Thu, 29 Oct 2015 12:09:29 +0000 (13:09 +0100)
committer	Paul Fertser <fercerpav@gmail.com>
	Mon, 30 Nov 2015 10:07:10 +0000 (10:07 +0000)
commit	442e2506b1d535c9420a29066f5d9c8fb11de35a
tree	a78b81cecbdfbd3742b2905b5b2f0e50ae0f97e0	tree \| snapshot
parent	6d7f5be6acfb275ce43f61514162fbd7798725d7	commit \| diff

cortex_a: force cache and tlb bypass when cpu is in debug state

for minimal impact on the hardware state, force all memory accesses to
bypass the caches and tlbs. This may actually be the default, but ARM
recommends in DDI0406C to set proper default values on debug init.

Change-Id: If5ac097b6ee725c047b1e86c2f90eabe16b98c7b
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3079
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

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src/target/armv7a.h		diff \| blob \| history
src/target/cortex_a.c		diff \| blob \| history