target/imx6ul: Initial support
[openocd.git] / tcl / target / lpc2378.cfg
index 4e50ac5c856977fd3dbb88cff7b50e75ecb098f9..0b66b82557452d39eda19d0357556275924cf42f 100644 (file)
@@ -1,50 +1,21 @@
-# NXP LPC2378 ARM7TDMI-S with 512kB Flash and 32kB Local On-Chip SRAM (58kB total), clocked with 4MHz internal RC oscillator
+# NXP LPC2378 ARM7TDMI-S with 512kB flash (8kB used by bootloader) and 56kB SRAM (16kB for ETH, 8kB for DMA), clocked with 4MHz internal oscillator
 
-if { [info exists CHIPNAME] } {
-       set  _CHIPNAME $CHIPNAME
-} else {
-       set  _CHIPNAME lpc2378
-}
+source [find target/lpc2xxx.cfg]
 
-if { [info exists ENDIAN] } {
-       set  _ENDIAN $ENDIAN
-} else {
-       set  _ENDIAN little
-}
+# parameters:
+# - core_freq_khz - frequency of core in kHz during flashing, usually equal to connected crystal or internal oscillator, e.g. 12000
+# - adapter_freq_khz - frequency of debug adapter in kHz, should be 8x slower than core_freq_khz, e.g. 1000
 
-if { [info exists CPUTAPID ] } {
-       set _CPUTAPID $CPUTAPID
-} else {
-       set _CPUTAPID 0x4f1f0f0f
+proc setup_lpc2378 {core_freq_khz adapter_freq_khz} {
+       # 504kB flash and 32kB SRAM
+       # setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
+       setup_lpc2xxx lpc2378 0x4f1f0f0f 0x7e000 lpc2000_v2 0x8000 $core_freq_khz $adapter_freq_khz
 }
 
-#delays on reset lines
-jtag_nsrst_delay 200
-jtag_ntrst_delay 200
-
-# LPC2000 -> SRST causes TRST
-reset_config trst_and_srst srst_pulls_trst
-
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
-
-# LPC2378 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
-$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x8000 -work-area-backup 0
-
-$_TARGETNAME configure -event reset-init {
-       # Force target into ARM state
-       arm core_state arm
-       #do not remap 0x0000-0x0020 to anything but the flash
-       mwb 0xE01FC040 0x01
+proc init_targets {} {
+       # default to core clocked with 4MHz internal oscillator
+       echo "Warning - assuming default core clock 4MHz! Flashing may fail if actual core clock is different."
+       
+       # setup_lpc2378 <core_freq_khz> <adapter_freq_khz>
+       setup_lpc2378 4000 500
 }
-
-# LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.
-# After reset the chip uses its internal 4MHz RC oscillator
-#flash bank lpc2000 <base> <size> 0 0 <target#> <variant>
-set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME lpc2000 0x0 0x0007D000 0 0 $_TARGETNAME lpc2000_v2 4000 calc_checksum
-
-# 4MHz / 6 = 666kHz, so use 500
-jtag_khz 500

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