semihosting: reorganize semihosting commands
[openocd.git] / src / target / riscv / riscv.c
index 44da5a9e6592d70cc0833c2488ce50893735a4d7..7ad1ccde97d248268e5a3247b066ffd1f1b7cc2e 100644 (file)
@@ -203,7 +203,7 @@ static uint32_t dtmcontrol_scan(struct target *target, uint32_t out)
 {
        struct scan_field field;
        uint8_t in_value[4];
-       uint8_t out_value[4];
+       uint8_t out_value[4] = { 0 };
 
        buf_set_u32(out_value, 0, 32, out);
 
@@ -540,7 +540,7 @@ int riscv_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
                        return ERROR_FAIL;
                }
 
-               uint8_t buff[4];
+               uint8_t buff[4] = { 0 };
                buf_set_u32(buff, 0, breakpoint->length * CHAR_BIT, breakpoint->length == 4 ? ebreak() : ebreak_c());
                int const retval = target_write_memory(target, breakpoint->address, 2, breakpoint->length / 2, buff);
 
@@ -1047,7 +1047,7 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params,
 
        /* Disable Interrupts before attempting to run the algorithm. */
        uint64_t current_mstatus;
-       uint8_t mstatus_bytes[8];
+       uint8_t mstatus_bytes[8] = { 0 };
 
        LOG_DEBUG("Disabling Interrupts");
        struct reg *reg_mstatus = register_get_by_name(target->reg_cache,
@@ -1103,7 +1103,7 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params,
        reg_mstatus->type->set(reg_mstatus, mstatus_bytes);
 
        /* Restore registers */
-       uint8_t buf[8];
+       uint8_t buf[8] = { 0 };
        buf_set_u64(buf, 0, info->xlen[0], saved_pc);
        if (reg_pc->type->set(reg_pc, buf) != ERROR_OK)
                return ERROR_FAIL;
@@ -1623,7 +1623,7 @@ COMMAND_HANDLER(riscv_authdata_read)
                uint32_t value;
                if (r->authdata_read(target, &value) != ERROR_OK)
                        return ERROR_FAIL;
-               command_print(CMD_CTX, "0x%" PRIx32, value);
+               command_print(CMD, "0x%" PRIx32, value);
                return ERROR_OK;
        } else {
                LOG_ERROR("authdata_read is not implemented for this target.");
@@ -1676,7 +1676,7 @@ COMMAND_HANDLER(riscv_dmi_read)
                COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
                if (r->dmi_read(target, &value, address) != ERROR_OK)
                        return ERROR_FAIL;
-               command_print(CMD_CTX, "0x%" PRIx32, value);
+               command_print(CMD, "0x%" PRIx32, value);
                return ERROR_OK;
        } else {
                LOG_ERROR("dmi_read is not implemented for this target.");
@@ -1887,11 +1887,6 @@ static const struct command_registration riscv_exec_command_handlers[] = {
        COMMAND_REGISTRATION_DONE
 };
 
-extern __COMMAND_HANDLER(handle_common_semihosting_command);
-extern __COMMAND_HANDLER(handle_common_semihosting_fileio_command);
-extern __COMMAND_HANDLER(handle_common_semihosting_resumable_exit_command);
-extern __COMMAND_HANDLER(handle_common_semihosting_cmdline);
-
 /*
  * To be noted that RISC-V targets use the same semihosting commands as
  * ARM targets.
@@ -1905,37 +1900,7 @@ extern __COMMAND_HANDLER(handle_common_semihosting_cmdline);
  * protocol, then a command like `riscv semihosting enable` will make
  * sense, but for now all semihosting commands are prefixed with `arm`.
  */
-static const struct command_registration arm_exec_command_handlers[] = {
-       {
-               .name = "semihosting",
-               .handler = handle_common_semihosting_command,
-               .mode = COMMAND_EXEC,
-               .usage = "['enable'|'disable']",
-               .help = "activate support for semihosting operations",
-       },
-       {
-               .name = "semihosting_cmdline",
-               .handler = handle_common_semihosting_cmdline,
-               .mode = COMMAND_EXEC,
-               .usage = "arguments",
-               .help = "command line arguments to be passed to program",
-       },
-       {
-               .name = "semihosting_fileio",
-               .handler = handle_common_semihosting_fileio_command,
-               .mode = COMMAND_EXEC,
-               .usage = "['enable'|'disable']",
-               .help = "activate support for semihosting fileio operations",
-       },
-       {
-               .name = "semihosting_resexit",
-               .handler = handle_common_semihosting_resumable_exit_command,
-               .mode = COMMAND_EXEC,
-               .usage = "['enable'|'disable']",
-               .help = "activate support for semihosting resumable exit",
-       },
-       COMMAND_REGISTRATION_DONE
-};
+extern const struct command_registration semihosting_common_handlers[];
 
 const struct command_registration riscv_command_handlers[] = {
        {
@@ -1950,7 +1915,7 @@ const struct command_registration riscv_command_handlers[] = {
                .mode = COMMAND_ANY,
                .help = "ARM Command Group",
                .usage = "",
-               .chain = arm_exec_command_handlers
+               .chain = semihosting_common_handlers
        },
        COMMAND_REGISTRATION_DONE
 };

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