* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
__func__);
target->state = TARGET_UNKNOWN;
return ERROR_TARGET_FAILURE;
- };
+ }
if (target->state == TARGET_UNKNOWN) {
LOG_ERROR("%s: Target status invalid - communication failure",
__func__);
return ERROR_TARGET_FAILURE;
- };
+ }
return ERROR_OK;
}
static int dsp5680xx_resume(struct target *target, int current,
- uint32_t address, int hb, int d)
+ target_addr_t address, int hb, int d)
{
if (target->state == TARGET_RUNNING) {
LOG_USER("Target already running.");
/* at this point the data i want is at the reg eonce can read */
retval = core_rx_lower_data(target, data_read);
err_check_propagate(retval);
- LOG_DEBUG("%s:Data read from 0x%06X: 0x%02X%02X", __func__, address,
+ LOG_DEBUG("%s:Data read from 0x%06" PRIX32 ": 0x%02X%02X", __func__, address,
data_read[1], data_read[0]);
return retval;
}
return retval;
}
-static int dsp5680xx_read(struct target *t, uint32_t a, unsigned size,
- unsigned count, uint8_t *buf)
+static int dsp5680xx_read(struct target *t, target_addr_t a, uint32_t size,
+ uint32_t count, uint8_t *buf)
{
struct target *target = t;
dsp5680xx_write_16_single(target, address + iter, data_16,
pmem);
if (retval != ERROR_OK) {
- LOG_ERROR("%s: Could not write to p:0x%04X", __func__,
+ LOG_ERROR("%s: Could not write to p:0x%04" PRIX32, __func__,
address);
dsp5680xx_context.flush = 1;
return retval;
dsp5680xx_write_16_single(target, address + iter,
data[iter], pmem);
if (retval != ERROR_OK) {
- LOG_ERROR("%s: Could not write to p:0x%04X", __func__,
+ LOG_ERROR("%s: Could not write to p:0x%04" PRIX32, __func__,
address);
dsp5680xx_context.flush = 1;
return retval;
dsp5680xx_write_32_single(target, address + (iter << 1),
data[iter], pmem);
if (retval != ERROR_OK) {
- LOG_ERROR("%s: Could not write to p:0x%04X", __func__,
+ LOG_ERROR("%s: Could not write to p:0x%04" PRIX32, __func__,
address);
dsp5680xx_context.flush = 1;
return retval;
*
* @return
*/
-static int dsp5680xx_write(struct target *t, uint32_t a, uint32_t s, uint32_t c,
+static int dsp5680xx_write(struct target *t, target_addr_t a, uint32_t s, uint32_t c,
const uint8_t *b)
{
/* TODO Cannot write 32bit to odd address, will write 0x12345678 as 0x5678 0x0012 */
return retval;
}
-static int dsp5680xx_write_buffer(struct target *t, uint32_t a, uint32_t size,
+static int dsp5680xx_write_buffer(struct target *t, target_addr_t a, uint32_t size,
const uint8_t *b)
{
check_halt_and_debug(t);
*
* @return
*/
-static int dsp5680xx_read_buffer(struct target *t, uint32_t a, uint32_t size,
+static int dsp5680xx_read_buffer(struct target *t, target_addr_t a, uint32_t size,
uint8_t *buf)
{
check_halt_and_debug(t);
*
* @return
*/
-static int dsp5680xx_checksum_memory(struct target *t, uint32_t a, uint32_t s,
+static int dsp5680xx_checksum_memory(struct target *t, target_addr_t a, uint32_t s,
uint32_t *checksum)
{
return ERROR_FAIL;
*
* @return
*/
-static int perl_crc(uint8_t *buff8, uint32_t word_count)
+static int perl_crc(const uint8_t *buff8, uint32_t word_count)
{
uint16_t checksum = 0xffff;
}
/**
- * Prior to the execution of any Flash module command, the Flash module Clock Divider (CLKDIV) register must be initialized. The values of this register determine the speed of the internal Flash Clock (FCLK). FCLK must be in the range of 150kHz ≤ FCLK ≤ 200kHz for proper operation of the Flash module. (Running FCLK too slowly wears out the module, while running it too fast under programs Flash leading to bit errors.)
+ * Prior to the execution of any Flash module command, the Flash module Clock
+ * Divider (CLKDIV) register must be initialized. The values of this register
+ * determine the speed of the internal Flash Clock (FCLK). FCLK must be in the
+ * range of 150kHz ≤ FCLK ≤ 200kHz for proper operation of the Flash module.
+ * (Running FCLK too slowly wears out the module, while running it too fast
+ * under programs Flash leading to bit errors.)
*
* @param target
*
}
/**
- * Executes the FM calculate signature command. The FM will calculate over the data from @address to @address + @words -1. The result is written to a register, then read out by this function and returned in @signature. The value @signature may be compared to the the one returned by perl_crc to verify the flash was written correctly.
+ * Executes the FM calculate signature command. The FM will calculate over the
+ * data from @address to @address + @words -1. The result is written to a
+ * register, then read out by this function and returned in @signature. The
+ * value @signature may be compared to the the one returned by perl_crc to
+ * verify the flash was written correctly.
*
* @param target
* @param address Start of flash array where the signature should be calculated.
const uint32_t pgm_write_pflash_length = 31;
-int dsp5680xx_f_wr(struct target *t, uint8_t *b, uint32_t a, uint32_t count,
+int dsp5680xx_f_wr(struct target *t, const uint8_t *b, uint32_t a, uint32_t count,
int is_flash_lock)
{
struct target *target = t;
uint32_t address = a;
- uint8_t *buffer = b;
+ const uint8_t *buffer = b;
int retval = ERROR_OK;
return retval;
}
-static int dsp5680xx_step(struct target *target, int current, uint32_t address,
+static int dsp5680xx_step(struct target *target, int current, target_addr_t address,
int handle_breakpoints)
{
err_check(ERROR_FAIL, DSP5680XX_ERROR_NOT_IMPLEMENTED_STEP,
.poll = dsp5680xx_poll,
.arch_state = dsp5680xx_arch_state,
- .target_request_data = NULL,
-
.halt = dsp5680xx_halt,
.resume = dsp5680xx_resume,
.step = dsp5680xx_step,
Code Review / openocd.git / blobdiff