- added support for setting JTAG frequency on ASIX PRESTO (thanks to Pavel Chromy)

[openocd.git] / src / target / arm7tdmi.c

diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index 3fcfa296953eec002cd465f284836eb54119200e..ae51e3ae4162307d175fb657b2967a8444bc09db 100644 (file)
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -59,6 +59,8 @@ target_type_t arm7tdmi_target =
        .poll = arm7_9_poll,
        .arch_state = armv4_5_arch_state,
 
+       .target_request_data = arm7_9_target_request_data,
+
        .halt = arm7_9_halt,
        .resume = arm7_9_resume,
        .step = arm7_9_step,
@@ -66,6 +68,7 @@ target_type_t arm7tdmi_target =
        .assert_reset = arm7_9_assert_reset,
        .deassert_reset = arm7_9_deassert_reset,
        .soft_reset_halt = arm7_9_soft_reset_halt,
+       .prepare_reset_halt = arm7_9_prepare_reset_halt,
 
        .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
        
@@ -123,9 +126,9 @@ int arm7tdmi_examine_debug_reason(target_t *target)
                fields[1].in_handler_priv = NULL;
                
                arm_jtag_scann(&arm7_9->jtag_info, 0x1);
-               arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr);
+               arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL);
 
-               jtag_add_dr_scan(2, fields, TAP_PD);
+               jtag_add_dr_scan(2, fields, TAP_PD, NULL);
                jtag_execute_queue();
                
                fields[0].in_value = NULL;
@@ -133,7 +136,7 @@ int arm7tdmi_examine_debug_reason(target_t *target)
                fields[1].in_value = NULL;
                fields[1].out_value = databus;
                
-               jtag_add_dr_scan(2, fields, TAP_PD);
+               jtag_add_dr_scan(2, fields, TAP_PD, NULL);
 
                if (breakpoint & 1)
                        target->debug_reason = DBG_REASON_WATCHPOINT; 
@@ -156,7 +159,7 @@ int arm7tdmi_clock_out(arm_jtag_t *jtag_info, u32 out, u32 *in, int breakpoint)
 
        jtag_add_end_state(TAP_PD);
        arm_jtag_scann(jtag_info, 0x1);
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr);
+       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
        
        fields[0].device = jtag_info->chain_pos;
        fields[0].num_bits = 1;
@@ -186,7 +189,7 @@ int arm7tdmi_clock_out(arm_jtag_t *jtag_info, u32 out, u32 *in, int breakpoint)
        fields[1].in_check_value = NULL;
        fields[1].in_check_mask = NULL;
 
-       jtag_add_dr_scan(2, fields, -1);
+       jtag_add_dr_scan(2, fields, -1, NULL);
 
        jtag_add_runtest(0, -1);
        
@@ -213,7 +216,7 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
 
        jtag_add_end_state(TAP_PD);
        arm_jtag_scann(jtag_info, 0x1);
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr);
+       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
        
        fields[0].device = jtag_info->chain_pos;
        fields[0].num_bits = 1;
@@ -235,7 +238,7 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
        fields[1].in_check_value = NULL;
        fields[1].in_check_mask = NULL;
 
-       jtag_add_dr_scan(2, fields, -1);
+       jtag_add_dr_scan(2, fields, -1, NULL);
 
        jtag_add_runtest(0, -1);
        
@@ -267,7 +270,7 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
 
        jtag_add_end_state(TAP_PD);
        arm_jtag_scann(jtag_info, 0x1);
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr);
+       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
        
        fields[0].device = jtag_info->chain_pos;
        fields[0].num_bits = 1;
@@ -300,7 +303,7 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
        fields[1].in_check_value = NULL;
        fields[1].in_check_mask = NULL;
 
-       jtag_add_dr_scan(2, fields, -1);
+       jtag_add_dr_scan(2, fields, -1, NULL);
 
        jtag_add_runtest(0, -1);
        
@@ -743,10 +746,10 @@ void arm7tdmi_build_reg_cache(target_t *target)
        (*cache_p)->next = embeddedice_build_reg_cache(target, arm7_9);
        arm7_9->eice_cache = (*cache_p)->next;
        
-       if (arm7_9->has_etm)
+       if (arm7_9->etm_ctx)
        {
-               (*cache_p)->next->next = etm_build_reg_cache(target, jtag_info, 0);
-               arm7_9->etm_cache = (*cache_p)->next->next;
+               (*cache_p)->next->next = etm_build_reg_cache(target, jtag_info, arm7_9->etm_ctx);
+               arm7_9->etm_ctx->reg_cache = (*cache_p)->next->next;
        }
 }
 
@@ -810,8 +813,8 @@ int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, int c
        arm7_9->post_restore_context = NULL;
        
        /* initialize arch-specific breakpoint handling */
-       buf_set_u32((u8*)(&arm7_9->arm_bkpt), 0, 32, 0xdeeedeee);
-       buf_set_u32((u8*)(&arm7_9->thumb_bkpt), 0, 16, 0xdeee);
+       arm7_9->arm_bkpt = 0xdeeedeee;
+       arm7_9->thumb_bkpt = 0xdeee;
        
        arm7_9->sw_bkpts_use_wp = 1;
        arm7_9->sw_bkpts_enabled = 0;