ARM11: write_memory() avoids increment check

[openocd.git] / src / target / arm11_dbgtap.c

diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c
index 0f7e4953ab8af55217c00d52e0936d2d94c9c363..b5b02ef9382b4f9e00502fdf98c90d4bcdd9f295 100644 (file)
--- a/src/target/arm11_dbgtap.c
+++ b/src/target/arm11_dbgtap.c
@@ -48,7 +48,8 @@ static const tap_state_t arm11_move_pi_to_si_via_ci[] =
 };
 
 
-int arm11_add_ir_scan_vc(int num_fields, struct scan_field *fields, tap_state_t state)
+static int arm11_add_ir_scan_vc(int num_fields, struct scan_field *fields,
+               tap_state_t state)
 {
        if (cmd_queue_cur_state == TAP_IRPAUSE)
                jtag_add_pathmove(ARRAY_SIZE(arm11_move_pi_to_si_via_ci), arm11_move_pi_to_si_via_ci);
@@ -201,7 +202,8 @@ int arm11_add_debug_SCAN_N(struct arm11_common * arm11, uint8_t chain, tap_state
  *
  * \remarks                    This adds to the JTAG command queue but does \em not execute it.
  */
-void arm11_add_debug_INST(struct arm11_common * arm11, uint32_t inst, uint8_t * flag, tap_state_t state)
+static void arm11_add_debug_INST(struct arm11_common * arm11,
+               uint32_t inst, uint8_t * flag, tap_state_t state)
 {
        JTAG_DEBUG("INST <= 0x%08x", inst);
 
@@ -377,7 +379,9 @@ int arm11_run_instr_data_finish(struct arm11_common * arm11)
  * \param count                Number of opcodes to execute
  *
  */
-int arm11_run_instr_no_data(struct arm11_common * arm11, uint32_t * opcode, size_t count)
+static
+int arm11_run_instr_no_data(struct arm11_common * arm11,
+               uint32_t * opcode, size_t count)
 {
        arm11_add_IR(arm11, ARM11_ITRSEL, ARM11_TAP_DEFAULT);
 
@@ -880,10 +884,11 @@ int arm11_sc7_run(struct arm11_common * arm11, struct arm11_sc7_action * actions
  */
 void arm11_sc7_clear_vbw(struct arm11_common * arm11)
 {
-       struct arm11_sc7_action         clear_bw[arm11->brp + arm11->wrp + 1];
+       size_t clear_bw_size = arm11->brp + arm11->wrp + 1;
+       struct arm11_sc7_action         *clear_bw = malloc(sizeof(struct arm11_sc7_action) * clear_bw_size);
        struct arm11_sc7_action *       pos = clear_bw;
 
-       for (size_t i = 0; i < ARRAY_SIZE(clear_bw); i++)
+       for (size_t i = 0; i < clear_bw_size; i++)
        {
                clear_bw[i].write       = true;
                clear_bw[i].value       = 0;
@@ -899,7 +904,9 @@ void arm11_sc7_clear_vbw(struct arm11_common * arm11)
 
        (pos++)->address = ARM11_SC7_VCR;
 
-       arm11_sc7_run(arm11, clear_bw, ARRAY_SIZE(clear_bw));
+       arm11_sc7_run(arm11, clear_bw, clear_bw_size);
+
+       free (clear_bw);
 }
 
 /** Write VCR register
@@ -944,3 +951,76 @@ int arm11_read_memory_word(struct arm11_common * arm11, uint32_t address, uint32
        return arm11_run_instr_data_finish(arm11);
 }
 
+
+/************************************************************************/
+
+/*
+ * ARM11 provider for the OpenOCD implementation of the standard
+ * architectural ARM v6/v7 "Debug Programmer's Model" (DPM).
+ */
+
+static inline struct arm11_common *dpm_to_arm11(struct arm_dpm *dpm)
+{
+       return container_of(dpm, struct arm11_common, dpm);
+}
+
+static int arm11_dpm_prepare(struct arm_dpm *dpm)
+{
+       struct arm11_common *arm11 = dpm_to_arm11(dpm);
+
+       arm11 = container_of(dpm->arm, struct arm11_common, arm);
+
+       return arm11_run_instr_data_prepare(dpm_to_arm11(dpm));
+}
+
+static int arm11_dpm_finish(struct arm_dpm *dpm)
+{
+       return arm11_run_instr_data_finish(dpm_to_arm11(dpm));
+}
+
+static int arm11_dpm_instr_write_data_dcc(struct arm_dpm *dpm,
+               uint32_t opcode, uint32_t data)
+{
+       return arm11_run_instr_data_to_core(dpm_to_arm11(dpm),
+                       opcode, &data, 1);
+}
+
+static int arm11_dpm_instr_write_data_r0(struct arm_dpm *dpm,
+               uint32_t opcode, uint32_t data)
+{
+       return arm11_run_instr_data_to_core_via_r0(dpm_to_arm11(dpm),
+                       opcode, data);
+}
+
+static int arm11_dpm_instr_read_data_dcc(struct arm_dpm *dpm,
+               uint32_t opcode, uint32_t *data)
+{
+       return arm11_run_instr_data_from_core(dpm_to_arm11(dpm),
+                       opcode, data, 1);
+}
+
+static int arm11_dpm_instr_read_data_r0(struct arm_dpm *dpm,
+               uint32_t opcode, uint32_t *data)
+{
+       return arm11_run_instr_data_from_core_via_r0(dpm_to_arm11(dpm),
+                       opcode, data);
+}
+
+
+void arm11_dpm_init(struct arm11_common *arm11, uint32_t didr)
+{
+       struct arm_dpm *dpm = &arm11->dpm;
+
+       dpm->arm = &arm11->arm;
+
+       dpm->didr = didr;
+
+       dpm->prepare = arm11_dpm_prepare;
+       dpm->finish = arm11_dpm_finish;
+
+       dpm->instr_write_data_dcc = arm11_dpm_instr_write_data_dcc;
+       dpm->instr_write_data_r0 = arm11_dpm_instr_write_data_r0;
+
+       dpm->instr_read_data_dcc = arm11_dpm_instr_read_data_dcc;
+       dpm->instr_read_data_r0 = arm11_dpm_instr_read_data_r0;
+}