#endif
#include "arm11.h"
-#include "jtag.h"
-#include "log.h"
-#include <stdlib.h>
-#include <string.h>
#if 0
#define _DEBUG_INSTRUCTION_EXECUTION_
{
FNC_INFO;
- {size_t i;
- for(i = 0; i < asizeof(arm11->reg_values); i++)
+ for (size_t i = 0; i < asizeof(arm11->reg_values); i++)
{
arm11->reg_list[i].valid = 1;
arm11->reg_list[i].dirty = 0;
- }}
+ }
/* Save DSCR */
CHECK_RETVAL(arm11_read_DSCR(arm11, &R(DSCR)));
/** \todo TODO: handle other mode registers */
- {size_t i;
- for (i = 0; i < 15; i++)
+ for (size_t i = 0; i < 15; i++)
{
/* MCR p14,0,R?,c0,c5,0 */
arm11_run_instr_data_from_core(arm11, 0xEE000E15 | (i << 12), &R(RX + i), 1);
- }}
+ }
/* save rDTR */
return;
}
- {size_t i;
- for(i = 0; i < ARM11_REGCACHE_COUNT; i++)
+ for (size_t i = 0; i < ARM11_REGCACHE_COUNT; i++)
{
if (!arm11->reg_list[i].valid)
{
LOG_DEBUG("%8s %08x (INVALID)", arm11_reg_defs[i].name, arm11->reg_values[i]);
}
}
- }}
+ }
}
/** Restore processor state
/** \todo TODO: handle other mode registers */
/* restore R1 - R14 */
- {size_t i;
- for (i = 1; i < 15; i++)
+
+ for (size_t i = 1; i < 15; i++)
{
if (!arm11->reg_list[ARM11_RC_RX + i].dirty)
continue;
arm11_run_instr_data_to_core1(arm11, 0xee100e15 | (i << 12), R(RX + i));
// LOG_DEBUG("RESTORE R" ZU " %08x", i, R(RX + i));
- }}
+ }
arm11_run_instr_data_finish(arm11);
void arm11_record_register_history(arm11_common_t * arm11)
{
- {size_t i;
- for(i = 0; i < ARM11_REGCACHE_COUNT; i++)
+ for (size_t i = 0; i < ARM11_REGCACHE_COUNT; i++)
{
arm11->reg_history[i].value = arm11->reg_values[i];
arm11->reg_history[i].valid = arm11->reg_list[i].valid;
arm11->reg_list[i].valid = 0;
arm11->reg_list[i].dirty = 0;
- }}
+ }
}
*reg_list_size = ARM11_GDB_REGISTER_COUNT;
*reg_list = malloc(sizeof(reg_t*) * ARM11_GDB_REGISTER_COUNT);
- {size_t i;
- for (i = 16; i < 24; i++)
+ for (size_t i = 16; i < 24; i++)
{
(*reg_list)[i] = &arm11_gdb_dummy_fp_reg;
- }}
+ }
(*reg_list)[24] = &arm11_gdb_dummy_fps_reg;
- {size_t i;
- for (i = 0; i < ARM11_REGCACHE_COUNT; i++)
+ for (size_t i = 0; i < ARM11_REGCACHE_COUNT; i++)
{
if (arm11_reg_defs[i].gdb_num == -1)
continue;
(*reg_list)[arm11_reg_defs[i].gdb_num] = arm11->reg_list + i;
- }}
+ }
return ERROR_OK;
}
/** \todo TODO: check if dirty is the right choice to force a rewrite on arm11_resume() */
arm11->reg_list[ARM11_RC_R1].dirty = 1;
- {size_t i;
- for (i = 0; i < count; i++)
+ for (size_t i = 0; i < count; i++)
{
/* ldrb r1, [r0], #1 */
/* ldrb r1, [r0] */
arm11_run_instr_data_from_core(arm11, 0xEE001E15, &res, 1);
*buffer++ = res;
- }}
+ }
break;
{
arm11->reg_list[ARM11_RC_R1].dirty = 1;
- u16 * buf16 = (u16*)buffer;
-
- {size_t i;
- for (i = 0; i < count; i++)
+ for (size_t i = 0; i < count; i++)
{
/* ldrh r1, [r0], #2 */
arm11_run_instr_no_data1(arm11,
/* MCR p14,0,R1,c0,c5,0 */
arm11_run_instr_data_from_core(arm11, 0xEE001E15, &res, 1);
- *buf16++ = res;
- }}
+ u16 svalue = res;
+ memcpy(buffer + count * sizeof(u16), &svalue, sizeof(u16));
+ }
break;
}
case 4:
+ {
+ u32 instr = !arm11_config_memrw_no_increment ? 0xecb05e01 : 0xed905e00;
+ /** \todo TODO: buffer cast to u32* causes alignment warnings */
+ u32 *words = (u32 *)buffer;
/* LDC p14,c5,[R0],#4 */
/* LDC p14,c5,[R0] */
- arm11_run_instr_data_from_core(arm11,
- (!arm11_config_memrw_no_increment ? 0xecb05e01 : 0xed905e00),
- (u32 *)buffer, count);
+ arm11_run_instr_data_from_core(arm11, instr, words, count);
break;
+ }
}
arm11_run_instr_data_finish(arm11);
{
arm11->reg_list[ARM11_RC_R1].dirty = 1;
- {size_t i;
- for (i = 0; i < count; i++)
+ for (size_t i = 0; i < count; i++)
{
/* MRC p14,0,r1,c0,c5,0 */
arm11_run_instr_data_to_core1(arm11, 0xee101e15, *buffer++);
/* strb r1, [r0] */
arm11_run_instr_no_data1(arm11,
!arm11_config_memrw_no_increment ? 0xe4c01001 : 0xe5c01000);
- }}
+ }
break;
}
{
arm11->reg_list[ARM11_RC_R1].dirty = 1;
- u16 * buf16 = (u16*)buffer;
-
- {size_t i;
- for (i = 0; i < count; i++)
+ for (size_t i = 0; i < count; i++)
{
+ u16 value;
+ memcpy(&value, buffer + count * sizeof(u16), sizeof(u16));
+
/* MRC p14,0,r1,c0,c5,0 */
- arm11_run_instr_data_to_core1(arm11, 0xee101e15, *buf16++);
+ arm11_run_instr_data_to_core1(arm11, 0xee101e15, value);
/* strh r1, [r0], #2 */
/* strh r1, [r0] */
arm11_run_instr_no_data1(arm11,
!arm11_config_memrw_no_increment ? 0xe0c010b2 : 0xe1c010b0);
- }}
+ }
break;
}
- case 4:
- /** \todo TODO: check if buffer cast to u32* might cause alignment problems */
+ case 4: {
+ u32 instr = !arm11_config_memrw_no_increment ? 0xeca05e01 : 0xed805e00;
+
+ /** \todo TODO: buffer cast to u32* causes alignment warnings */
+ u32 *words = (u32*)buffer;
if (!arm11_config_memwrite_burst)
{
/* STC p14,c5,[R0],#4 */
/* STC p14,c5,[R0]*/
- arm11_run_instr_data_to_core(arm11,
- (!arm11_config_memrw_no_increment ? 0xeca05e01 : 0xed805e00),
- (u32 *)buffer, count);
+ arm11_run_instr_data_to_core(arm11, instr, words, count);
}
else
{
/* STC p14,c5,[R0],#4 */
/* STC p14,c5,[R0]*/
- arm11_run_instr_data_to_core_noack(arm11,
- (!arm11_config_memrw_no_increment ? 0xeca05e01 : 0xed805e00),
- (u32 *)buffer, count);
+ arm11_run_instr_data_to_core_noack(arm11, instr, words, count);
}
break;
}
+ }
#if 1
/* r0 verification */
u32 context[16];
u32 cpsr;
int exit_breakpoint_size = 0;
- int i;
int retval = ERROR_OK;
LOG_DEBUG("Running algorithm");
// return ERROR_FAIL;
// Save regs
- for (i = 0; i < 16; i++)
+ for (size_t i = 0; i < 16; i++)
{
context[i] = buf_get_u32((u8*)(&arm11->reg_values[i]),0,32);
- LOG_DEBUG("Save %i: 0x%x",i,context[i]);
+ LOG_DEBUG("Save %zi: 0x%x",i,context[i]);
}
cpsr = buf_get_u32((u8*)(arm11->reg_values+ARM11_RC_CPSR),0,32);
LOG_DEBUG("Save CPSR: 0x%x", cpsr);
- for (i = 0; i < num_mem_params; i++)
+ for (int i = 0; i < num_mem_params; i++)
{
target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value);
}
// Set register parameters
- for (i = 0; i < num_reg_params; i++)
+ for (int i = 0; i < num_reg_params; i++)
{
reg_t *reg = register_get_by_name(arm11->core_cache, reg_params[i].reg_name, 0);
if (!reg)
goto del_breakpoint;
}
- for (i = 0; i < num_mem_params; i++)
+ for (int i = 0; i < num_mem_params; i++)
{
if (mem_params[i].direction != PARAM_OUT)
target_read_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value);
}
- for (i = 0; i < num_reg_params; i++)
+ for (int i = 0; i < num_reg_params; i++)
{
if (reg_params[i].direction != PARAM_OUT)
{
restore:
// Restore context
- for (i = 0; i < 16; i++)
+ for (size_t i = 0; i < 16; i++)
{
LOG_DEBUG("restoring register %s with value 0x%8.8x",
arm11->reg_list[i].name, context[i]);
u32 values[6];
- {size_t i;
- for (i = 0; i < (read ? 5 : 6); i++)
+ for (size_t i = 0; i < (read ? 5 : 6); i++)
{
values[i] = strtoul(args[i + 1], NULL, 0);
read ? arm11_mrc_syntax : arm11_mcr_syntax);
return -1;
}
- }}
+ }
u32 instr = 0xEE000010 |
(values[0] << 8) |