build: cleanup src/flash/nor directory
[openocd.git] / src / flash / nor / pic32mx.c
index cc7d99c7027cf9e8250c3ea4b6a38b110cee9c8a..242780ff96ea7f94fd6e51932b676cd9561e262d 100644 (file)
@@ -23,6 +23,7 @@
  *   Free Software Foundation, Inc.,                                       *
  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  ***************************************************************************/
  *   Free Software Foundation, Inc.,                                       *
  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  ***************************************************************************/
+
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
@@ -46,7 +47,7 @@
  * Note: These macros only work for KSEG0/KSEG1 addresses.
  */
 
  * Note: These macros only work for KSEG0/KSEG1 addresses.
  */
 
-#define Virt2Phys(v)   ((v) & 0x1FFFFFFF)
+#define Virt2Phys(v)   ((v) & 0x1FFFFFFF)
 
 /* pic32mx configuration register locations */
 
 
 /* pic32mx configuration register locations */
 
@@ -90,8 +91,7 @@
 #define NVMKEY1                        0xAA996655
 #define NVMKEY2                        0x556699AA
 
 #define NVMKEY1                        0xAA996655
 #define NVMKEY2                        0x556699AA
 
-struct pic32mx_flash_bank
-{
+struct pic32mx_flash_bank {
        struct working_area *write_algorithm;
        int probed;
 };
        struct working_area *write_algorithm;
        int probed;
 };
@@ -171,9 +171,7 @@ FLASH_BANK_COMMAND_HANDLER(pic32mx_flash_bank_command)
        struct pic32mx_flash_bank *pic32mx_info;
 
        if (CMD_ARGC < 6)
        struct pic32mx_flash_bank *pic32mx_info;
 
        if (CMD_ARGC < 6)
-       {
                return ERROR_COMMAND_SYNTAX_ERROR;
                return ERROR_COMMAND_SYNTAX_ERROR;
-       }
 
        pic32mx_info = malloc(sizeof(struct pic32mx_flash_bank));
        bank->driver_priv = pic32mx_info;
 
        pic32mx_info = malloc(sizeof(struct pic32mx_flash_bank));
        bank->driver_priv = pic32mx_info;
@@ -199,8 +197,7 @@ static uint32_t pic32mx_wait_status_busy(struct flash_bank *bank, int timeout)
        uint32_t status;
 
        /* wait for busy to clear */
        uint32_t status;
 
        /* wait for busy to clear */
-       while (((status = pic32mx_get_flash_status(bank)) & NVMCON_NVMWR) && (timeout-- > 0))
-       {
+       while (((status = pic32mx_get_flash_status(bank)) & NVMCON_NVMWR) && (timeout-- > 0)) {
                LOG_DEBUG("status: 0x%" PRIx32, status);
                alive_sleep(1);
        }
                LOG_DEBUG("status: 0x%" PRIx32, status);
                alive_sleep(1);
        }
@@ -240,8 +237,7 @@ static int pic32mx_protect_check(struct flash_bank *bank)
        int s;
        int num_pages;
 
        int s;
        int num_pages;
 
-       if (target->state != TARGET_HALTED)
-       {
+       if (target->state != TARGET_HALTED) {
                LOG_ERROR("Target not halted");
                return ERROR_TARGET_NOT_HALTED;
        }
                LOG_ERROR("Target not halted");
                return ERROR_TARGET_NOT_HALTED;
        }
@@ -249,15 +245,13 @@ static int pic32mx_protect_check(struct flash_bank *bank)
        target_read_u32(target, PIC32MX_DEVCFG0, &devcfg0);
 
        if ((devcfg0 & (1 << 28)) == 0) /* code protect bit */
        target_read_u32(target, PIC32MX_DEVCFG0, &devcfg0);
 
        if ((devcfg0 & (1 << 28)) == 0) /* code protect bit */
-               num_pages = 0xffff;  /* All pages protected */
-       else if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH)
-       {
+               num_pages = 0xffff;                     /* All pages protected */
+       else if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) {
                if (devcfg0 & (1 << 24))
                if (devcfg0 & (1 << 24))
-                       num_pages = 0;       /* All pages unprotected */
+                       num_pages = 0;                  /* All pages unprotected */
                else
                else
-                       num_pages = 0xffff;  /* All pages protected */
-       }
-       else /* pgm flash */
+                       num_pages = 0xffff;             /* All pages protected */
+       } else /* pgm flash */
                num_pages = (~devcfg0 >> 12) & 0xff;
 
        for (s = 0; s < bank->num_sectors && s < num_pages; s++)
                num_pages = (~devcfg0 >> 12) & 0xff;
 
        for (s = 0; s < bank->num_sectors && s < num_pages; s++)
@@ -274,15 +268,13 @@ static int pic32mx_erase(struct flash_bank *bank, int first, int last)
        int i;
        uint32_t status;
 
        int i;
        uint32_t status;
 
-       if (bank->target->state != TARGET_HALTED)
-       {
+       if (bank->target->state != TARGET_HALTED) {
                LOG_ERROR("Target not halted");
                return ERROR_TARGET_NOT_HALTED;
        }
 
        if ((first == 0) && (last == (bank->num_sectors - 1))
                LOG_ERROR("Target not halted");
                return ERROR_TARGET_NOT_HALTED;
        }
 
        if ((first == 0) && (last == (bank->num_sectors - 1))
-               && (Virt2Phys(bank->base) == PIC32MX_PHYS_PGM_FLASH))
-       {
+               && (Virt2Phys(bank->base) == PIC32MX_PHYS_PGM_FLASH)) {
                /* this will only erase the Program Flash (PFM), not the Boot Flash (BFM)
                 * we need to use the MTAP to perform a full erase */
                LOG_DEBUG("Erasing entire program flash");
                /* this will only erase the Program Flash (PFM), not the Boot Flash (BFM)
                 * we need to use the MTAP to perform a full erase */
                LOG_DEBUG("Erasing entire program flash");
@@ -294,8 +286,7 @@ static int pic32mx_erase(struct flash_bank *bank, int first, int last)
                return ERROR_OK;
        }
 
                return ERROR_OK;
        }
 
-       for (i = first; i <= last; i++)
-       {
+       for (i = first; i <= last; i++) {
                target_write_u32(target, PIC32MX_NVMADDR, Virt2Phys(bank->base + bank->sectors[i].offset));
 
                status = pic32mx_nvm_exec(bank, NVMCON_OP_PAGE_ERASE, 10);
                target_write_u32(target, PIC32MX_NVMADDR, Virt2Phys(bank->base + bank->sectors[i].offset));
 
                status = pic32mx_nvm_exec(bank, NVMCON_OP_PAGE_ERASE, 10);
@@ -314,8 +305,7 @@ static int pic32mx_protect(struct flash_bank *bank, int set, int first, int last
 {
        struct target *target = bank->target;
 
 {
        struct target *target = bank->target;
 
-       if (target->state != TARGET_HALTED)
-       {
+       if (target->state != TARGET_HALTED) {
                LOG_ERROR("Target not halted");
                return ERROR_TARGET_NOT_HALTED;
        }
                LOG_ERROR("Target not halted");
                return ERROR_TARGET_NOT_HALTED;
        }
@@ -381,7 +371,7 @@ static const uint32_t pic32mx_flash_write_code[] = {
        0x1600FFFD,             /* bne $s0, $zero, waitflash */
        0x00000000,             /* nop */
        0x00000000,             /* nop */
        0x1600FFFD,             /* bne $s0, $zero, waitflash */
        0x00000000,             /* nop */
        0x00000000,             /* nop */
-       0x00000000,     /* nop */
+       0x00000000,             /* nop */
        0x00000000,             /* nop */
        0x00000000,             /* nop */
        0x8D510000,             /* lw $s1, 0($t2) */
        0x00000000,             /* nop */
        0x00000000,             /* nop */
        0x8D510000,             /* lw $s1, 0($t2) */
@@ -407,24 +397,20 @@ static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer,
 
        /* flash write code */
        if (target_alloc_working_area(target, sizeof(pic32mx_flash_write_code),
 
        /* flash write code */
        if (target_alloc_working_area(target, sizeof(pic32mx_flash_write_code),
-                       &pic32mx_info->write_algorithm) != ERROR_OK)
-       {
+                       &pic32mx_info->write_algorithm) != ERROR_OK) {
                LOG_WARNING("no working area available, can't do block memory writes");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        };
 
                LOG_WARNING("no working area available, can't do block memory writes");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        };
 
-       if ((retval = target_write_buffer(target,
-                       pic32mx_info->write_algorithm->address,
-                       sizeof(pic32mx_flash_write_code),
-                       (uint8_t*)pic32mx_flash_write_code)) != ERROR_OK)
+       retval = target_write_buffer(target, pic32mx_info->write_algorithm->address,
+                       sizeof(pic32mx_flash_write_code), (uint8_t *)pic32mx_flash_write_code);
+       if (retval != ERROR_OK)
                return retval;
 
        /* memory buffer */
                return retval;
 
        /* memory buffer */
-       while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK)
-       {
+       while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
                buffer_size /= 2;
                buffer_size /= 2;
-               if (buffer_size <= 256)
-               {
+               if (buffer_size <= 256) {
                        /* if we already allocated the writing code, but failed to get a
                         * buffer, free the algorithm */
                        if (pic32mx_info->write_algorithm)
                        /* if we already allocated the writing code, but failed to get a
                         * buffer, free the algorithm */
                        if (pic32mx_info->write_algorithm)
@@ -442,25 +428,24 @@ static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer,
        init_reg_param(&reg_params[1], "a1", 32, PARAM_OUT);
        init_reg_param(&reg_params[2], "a2", 32, PARAM_OUT);
 
        init_reg_param(&reg_params[1], "a1", 32, PARAM_OUT);
        init_reg_param(&reg_params[2], "a2", 32, PARAM_OUT);
 
-       while (count > 0)
-       {
+       while (count > 0) {
                uint32_t status;
                uint32_t thisrun_count = (count > (buffer_size / 4)) ?
                                (buffer_size / 4) : count;
 
                uint32_t status;
                uint32_t thisrun_count = (count > (buffer_size / 4)) ?
                                (buffer_size / 4) : count;
 
-               if ((retval = target_write_buffer(target, source->address,
-                               thisrun_count * 4, buffer)) != ERROR_OK)
+               retval = target_write_buffer(target, source->address,
+                               thisrun_count * 4, buffer);
+               if (retval != ERROR_OK)
                        break;
 
                buf_set_u32(reg_params[0].value, 0, 32, Virt2Phys(source->address));
                buf_set_u32(reg_params[1].value, 0, 32, Virt2Phys(address));
                buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
 
                        break;
 
                buf_set_u32(reg_params[0].value, 0, 32, Virt2Phys(source->address));
                buf_set_u32(reg_params[1].value, 0, 32, Virt2Phys(address));
                buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
 
-               if ((retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
+               retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
                                pic32mx_info->write_algorithm->address,
                                pic32mx_info->write_algorithm->address,
-                               0,
-                               10000, &mips32_info)) != ERROR_OK)
-               {
+                               0, 10000, &mips32_info);
+               if (retval != ERROR_OK) {
                        LOG_ERROR("error executing pic32mx flash write algorithm");
                        retval = ERROR_FLASH_OPERATION_FAILED;
                        break;
                        LOG_ERROR("error executing pic32mx flash write algorithm");
                        retval = ERROR_FLASH_OPERATION_FAILED;
                        break;
@@ -468,15 +453,13 @@ static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer,
 
                status = buf_get_u32(reg_params[0].value, 0, 32);
 
 
                status = buf_get_u32(reg_params[0].value, 0, 32);
 
-               if (status & NVMCON_NVMERR)
-               {
+               if (status & NVMCON_NVMERR) {
                        LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
                        retval = ERROR_FLASH_OPERATION_FAILED;
                        break;
                }
 
                        LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
                        retval = ERROR_FLASH_OPERATION_FAILED;
                        break;
                }
 
-               if (status & NVMCON_LVDERR)
-               {
+               if (status & NVMCON_LVDERR) {
                        LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
                        retval = ERROR_FLASH_OPERATION_FAILED;
                        break;
                        LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
                        retval = ERROR_FLASH_OPERATION_FAILED;
                        break;
@@ -516,8 +499,7 @@ static int pic32mx_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offs
        uint32_t status;
        int retval;
 
        uint32_t status;
        int retval;
 
-       if (bank->target->state != TARGET_HALTED)
-       {
+       if (bank->target->state != TARGET_HALTED) {
                LOG_ERROR("Target not halted");
                return ERROR_TARGET_NOT_HALTED;
        }
                LOG_ERROR("Target not halted");
                return ERROR_TARGET_NOT_HALTED;
        }
@@ -525,53 +507,43 @@ static int pic32mx_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offs
        LOG_DEBUG("writing to flash at address 0x%08" PRIx32 " at offset 0x%8.8" PRIx32
                        " count: 0x%8.8" PRIx32 "", bank->base, offset, count);
 
        LOG_DEBUG("writing to flash at address 0x%08" PRIx32 " at offset 0x%8.8" PRIx32
                        " count: 0x%8.8" PRIx32 "", bank->base, offset, count);
 
-       if (offset & 0x3)
-       {
+       if (offset & 0x3) {
                LOG_WARNING("offset 0x%" PRIx32 "breaks required 4-byte alignment", offset);
                return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
        }
 
        /* multiple words (4-byte) to be programmed? */
                LOG_WARNING("offset 0x%" PRIx32 "breaks required 4-byte alignment", offset);
                return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
        }
 
        /* multiple words (4-byte) to be programmed? */
-       if (words_remaining > 0)
-       {
+       if (words_remaining > 0) {
                /* try using a block write */
                /* try using a block write */
-               if ((retval = pic32mx_write_block(bank, buffer, offset, words_remaining)) != ERROR_OK)
-               {
-                       if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
-                       {
+               retval = pic32mx_write_block(bank, buffer, offset, words_remaining);
+               if (retval != ERROR_OK) {
+                       if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
                                /* if block write failed (no sufficient working area),
                                 * we use normal (slow) single dword accesses */
                                LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
                                /* if block write failed (no sufficient working area),
                                 * we use normal (slow) single dword accesses */
                                LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
-                       }
-                       else if (retval == ERROR_FLASH_OPERATION_FAILED)
-                       {
+                       } else if (retval == ERROR_FLASH_OPERATION_FAILED) {
                                LOG_ERROR("flash writing failed");
                                return retval;
                        }
                                LOG_ERROR("flash writing failed");
                                return retval;
                        }
-               }
-               else
-               {
+               } else {
                        buffer += words_remaining * 4;
                        address += words_remaining * 4;
                        words_remaining = 0;
                }
        }
 
                        buffer += words_remaining * 4;
                        address += words_remaining * 4;
                        words_remaining = 0;
                }
        }
 
-       while (words_remaining > 0)
-       {
+       while (words_remaining > 0) {
                uint32_t value;
                memcpy(&value, buffer + bytes_written, sizeof(uint32_t));
 
                status = pic32mx_write_word(bank, address, value);
 
                uint32_t value;
                memcpy(&value, buffer + bytes_written, sizeof(uint32_t));
 
                status = pic32mx_write_word(bank, address, value);
 
-               if (status & NVMCON_NVMERR)
-               {
+               if (status & NVMCON_NVMERR) {
                        LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
                        return ERROR_FLASH_OPERATION_FAILED;
                }
 
                        LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
                        return ERROR_FLASH_OPERATION_FAILED;
                }
 
-               if (status & NVMCON_LVDERR)
-               {
+               if (status & NVMCON_LVDERR) {
                        LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
                        return ERROR_FLASH_OPERATION_FAILED;
                }
                        LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
                        return ERROR_FLASH_OPERATION_FAILED;
                }
@@ -581,21 +553,18 @@ static int pic32mx_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offs
                address += 4;
        }
 
                address += 4;
        }
 
-       if (bytes_remaining)
-       {
+       if (bytes_remaining) {
                uint32_t value = 0xffffffff;
                memcpy(&value, buffer + bytes_written, bytes_remaining);
 
                status = pic32mx_write_word(bank, address, value);
 
                uint32_t value = 0xffffffff;
                memcpy(&value, buffer + bytes_written, bytes_remaining);
 
                status = pic32mx_write_word(bank, address, value);
 
-               if (status & NVMCON_NVMERR)
-               {
+               if (status & NVMCON_NVMERR) {
                        LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
                        return ERROR_FLASH_OPERATION_FAILED;
                }
 
                        LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
                        return ERROR_FLASH_OPERATION_FAILED;
                }
 
-               if (status & NVMCON_LVDERR)
-               {
+               if (status & NVMCON_LVDERR) {
                        LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
                        return ERROR_FLASH_OPERATION_FAILED;
                }
                        LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
                        return ERROR_FLASH_OPERATION_FAILED;
                }
@@ -631,8 +600,7 @@ static int pic32mx_probe(struct flash_bank *bank)
 
        page_size = 4096;
 
 
        page_size = 4096;
 
-       if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH)
-       {
+       if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) {
                /* 0x1FC00000: Boot flash size */
 #if 0
                /* for some reason this register returns 8k for the boot bank size
                /* 0x1FC00000: Boot flash size */
 #if 0
                /* for some reason this register returns 8k for the boot bank size
@@ -646,9 +614,7 @@ static int pic32mx_probe(struct flash_bank *bank)
                /* fixed 12k boot bank - see comments above */
                num_pages = (12 * 1024);
 #endif
                /* fixed 12k boot bank - see comments above */
                num_pages = (12 * 1024);
 #endif
-       }
-       else
-       {
+       } else {
                /* read the flash size from the device */
                if (target_read_u32(target, PIC32MX_BMXPFMSZ, &num_pages) != ERROR_OK) {
                        LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 512k flash");
                /* read the flash size from the device */
                if (target_read_u32(target, PIC32MX_BMXPFMSZ, &num_pages) != ERROR_OK) {
                        LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 512k flash");
@@ -658,8 +624,7 @@ static int pic32mx_probe(struct flash_bank *bank)
 
        LOG_INFO("flash size = %" PRId32 "kbytes", num_pages / 1024);
 
 
        LOG_INFO("flash size = %" PRId32 "kbytes", num_pages / 1024);
 
-       if (bank->sectors)
-       {
+       if (bank->sectors) {
                free(bank->sectors);
                bank->sectors = NULL;
        }
                free(bank->sectors);
                bank->sectors = NULL;
        }
@@ -670,8 +635,7 @@ static int pic32mx_probe(struct flash_bank *bank)
        bank->num_sectors = num_pages;
        bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
 
        bank->num_sectors = num_pages;
        bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
 
-       for (i = 0; i < (int)num_pages; i++)
-       {
+       for (i = 0; i < (int)num_pages; i++) {
                bank->sectors[i].offset = i * page_size;
                bank->sectors[i].size = page_size;
                bank->sectors[i].is_erased = -1;
                bank->sectors[i].offset = i * page_size;
                bank->sectors[i].size = page_size;
                bank->sectors[i].is_erased = -1;
@@ -709,17 +673,15 @@ static int pic32mx_info(struct flash_bank *bank, char *buf, int buf_size)
                return ERROR_FLASH_OPERATION_FAILED;
        }
 
                return ERROR_FLASH_OPERATION_FAILED;
        }
 
-       for (i = 0; pic32mx_devs[i].name != NULL; i++)
-       {
+       for (i = 0; pic32mx_devs[i].name != NULL; i++) {
                if (pic32mx_devs[i].devid == (device_id & 0x0fffffff)) {
                        printed = snprintf(buf, buf_size, "PIC32MX%s", pic32mx_devs[i].name);
                        break;
                }
        }
 
                if (pic32mx_devs[i].devid == (device_id & 0x0fffffff)) {
                        printed = snprintf(buf, buf_size, "PIC32MX%s", pic32mx_devs[i].name);
                        break;
                }
        }
 
-       if (pic32mx_devs[i].name == NULL) {
+       if (pic32mx_devs[i].name == NULL)
                printed = snprintf(buf, buf_size, "Unknown");
                printed = snprintf(buf, buf_size, "Unknown");
-       }
 
        buf += printed;
        buf_size -= printed;
 
        buf += printed;
        buf_size -= printed;
@@ -735,9 +697,7 @@ COMMAND_HANDLER(pic32mx_handle_pgm_word_command)
        int status, res;
 
        if (CMD_ARGC != 3)
        int status, res;
 
        if (CMD_ARGC != 3)
-       {
                return ERROR_COMMAND_SYNTAX_ERROR;
                return ERROR_COMMAND_SYNTAX_ERROR;
-       }
 
        COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
        COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
 
        COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
        COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
@@ -747,8 +707,7 @@ COMMAND_HANDLER(pic32mx_handle_pgm_word_command)
        if (ERROR_OK != retval)
                return retval;
 
        if (ERROR_OK != retval)
                return retval;
 
-       if (address < bank->base || address >= (bank->base + bank->size))
-       {
+       if (address < bank->base || address >= (bank->base + bank->size)) {
                command_print(CMD_CTX, "flash address '%s' is out of bounds", CMD_ARGV[0]);
                return ERROR_OK;
        }
                command_print(CMD_CTX, "flash address '%s' is out of bounds", CMD_ARGV[0]);
                return ERROR_OK;
        }
@@ -776,8 +735,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command)
        struct mips_ejtag *ejtag_info;
        int timeout = 10;
 
        struct mips_ejtag *ejtag_info;
        int timeout = 10;
 
-       if (CMD_ARGC < 1)
-       {
+       if (CMD_ARGC < 1) {
                command_print(CMD_CTX, "pic32mx unlock <bank>");
                return ERROR_COMMAND_SYNTAX_ERROR;
        }
                command_print(CMD_CTX, "pic32mx unlock <bank>");
                return ERROR_COMMAND_SYNTAX_ERROR;
        }
@@ -798,8 +756,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command)
        /* first check status of device */
        mchip_cmd = MCHP_STATUS;
        mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
        /* first check status of device */
        mchip_cmd = MCHP_STATUS;
        mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
-       if (mchip_cmd & (1 << 7))
-       {
+       if (mchip_cmd & (1 << 7)) {
                /* device is not locked */
                command_print(CMD_CTX, "pic32mx is already unlocked, erasing anyway");
        }
                /* device is not locked */
                command_print(CMD_CTX, "pic32mx is already unlocked, erasing anyway");
        }
@@ -812,8 +769,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command)
        do {
                mchip_cmd = MCHP_STATUS;
                mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
        do {
                mchip_cmd = MCHP_STATUS;
                mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
-               if (timeout-- == 0)
-               {
+               if (timeout-- == 0) {
                        LOG_DEBUG("timeout waiting for unlock: 0x%" PRIx32 "", mchip_cmd);
                        break;
                }
                        LOG_DEBUG("timeout waiting for unlock: 0x%" PRIx32 "", mchip_cmd);
                        break;
                }

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