flash/nor/nrf5: pass unsigned char to isalnum()

[openocd.git] / src / flash / nor / nrf5.c

diff --git a/src/flash/nor/nrf5.c b/src/flash/nor/nrf5.c
index c19c4eabb05f741867f6928ef36b736737b9fa6d..5bef8487c9704c1d437fe170107ed30c5905b2bf 100644 (file)
--- a/src/flash/nor/nrf5.c
+++ b/src/flash/nor/nrf5.c
@@ -157,6 +157,7 @@ struct nrf5_info {
        uint32_t hwid;
        enum nrf5_features features;
        unsigned int flash_size_kb;
+       unsigned int ram_size_kb;
 };
 
 #define NRF51_DEVICE_DEF(id, pt, var, bcode, fsize) \
@@ -282,6 +283,8 @@ static const struct nrf5_device_package nrf5_packages_table[] = {
        { 0x2005, "CK" },
 };
 
+const struct flash_driver nrf5_flash, nrf51_flash;
+
 static int nrf5_bank_is_probed(struct flash_bank *bank)
 {
        struct nrf5_bank *nbank = bank->driver_priv;
@@ -567,10 +570,14 @@ static int nrf5_protect(struct flash_bank *bank, int set, int first, int last)
 
 static bool nrf5_info_variant_to_str(uint32_t variant, char *bf)
 {
-       h_u32_to_be((uint8_t *)bf, variant);
-       bf[4] = '\0';
-       if (isalnum(bf[0]) && isalnum(bf[1]) && isalnum(bf[2]) && isalnum(bf[3]))
+       uint8_t b[4];
+
+       h_u32_to_be(b, variant);
+       if (isalnum(b[0]) && isalnum(b[1]) && isalnum(b[2]) && isalnum(b[3])) {
+               memcpy(bf, b, 4);
+               bf[4] = 0;
                return true;
+       }
 
        strcpy(bf, "xxxx");
        return false;
@@ -589,29 +596,31 @@ static int nrf5_info(struct flash_bank *bank, char *buf, int buf_size)
 {
        struct nrf5_bank *nbank = bank->driver_priv;
        struct nrf5_info *chip = nbank->chip;
+       int res;
 
        if (chip->spec) {
-               snprintf(buf, buf_size,
-                               "nRF%s-%s(build code: %s) %ukB Flash",
-                               chip->spec->part, chip->spec->variant, chip->spec->build_code,
-                               chip->flash_size_kb);
+               res = snprintf(buf, buf_size,
+                               "nRF%s-%s(build code: %s)",
+                               chip->spec->part, chip->spec->variant, chip->spec->build_code);
 
        } else if (chip->ficr_info_valid) {
                char variant[5];
                nrf5_info_variant_to_str(chip->ficr_info.variant, variant);
-               snprintf(buf, buf_size,
-                               "nRF%" PRIx32 "-%s%.2s(build code: %s) %" PRIu32
-                               "kB Flash, %" PRIu32 "kB RAM",
+               res = snprintf(buf, buf_size,
+                               "nRF%" PRIx32 "-%s%.2s(build code: %s)",
                                chip->ficr_info.part,
                                nrf5_decode_info_package(chip->ficr_info.package),
-                               variant, &variant[2],
-                               chip->flash_size_kb,
-                               chip->ficr_info.ram);
+                               variant, &variant[2]);
 
        } else {
-               snprintf(buf, buf_size, "nRF51xxx (HWID 0x%04" PRIx16 ") %ukB Flash",
-                               chip->hwid, chip->flash_size_kb);
+               res = snprintf(buf, buf_size, "nRF51xxx (HWID 0x%08" PRIx32 ")",
+                               chip->hwid);
        }
+       if (res <= 0)
+               return ERROR_FAIL;
+
+       snprintf(buf + res, buf_size - res, " %ukB Flash, %ukB RAM",
+                               chip->flash_size_kb, chip->ram_size_kb);
        return ERROR_OK;
 }
 
@@ -681,6 +690,39 @@ static int nrf5_read_ficr_info(struct nrf5_info *chip)
        return ERROR_OK;
 }
 
+static int nrf5_get_ram_size(struct target *target, uint32_t *ram_size)
+{
+       int res;
+
+       *ram_size = 0;
+
+       uint32_t numramblock;
+       res = target_read_u32(target, NRF51_FICR_NUMRAMBLOCK, &numramblock);
+       if (res != ERROR_OK) {
+               LOG_DEBUG("Couldn't read FICR NUMRAMBLOCK register");
+               return res;
+       }
+
+       if (numramblock < 1 || numramblock > 4) {
+               LOG_DEBUG("FICR NUMRAMBLOCK strange value %" PRIx32, numramblock);
+               return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+       }
+
+       for (unsigned int i = 0; i < numramblock; i++) {
+               uint32_t sizeramblock;
+               res = target_read_u32(target, NRF51_FICR_SIZERAMBLOCK0 + sizeof(uint32_t)*i, &sizeramblock);
+               if (res != ERROR_OK) {
+                       LOG_DEBUG("Couldn't read FICR NUMRAMBLOCK register");
+                       return res;
+               }
+               if (sizeramblock < 1024 || sizeramblock > 65536)
+                       LOG_DEBUG("FICR SIZERAMBLOCK strange value %" PRIx32, sizeramblock);
+               else
+                       *ram_size += sizeramblock;
+       }
+       return res;
+}
+
 static int nrf5_probe(struct flash_bank *bank)
 {
        int res;
@@ -720,6 +762,14 @@ static int nrf5_probe(struct flash_bank *bank)
                                                PRIx32, chip->hwid, chip->ficr_info.part);
        }
 
+       if (chip->ficr_info_valid) {
+               chip->ram_size_kb = chip->ficr_info.ram;
+       } else {
+               uint32_t ram_size;
+               nrf5_get_ram_size(target, &ram_size);
+               chip->ram_size_kb = ram_size / 1024;
+       }
+
        /* The value stored in NRF5_FICR_CODEPAGESIZE is the number of bytes in one page of FLASH. */
        uint32_t flash_page_size;
        res = target_read_u32(chip->target, NRF5_FICR_CODEPAGESIZE,
@@ -750,6 +800,8 @@ static int nrf5_probe(struct flash_bank *bank)
                }
        }
 
+       free(bank->sectors);
+
        if (bank->base == NRF5_FLASH_BASE) {
                /* Sanity check */
                if (chip->spec && chip->flash_size_kb != chip->spec->flash_size_kb)
@@ -811,10 +863,6 @@ static int nrf5_erase_page(struct flash_bank *bank,
        int res;
 
        LOG_DEBUG("Erasing page at 0x%"PRIx32, sector->offset);
-       if (sector->is_protected) {
-               LOG_ERROR("Cannot erase protected sector at 0x%" PRIx32, sector->offset);
-               return ERROR_FAIL;
-       }
 
        if (bank->base == NRF5_UICR_BASE) {
                if (chip->features & NRF5_FEATURE_SERIES_51) {
@@ -1019,9 +1067,31 @@ static void nrf5_free_driver_priv(struct flash_bank *bank)
        }
 }
 
+static struct nrf5_info *nrf5_get_chip(struct target *target)
+{
+       struct flash_bank *bank_iter;
+
+       /* iterate over nrf5 banks of same target */
+       for (bank_iter = flash_bank_list(); bank_iter; bank_iter = bank_iter->next) {
+               if (bank_iter->driver != &nrf5_flash && bank_iter->driver != &nrf51_flash)
+                       continue;
+
+               if (bank_iter->target != target)
+                       continue;
+
+               struct nrf5_bank *nbank = bank_iter->driver_priv;
+               if (!nbank)
+                       continue;
+
+               if (nbank->chip)
+                       return nbank->chip;
+       }
+       return NULL;
+}
+
 FLASH_BANK_COMMAND_HANDLER(nrf5_flash_bank_command)
 {
-       static struct nrf5_info *chip;
+       struct nrf5_info *chip;
        struct nrf5_bank *nbank = NULL;
 
        switch (bank->base) {
@@ -1033,6 +1103,7 @@ FLASH_BANK_COMMAND_HANDLER(nrf5_flash_bank_command)
                return ERROR_FAIL;
        }
 
+       chip = nrf5_get_chip(bank->target);
        if (!chip) {
                /* Create a new chip */
                chip = calloc(1, sizeof(*chip));