tcl/target/zynq_7000.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 # Xilinx Zynq-7000 All Programmable SoC
   4 #
   5 # http://www.xilinx.com/products/silicon-devices/soc/zynq-7000/index.htm
   6 # https://www.xilinx.com/member/forms/download/sim-model-eval-license-xef.html?filename=bsdl_zynq_2.zip
   7 #
   8 # 0x03736093  XQ7Z100 XC7Z100I XC7Z100
   9 # 0x03731093  XQ7Z045 XC7Z045I XC7Z045
  10 # 0x0372c093  XQ7Z030 XC7Z030I XC7Z030 XA7Z030
  11 # 0x03727093  XQ7Z020 XC7Z020I XC7Z020 XA7Z020
  12 # 0x03732093  XC7Z035I XC7Z035
  13 # 0x0373b093  XC7Z015I XC7Z015
  14 # 0x03728093  XC7Z014S
  15 # 0x0373c093  XC7Z012S
  16 # 0x03722093  XC7Z010I XC7Z010 XA7Z010
  17 # 0x03723093  XC7Z007S
  18
  19 set _CHIPNAME zynq
  20 set _TARGETNAME $_CHIPNAME.cpu
  21
  22 jtag newtap zynq_pl bs -irlen 6 -ignore-version -ircapture 0x1 -irmask 0x03 \
  23     -expected-id 0x03723093 \
  24     -expected-id 0x03722093 \
  25     -expected-id 0x0373c093 \
  26     -expected-id 0x03728093 \
  27     -expected-id 0x0373B093 \
  28     -expected-id 0x03732093 \
  29     -expected-id 0x03727093 \
  30     -expected-id 0x0372C093 \
  31     -expected-id 0x03731093 \
  32     -expected-id 0x03736093
  33
  34 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x4ba00477
  35
  36 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  37
  38 target create ${_TARGETNAME}0 cortex_a -dap $_CHIPNAME.dap \
  39     -coreid 0 -dbgbase 0x80090000
  40 target create ${_TARGETNAME}1 cortex_a -dap $_CHIPNAME.dap \
  41     -coreid 1 -dbgbase 0x80092000
  42 target smp ${_TARGETNAME}0 ${_TARGETNAME}1
  43
  44 adapter speed 1000
  45
  46 ${_TARGETNAME}0 configure -event reset-assert-post "cortex_a dbginit"
  47 ${_TARGETNAME}1 configure -event reset-assert-post "cortex_a dbginit"
  48
  49 pld create zynq_pl.pld virtex2 -chain-position zynq_pl.bs -no_jstart
  50 virtex2 set_user_codes $zynq_pl.pld 0x02 0x03 0x22 0x23
  51
  52 set XC7_JSHUTDOWN 0x0d
  53 set XC7_JPROGRAM 0x0b
  54 set XC7_JSTART 0x0c
  55 set XC7_BYPASS 0x3f
  56
  57 proc zynqpl_program {tap} {
  58         global XC7_JSHUTDOWN XC7_JPROGRAM XC7_JSTART XC7_BYPASS
  59         irscan $tap $XC7_JSHUTDOWN
  60         irscan $tap $XC7_JPROGRAM
  61         runtest 60000
  62         #JSTART prevents this from working...
  63         #irscan $tap $XC7_JSTART
  64         runtest 2000
  65         irscan $tap $XC7_BYPASS
  66         runtest 2000
  67 }