2 # target configuration for
5 if { [info exists CHIPNAME] } {
6 set _CHIPNAME $CHIPNAME
14 if { [info exists DAP_TAPID] } {
15 set _DAP_TAPID $DAP_TAPID
17 set _DAP_TAPID 0x5ba00477
20 jtag newtap $_CHIPNAME tap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID
21 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.tap
26 if { [info exists PS_TAPID] } {
27 set _PS_TAPID $PS_TAPID
29 set _PS_TAPID 0x04710093
34 jtag newtap $_CHIPNAME ps -irlen 12 -ircapture 0x1 -irmask 0x03 -expected-id $_PS_TAPID
36 jtag configure $_CHIPNAME.ps -event setup {
38 global jtag_configured
40 if { $jtag_configured == 0 } {
41 # add the DAP tap to the chain
42 # See https://forums.xilinx.com/t5/UltraScale-Architecture/JTAG-Chain-Configuration-for-Zynq-UltraScale-MPSoC/td-p/758924
43 irscan $_CHIPNAME.ps 0x824
44 drscan $_CHIPNAME.ps 32 0x00000003
47 # setup event will be re-entered through jtag arp_init
50 # re-initialized the jtag chain
55 set _TARGETNAME $_CHIPNAME.a53
56 set _CTINAME $_CHIPNAME.cti
59 set DBGBASE {0x80410000 0x80510000 0x80610000 0x80710000}
60 set CTIBASE {0x80420000 0x80520000 0x80620000 0x80720000}
63 for { set _core 0 } { $_core < $_cores } { incr _core } {
65 cti create $_CTINAME.$_core -dap $_CHIPNAME.dap -ap-num 1 \
66 -ctibase [lindex $CTIBASE $_core]
68 set _command "target create $_TARGETNAME.$_core aarch64 -dap $_CHIPNAME.dap \
69 -dbgbase [lindex $DBGBASE $_core] -cti $_CTINAME.$_core"
72 # non-boot core examination may fail
73 set _command "$_command -defer-examine"
74 set _smp_command "$_smp_command $_TARGETNAME.$_core"
76 # uncomment when "hawt" rtos is merged
77 #set _command "$_command -rtos hawt"
78 set _smp_command "target smp $_TARGETNAME.$_core"
85 targets $_TARGETNAME.0
87 proc core_up { args } {
89 foreach { core } [set args] {
90 $_TARGETNAME.$core arp_examine
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