2 # For more information about the configuration files, take a look at:
5 if { [info exists CHIPNAME] } {
6 set _CHIPNAME $CHIPNAME
11 if { [info exists ENDIAN] } {
17 # jtag speed. We need to stick to 16kHz until we've finished reset.
23 #use combined on interfaces or targets that can't set TRST/SRST separately
24 #reset_config trst_and_srst
26 if { [info exists FLASHTAPID ] } {
27 set _FLASHTAPID $FLASHTAPID
29 set _FLASHTAPID 0x04570041
31 jtag newtap $_CHIPNAME flash \
32 -irlen 8 -ircapture 0x1 -irmask 0x1 \
33 -expected-id $_FLASHTAPID
35 if { [info exists CPUTAPID ] } {
36 set _CPUTAPID $CPUTAPID
38 set _CPUTAPID 0x25966041
40 jtag newtap $_CHIPNAME cpu \
41 -irlen 4 -ircapture 0x1 -irmask 0xf \
42 -expected-id $_CPUTAPID
45 if { [info exists BSTAPID ] } {
46 set _BSTAPID1 $BSTAPID
47 set _BSTAPID2 $BSTAPID
49 set _BSTAPID1 0x1457f041
50 set _BSTAPID2 0x2457f041
52 jtag newtap $_CHIPNAME bs \
53 -irlen 5 -ircapture 0x1 -irmask 0x1 \
54 -expected-id $_BSTAPID1 -expected-id $_BSTAPID2
56 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
57 target create $_TARGETNAME arm966e \
59 -chain-position $_TARGETNAME \
62 $_TARGETNAME configure -event reset-start { jtag_rclk 16 }
64 proc str9x_config { } {
65 # -- Enable 96K RAM w/:
66 # PFQBC enabled / DTCM & AHB wait-states disabled
68 # PFQBC disabled / DTCM & AHB wait-states enabled
69 #mww 0x5C002034 0x0196
72 str9x flash_config 0 3 2 0 0x40000
74 #str9x flash_config 0 4 2 0 0x80000
83 $_TARGETNAME configure -event reset-init str9x_init
85 $_TARGETNAME configure \
87 -work-area-phys 0x50000000 \
88 -work-area-size 16384 \
91 #flash bank str9x <base> <size> 0 0 <target#> <variant>
92 flash bank str9x 0x00000000 0x00040000 0 0 0
93 flash bank str9x 0x00040000 0x00008000 0 0 0
Linking to existing account procedure
If you already have an account and want to add another login method
you
MUST first sign in with your existing account and
then change URL to read
https://review.openocd.org/login/?link
to get to this page again but this time it'll work for linking. Thank you.
SSH host keys fingerprints
1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=.. |
|+o.. . |
|*.o . . |
|+B . . . |
|Bo. = o S |
|Oo.+ + = |
|oB=.* = . o |
| =+=.+ + E |
|. .=o . o |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)