PIC32: add flash algorithm support
[openocd.git] / tcl / target / pic32mx.cfg
1
2 if { [info exists CHIPNAME] } {
3 set _CHIPNAME $CHIPNAME
4 } else {
5 set _CHIPNAME pic32mx
6 }
7
8 if { [info exists ENDIAN] } {
9 set _ENDIAN $ENDIAN
10 } else {
11 set _ENDIAN little
12 }
13
14 if { [info exists CPUTAPID ] } {
15 set _CPUTAPID $CPUTAPID
16 } else {
17 # force an error till we get a good number
18 set _CPUTAPID 0x30938053
19 }
20
21 # working area is 16384 - 2048
22 # loose first 2048 bytes due to BMXDKPBA reg
23 if { [info exists WORKAREASIZE] } {
24 set _WORKAREASIZE $WORKAREASIZE
25 } else {
26 set _WORKAREASIZE [expr (16384 - 2048)]
27 }
28
29 jtag_nsrst_delay 100
30 jtag_ntrst_delay 100
31
32 #use combined on interfaces or targets that can't set TRST/SRST separately
33 reset_config srst_only
34
35 #jtag scan chain
36 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
37 jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
38
39 set _TARGETNAME $_CHIPNAME.cpu
40 target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME
41
42 $_TARGETNAME configure -work-area-phys 0xa0000800 -work-area-size $_WORKAREASIZE -work-area-backup 0
43
44 $_TARGETNAME configure -event reset-init {
45 #
46 # from reset the pic32 cannot execute code in ram - enable ram execution
47 # minimum offset from start of ram is 2k
48 #
49
50 # BMXCON
51 mww 0xbf882000 0x001f0040
52 # BMXDKPBA: 0xa0000800
53 mww 0xbf882010 0x00000800
54 # BMXDUDBA
55 mww 0xbf882020 0x00004000
56 # BMXDUPBA
57 mww 0xbf882030 0x00004000
58 }
59
60 set _FLASHNAME $_CHIPNAME.flash
61 flash bank $_FLASHNAME pic32mx 0x1fc00000 0 0 0 $_TARGETNAME
62 set _FLASHNAME $_CHIPNAME.flash
63 flash bank $_FLASHNAME pic32mx 0x1d000000 0 0 0 $_TARGETNAME
64
65 # For more information about the configuration files, take a look at:
66 # openocd.texi

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