tcl/target: add SPDX tag
[openocd.git] / tcl / target / adsp-sc58x.cfg
1 # SPDX-License-Identifier: GPL-2.0-or-later
2
3 #
4 # Analog Devices ADSP-SC58x (ARM Cortex-A5 plus one or two SHARC+ DSPs)
5 #
6
7 # Evaluation boards by Analog Devices (and designs derived from them) use a
8 # non-standard 10-pin 0.05" ARM Cortex Debug Connector. In this bastardized
9 # implementation, pin 9 (GND or GNDDetect) has been usurped with JTAG /TRST.
10 #
11 # As a result, a standards-compliant debug pod will force /TRST active,
12 # putting the processor's debug interface into reset and preventing usage.
13 #
14 # A connector adapter must be employed on these boards to isolate or remap
15 # /TRST so that it is only asserted when intended.
16
17 source [find target/swj-dp.tcl]
18
19 if { [info exists CHIPNAME] } {
20 set _CHIPNAME $CHIPNAME
21 } else {
22 set _CHIPNAME ADSP-SC58x
23 }
24
25 if { [info exists ENDIAN] } {
26 set _ENDIAN $ENDIAN
27 } else {
28 set _ENDIAN little
29 }
30
31 if { [info exists CPUTAPID] } {
32 set _CPUTAPID $CPUTAPID
33 } else {
34 set _CPUTAPID 0x3BA02477
35 }
36
37 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
38 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
39
40 target create ap0.mem mem_ap -dap $_CHIPNAME.dap -ap-num 0
41
42 set _TARGETNAME $_CHIPNAME.cpu
43 target create $_TARGETNAME cortex_a -endian $_ENDIAN -dap $_CHIPNAME.dap
44
45 $_TARGETNAME configure -event examine-end {
46 global _TARGETNAME
47 sc58x_enabledebug
48 }
49
50 proc sc58x_enabledebug {} {
51 # Enable debugging functionality by setting bits in the TAPC_DBGCTL register
52 # it is not possible to halt the target unless these bits have been set
53 ap0.mem mww 0x31131000 0xFFFF
54 }

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)