Introduce ARCv2 tcl config files
[openocd.git] / tcl / cpu / arc / v2.tcl
1 # Copyright (C) 2015, 2020 Synopsys, Inc.
2 # Anton Kolesov <anton.kolesov@synopsys.com>
3 # Didin Evgeniy <didin@synopsys.com>
4 #
5 # SPDX-License-Identifier: GPL-2.0-or-later
6
7 source [find cpu/arc/common.tcl]
8
9 # Currently 'examine_target' can only read JTAG registers and set properties -
10 # but it shouldn't write any of registers - writes will be cached, but cache
11 # will be invalidated before flushing after examine_target, and changes will be
12 # lost. Perhaps that would be fixed later - perhaps writes shouldn't be cached
13 # after all. But if write to register is really needed from TCL - then it
14 # should be done via "arc jtag" for now.
15 proc arc_v2_examine_target { {target ""} } {
16 # Set current target, because OpenOCD event handlers don't do this for us.
17 if { $target != "" } {
18 targets $target
19 }
20
21 # Those registers always exist. DEBUG and DEBUGI are formally optional,
22 # however they come with JTAG interface, and so far there is no way
23 # OpenOCD can communicate with target without JTAG interface.
24 arc set-reg-exists identity pc status32 bta debug lp_start lp_end \
25 eret erbta erstatus ecr efa
26
27 # 32 core registers
28 arc set-reg-exists \
29 r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 \
30 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 \
31 gp fp sp ilink r30 blink lp_count pcl
32
33 # DCCM
34 set dccm_version [arc get-reg-field dccm_build version]
35 if { $dccm_version == 3 || $dccm_version == 4 } {
36 arc set-reg-exists aux_dccm
37 }
38
39 # ICCM
40 if { [arc get-reg-field iccm_build version] == 4 } {
41 arc set-reg-exists aux_iccm
42 }
43
44 # MPU
45 if { [arc get-reg-field mpu_build version] >= 2 &&
46 [arc get-reg-field mpu_build version] <= 4 } {
47 arc set-reg-exists mpu_en mpu_ecr
48 set mpu_regions [arc get-reg-field mpu_build regions]
49 for {set i 0} {$i < $mpu_regions} {incr i} {
50 arc set-reg-exists mpu_rdp$i mpu_rdb$i
51 }
52
53 # Secure MPU
54 if { [arc get-reg-field mpu_build version] == 4 } {
55 arc set-reg-exists mpu_index mpu_rstart mpu_rend mpu_rper
56 }
57 }
58 }
59
60 proc arc_v2_init_regs { } {
61 # XML features
62 set core_feature "org.gnu.gdb.arc.core.v2"
63 set aux_min_feature "org.gnu.gdb.arc.aux-minimal"
64 set aux_other_feature "org.gnu.gdb.arc.aux-other"
65
66 # Describe types
67 # Types are sorted alphabetically according to their name.
68 arc add-reg-type-struct -name ap_build_t -bitfield version 0 7 \
69 -bitfield type 8 11
70 arc add-reg-type-struct -name ap_control_t -bitfield at 0 3 -bitfield tt 4 5 \
71 -bitfield m 6 6 -bitfield p 7 7 -bitfield aa 8 8 -bitfield q 9 9
72 # Cycles field added in version 4.
73 arc add-reg-type-struct -name dccm_build_t -bitfield version 0 7 \
74 -bitfield size0 8 11 -bitfield size1 12 15 -bitfield cycles 17 19
75
76 arc add-reg-type-struct -name debug_t \
77 -bitfield fh 1 1 -bitfield ah 2 2 -bitfield asr 3 10 \
78 -bitfield is 11 11 -bitfield ep 19 19 -bitfield ed 20 20 \
79 -bitfield eh 21 21 -bitfield ra 22 22 -bitfield zz 23 23 \
80 -bitfield sm 24 26 -bitfield ub 28 28 -bitfield bh 29 29 \
81 -bitfield sh 30 30 -bitfield ld 31 31
82
83 arc add-reg-type-struct -name ecr_t \
84 -bitfield parameter 0 7 \
85 -bitfield cause 8 15 \
86 -bitfield vector 16 23 \
87 -bitfield U 30 30 \
88 -bitfield P 31 31
89 arc add-reg-type-struct -name iccm_build_t -bitfield version 0 7 \
90 -bitfield iccm0_size0 8 11 -bitfield iccm1_size0 12 15 \
91 -bitfield iccm0_size1 16 19 -bitfield iccm1_size1 20 23
92 arc add-reg-type-struct -name identity_t \
93 -bitfield arcver 0 7 -bitfield arcnum 8 15 -bitfield chipid 16 31
94 arc add-reg-type-struct -name isa_config_t -bitfield version 0 7 \
95 -bitfield pc_size 8 11 -bitfield lpc_size 12 15 -bitfield addr_size 16 19 \
96 -bitfield b 20 20 -bitfield a 21 21 -bitfield n 22 22 -bitfield l 23 23 \
97 -bitfield c 24 27 -bitfield d 28 31
98 arc add-reg-type-struct -name mpu_build_t -bitfield version 0 7 \
99 -bitfield regions 8 15 \
100 -bitfield s 16 16 \
101 -bitfield i 17 17
102 arc add-reg-type-struct -name mpu_ecr_t \
103 -bitfield MR 0 7 \
104 -bitfield VT 8 9 \
105 -bitfield EC_CODE 16 31
106 arc add-reg-type-struct -name mpu_en_t \
107 -bitfield UE 3 3 -bitfield UW 4 4 -bitfield UR 5 5 \
108 -bitfield KE 6 6 -bitfield KW 7 7 -bitfield KR 8 8 \
109 -bitfield S 15 15 -bitfield SID 16 23 \
110 -bitfield EN 30 30
111 arc add-reg-type-struct -name mpu_index_t \
112 -bitfield I 0 3 -bitfield M 30 30 -bitfield D 31 31
113 arc add-reg-type-struct -name mpu_rper_t \
114 -bitfield V 0 0 \
115 -bitfield UE 3 3 -bitfield UW 4 4 -bitfield UR 5 5 \
116 -bitfield KE 6 6 -bitfield KW 7 7 -bitfield KR 8 8 \
117 -bitfield S 15 15 -bitfield SID 16 23
118 arc add-reg-type-flags -name status32_t \
119 -flag H 0 -flag E0 1 -flag E1 2 -flag E2 3 \
120 -flag E3 4 -flag AE 5 -flag DE 6 -flag U 7 \
121 -flag V 8 -flag C 9 -flag N 10 -flag Z 11 \
122 -flag L 12 -flag DZ 13 -flag SC 14 -flag ES 15 \
123 -flag RB0 16 -flag RB1 17 -flag RB2 18 \
124 -flag AD 19 -flag US 20 -flag IE 31
125
126 # Core registers
127 set core_regs {
128 r0 0 uint32
129 r1 1 uint32
130 r2 2 uint32
131 r3 3 uint32
132 r4 4 uint32
133 r5 5 uint32
134 r6 6 uint32
135 r7 7 uint32
136 r8 8 uint32
137 r9 9 uint32
138 r10 10 uint32
139 r11 11 uint32
140 r12 12 uint32
141 r13 13 uint32
142 r14 14 uint32
143 r15 15 uint32
144 r16 16 uint32
145 r17 17 uint32
146 r18 18 uint32
147 r19 19 uint32
148 r20 20 uint32
149 r21 21 uint32
150 r22 23 uint32
151 r23 24 uint32
152 r24 24 uint32
153 r25 25 uint32
154 gp 26 data_ptr
155 fp 27 data_ptr
156 sp 28 data_ptr
157 ilink 29 code_ptr
158 r30 30 uint32
159 blink 31 code_ptr
160 r32 32 uint32
161 r33 33 uint32
162 r34 34 uint32
163 r35 35 uint32
164 r36 36 uint32
165 r37 37 uint32
166 r38 38 uint32
167 r39 39 uint32
168 r40 40 uint32
169 r41 41 uint32
170 r42 42 uint32
171 r43 43 uint32
172 r44 44 uint32
173 r45 45 uint32
174 r46 46 uint32
175 r47 47 uint32
176 r48 48 uint32
177 r49 49 uint32
178 r50 50 uint32
179 r51 51 uint32
180 r52 52 uint32
181 r53 53 uint32
182 r54 54 uint32
183 r55 55 uint32
184 r56 56 uint32
185 r57 57 uint32
186 accl 58 uint32
187 acch 59 uint32
188 lp_count 60 uint32
189 limm 61 uint32
190 reserved 62 uint32
191 pcl 63 code_ptr
192 }
193 foreach {reg count type} $core_regs {
194 arc add-reg -name $reg -num $count -core -type $type -g \
195 -feature $core_feature
196 }
197
198 # AUX min
199 set aux_min {
200 0x6 pc code_ptr
201 0x2 lp_start code_ptr
202 0x3 lp_end code_ptr
203 0xA status32 status32_t
204 }
205 foreach {num name type} $aux_min {
206 arc add-reg -name $name -num $num -type $type -feature $aux_min_feature -g
207 }
208
209 # AUX other
210 set aux_other {
211 0x004 identity identity_t
212 0x005 debug debug_t
213 0x018 aux_dccm int
214 0x208 aux_iccm int
215
216
217 0x400 eret code_ptr
218 0x401 erbta code_ptr
219 0x402 erstatus status32_t
220 0x403 ecr ecr_t
221 0x404 efa data_ptr
222
223 0x409 mpu_en mpu_en_t
224
225 0x412 bta code_ptr
226
227 0x420 mpu_ecr mpu_ecr_t
228 0x422 mpu_rdb0 int
229 0x423 mpu_rdp0 int
230 0x424 mpu_rdb1 int
231 0x425 mpu_rdp1 int
232 0x426 mpu_rdb2 int
233 0x427 mpu_rdp2 int
234 0x428 mpu_rdb3 int
235 0x429 mpu_rdp3 int
236 0x42A mpu_rdb4 int
237 0x42B mpu_rdp4 int
238 0x42C mpu_rdb5 int
239 0x42D mpu_rdp5 int
240 0x42E mpu_rdb6 int
241 0x42F mpu_rdp6 int
242 0x430 mpu_rdb7 int
243 0x431 mpu_rdp7 int
244 0x432 mpu_rdb8 int
245 0x433 mpu_rdp8 int
246 0x434 mpu_rdb9 int
247 0x435 mpu_rdp9 int
248 0x436 mpu_rdb10 int
249 0x437 mpu_rdp10 int
250 0x438 mpu_rdb11 int
251 0x439 mpu_rdp11 int
252 0x43A mpu_rdb12 int
253 0x43B mpu_rdp12 int
254 0x43C mpu_rdb13 int
255 0x43D mpu_rdp13 int
256 0x43E mpu_rdb14 int
257 0x43F mpu_rdp14 int
258 0x440 mpu_rdb15 int
259 0x441 mpu_rdp15 int
260 0x448 mpu_index mpu_index_t
261 0x449 mpu_rstart uint32
262 0x44A mpu_rend uint32
263 0x44B mpu_rper mpu_rper_t
264 0x44C mpu_probe uint32
265 }
266 foreach {num name type} $aux_other {
267 arc add-reg -name $name -num $num -type $type -feature $aux_other_feature
268 }
269
270 # AUX BCR
271 set bcr {
272 0x6D mpu_build
273 0x74 dccm_build
274 0x76 ap_build
275 0x78 iccm_build
276 0xC1 isa_config
277 }
278 foreach {num reg} $bcr {
279 arc add-reg -name $reg -num $num -type ${reg}_t -bcr -feature $aux_other_feature
280 }
281
282 [target current] configure \
283 -event examine-end "arc_v2_examine_target [target current]"
284 }
285
286 proc arc_v2_reset { {target ""} } {
287 arc_common_reset $target
288 }

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)