tcl/board: add SPDX tag
[openocd.git] / tcl / board / lubbock.cfg
1 # SPDX-License-Identifier: GPL-2.0-or-later
2
3 # Intel "Lubbock" Development Board with PXA255 (dbpxa255)
4 # Obsolete; this was Intel's original PXA255 development system
5 # Board also had CPU cards for SA1100, PXA210, PXA250, and more.
6
7 source [find target/pxa255.cfg]
8
9 adapter srst delay 250
10 jtag_ntrst_delay 250
11
12 # NOTE: until after pinmux and such are set up, only CS0 is
13 # available ... not 2nd bank of CFI, or FPGA, SRAM, ENET, etc.
14
15 # CS0, CS1 -- two banks of CFI flash, 32 MBytes each
16 # each bank is 32-bits wide, two 16-bit chips in parallel
17 set _FLASHNAME $_CHIPNAME.flash0
18 flash bank $_FLASHNAME cfi 0x00000000 0x02000000 2 4 $_TARGETNAME
19 set _FLASHNAME $_CHIPNAME.flash1
20 flash bank $_FLASHNAME cfi 0x04000000 0x02000000 2 4 $_TARGETNAME
21
22 # CS2 low -- FPGA registers
23 # CS2 high -- 1 MByte SRAM at 0x0a00.0000 ... last 64K for scratch
24 $_TARGETNAME configure -work-area-phys 0x0a0f0000
25
26 $_TARGETNAME configure -event reset-assert-pre \
27 "$_TARGETNAME configure -work-area-size 0"
28
29 # Make the hex led display a number, assuming CS2 is set up
30 # and all digits have been enabled through the FPGA.
31 proc hexled {u32} {
32 mww 0x08000010 $u32
33 }
34
35 # CS3 -- Ethernet
36 # CS4 -- SA1111
37 # CS5 -- PCMCIA
38
39 # NOTE: system console normally uses the FF UART connector
40
41 proc lubbock_init {target} {
42
43 echo "Initialize PXA255 Lubbock board"
44
45 # (1) pinmux
46
47 # GPSR0..GPSR2
48 mww 0x40e00018 0x00008000
49 mww 0x40e0001c 0x00FC0382
50 mww 0x40e00020 0x0001FFFF
51 # GPDR0..GPDR2
52 mww 0x40e0000c 0x0060A800
53 mww 0x40e00010 0x00FF0382
54 mww 0x40e00014 0x0001C000
55 # GAFR0_[LU]..GAFR2_[LU]
56 mww 0x40e00054 0x98400000
57 mww 0x40e00058 0x00002950
58 mww 0x40e0005c 0x000A9558
59 mww 0x40e00060 0x0005AAAA
60 mww 0x40e00064 0xA0000000
61 mww 0x40e00068 0x00000002
62
63 # write PSSR, enable GPIOs
64 mww 0x40f00000 0x00000020
65
66 # write LED ctrl register ... ones disable
67 # high byte, 8 hex leds; low byte, 8 discretes
68 mwh 0x08000040 0xf0ff
69
70 hexled 0x0000
71
72 # (2) Address space setup
73
74 # MSC0/MSC1/MSC2
75 mww 0x48000008 0x23f223f2
76 mww 0x4800000c 0x3ff1a441
77 mww 0x48000010 0x7ff97ff1
78 # pcmcia/cf
79 mww 0x48000014 0x00000000
80 mww 0x48000028 0x00010504
81 mww 0x4800002c 0x00010504
82 mww 0x48000030 0x00010504
83 mww 0x48000034 0x00010504
84 mww 0x48000038 0x00004715
85 mww 0x4800003c 0x00004715
86
87 hexled 0x1111
88
89 # (3) SDRAM setup
90 # REVISIT this looks dubious ... no refresh cycles
91 mww 0x48000004 0x03CA4018
92 mww 0x48000004 0x004B4018
93 mww 0x48000004 0x000B4018
94 mww 0x48000004 0x000BC018
95 mww 0x48000000 0x00001AC8
96 mww 0x48000000 0x00001AC9
97
98 mww 0x48000040 0x00000000
99
100 # FIXME -- setup:
101 # CLOCKS (and faster JTAG)
102 # enable icache
103
104 # FIXME SRAM isn't working
105 # $target configure -work-area-size 0x10000
106
107 hexled 0x2222
108
109 flash probe 0
110 flash probe 1
111
112 hexled 0xcafe
113 }
114 $_TARGETNAME configure -event reset-init "lubbock_init $_TARGETNAME"

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