src/target/target/sam7x256.cfg

   1 #use combined on interfaces or targets that can't set TRST/SRST separately
   2 reset_config srst_only srst_pulls_trst
   3
   4 #jtag scan chain
   5 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
   6 jtag_device 4 0x1 0xf 0xe
   7
   8 target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
   9 [new_target_name] configure -event reset-init {
  10         # disable watchdog
  11         mww 0xfffffd44 0x00008000
  12         # enable user reset
  13         mww 0xfffffd08 0xa5000001
  14         # CKGR_MOR : enable the main oscillator
  15         mww 0xfffffc20 0x00000601
  16         sleep 10
  17         # CKGR_PLLR: 96.1097 MHz
  18         mww 0xfffffc2c 0x00481c0e
  19         sleep 10
  20         # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
  21         mww 0xfffffc30 0x00000007
  22         sleep 10
  23         # MC_FMR: flash mode (FWS=1,FMCN=60)
  24         mww 0xffffff60 0x003c0100
  25         sleep 100
  26 }
  27
  28 [new_target_name] configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
  29
  30 #flash bank <driver> <base> <size> <chip_width> <bus_width>
  31 flash bank at91sam7 0 0 0 0 0
  32
  33 # For more information about the configuration files, take a look at:
  34 # openocd.texi