1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
20 ***************************************************************************/
27 #include "target_type.h"
28 #include "arm_opcodes.h"
31 #define _DEBUG_INSTRUCTION_EXECUTION_
34 int arm966e_init_arch_info(struct target
*target
, struct arm966e_common
*arm966e
, struct jtag_tap
*tap
)
36 struct arm7_9_common
*arm7_9
= &arm966e
->arm7_9_common
;
38 /* initialize arm7/arm9 specific info (including armv4_5) */
39 arm9tdmi_init_arch_info(target
, arm7_9
, tap
);
41 arm966e
->common_magic
= ARM966E_COMMON_MAGIC
;
43 /* The ARM966E-S implements the ARMv5TE architecture which
44 * has the BKPT instruction, so we don't have to use a watchpoint comparator
46 arm7_9
->arm_bkpt
= ARMV5_BKPT(0x0);
47 arm7_9
->thumb_bkpt
= ARMV5_T_BKPT(0x0) & 0xffff;
52 static int arm966e_target_create(struct target
*target
, Jim_Interp
*interp
)
54 struct arm966e_common
*arm966e
= calloc(1, sizeof(struct arm966e_common
));
56 return arm966e_init_arch_info(target
, arm966e
, target
->tap
);
59 static int arm966e_verify_pointer(struct command_context
*cmd_ctx
,
60 struct arm966e_common
*arm966e
)
62 if (arm966e
->common_magic
!= ARM966E_COMMON_MAGIC
) {
63 command_print(cmd_ctx
, "target is not an ARM966");
64 return ERROR_TARGET_INVALID
;
70 * REVISIT: The "read_cp15" and "write_cp15" commands could hook up
71 * to eventual mrc() and mcr() routines ... the reg_addr values being
72 * constructed (for CP15 only) from Opcode_1, Opcode_2, and CRn values.
73 * See section 7.3 of the ARM966E-S TRM.
76 static int arm966e_read_cp15(struct target
*target
, int reg_addr
, uint32_t *value
)
78 int retval
= ERROR_OK
;
79 struct arm7_9_common
*arm7_9
= target_to_arm7_9(target
);
80 struct arm_jtag
*jtag_info
= &arm7_9
->jtag_info
;
81 struct scan_field fields
[3];
82 uint8_t reg_addr_buf
= reg_addr
& 0x3f;
85 retval
= arm_jtag_scann(jtag_info
, 0xf, TAP_IDLE
);
86 if (retval
!= ERROR_OK
)
88 retval
= arm_jtag_set_instr(jtag_info
->tap
, jtag_info
->intest_instr
, NULL
, TAP_IDLE
);
89 if (retval
!= ERROR_OK
)
92 fields
[0].num_bits
= 32;
93 /* REVISIT: table 7-2 shows that bits 31-31 need to be
94 * specified for accessing BIST registers ...
96 fields
[0].out_value
= NULL
;
97 fields
[0].in_value
= NULL
;
99 fields
[1].num_bits
= 6;
100 fields
[1].out_value
= ®_addr_buf
;
101 fields
[1].in_value
= NULL
;
103 fields
[2].num_bits
= 1;
104 fields
[2].out_value
= &nr_w_buf
;
105 fields
[2].in_value
= NULL
;
107 jtag_add_dr_scan(jtag_info
->tap
, 3, fields
, TAP_IDLE
);
109 fields
[1].in_value
= (uint8_t *)value
;
111 jtag_add_dr_scan(jtag_info
->tap
, 3, fields
, TAP_IDLE
);
113 jtag_add_callback(arm_le_to_h_u32
, (jtag_callback_data_t
)value
);
116 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
117 retval
= jtag_execute_queue();
118 if (retval
!= ERROR_OK
)
120 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr
, *value
);
126 /* EXPORTED to str9x (flash) */
127 int arm966e_write_cp15(struct target
*target
, int reg_addr
, uint32_t value
)
129 int retval
= ERROR_OK
;
130 struct arm7_9_common
*arm7_9
= target_to_arm7_9(target
);
131 struct arm_jtag
*jtag_info
= &arm7_9
->jtag_info
;
132 struct scan_field fields
[3];
133 uint8_t reg_addr_buf
= reg_addr
& 0x3f;
134 uint8_t nr_w_buf
= 1;
135 uint8_t value_buf
[4];
137 buf_set_u32(value_buf
, 0, 32, value
);
139 retval
= arm_jtag_scann(jtag_info
, 0xf, TAP_IDLE
);
140 if (retval
!= ERROR_OK
)
142 retval
= arm_jtag_set_instr(jtag_info
->tap
, jtag_info
->intest_instr
, NULL
, TAP_IDLE
);
143 if (retval
!= ERROR_OK
)
146 fields
[0].num_bits
= 32;
147 fields
[0].out_value
= value_buf
;
148 fields
[0].in_value
= NULL
;
150 fields
[1].num_bits
= 6;
151 fields
[1].out_value
= ®_addr_buf
;
152 fields
[1].in_value
= NULL
;
154 fields
[2].num_bits
= 1;
155 fields
[2].out_value
= &nr_w_buf
;
156 fields
[2].in_value
= NULL
;
158 jtag_add_dr_scan(jtag_info
->tap
, 3, fields
, TAP_IDLE
);
160 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
161 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr
, value
);
167 COMMAND_HANDLER(arm966e_handle_cp15_command
)
170 struct target
*target
= get_current_target(CMD_CTX
);
171 struct arm966e_common
*arm966e
= target_to_arm966(target
);
173 retval
= arm966e_verify_pointer(CMD_CTX
, arm966e
);
174 if (retval
!= ERROR_OK
)
177 if (target
->state
!= TARGET_HALTED
) {
178 command_print(CMD_CTX
, "target must be stopped for \"%s\" command", CMD_NAME
);
182 /* one or more argument, access a single register (write if second argument is given */
185 COMMAND_PARSE_NUMBER(u32
, CMD_ARGV
[0], address
);
189 retval
= arm966e_read_cp15(target
, address
, &value
);
190 if (retval
!= ERROR_OK
) {
191 command_print(CMD_CTX
,
192 "couldn't access reg %" PRIi32
,
196 retval
= jtag_execute_queue();
197 if (retval
!= ERROR_OK
)
200 command_print(CMD_CTX
, "%" PRIi32
": %8.8" PRIx32
,
202 } else if (CMD_ARGC
== 2) {
204 COMMAND_PARSE_NUMBER(u32
, CMD_ARGV
[1], value
);
205 retval
= arm966e_write_cp15(target
, address
, value
);
206 if (retval
!= ERROR_OK
) {
207 command_print(CMD_CTX
,
208 "couldn't access reg %" PRIi32
,
212 command_print(CMD_CTX
, "%" PRIi32
": %8.8" PRIx32
,
220 static const struct command_registration arm966e_exec_command_handlers
[] = {
223 .handler
= arm966e_handle_cp15_command
,
224 .mode
= COMMAND_EXEC
,
225 .usage
= "regnum [value]",
226 .help
= "display/modify cp15 register",
228 COMMAND_REGISTRATION_DONE
231 const struct command_registration arm966e_command_handlers
[] = {
233 .chain
= arm9tdmi_command_handlers
,
238 .help
= "arm966e command group",
240 .chain
= arm966e_exec_command_handlers
,
242 COMMAND_REGISTRATION_DONE
245 /** Holds methods for ARM966 targets. */
246 struct target_type arm966e_target
= {
250 .arch_state
= arm_arch_state
,
252 .target_request_data
= arm7_9_target_request_data
,
255 .resume
= arm7_9_resume
,
258 .assert_reset
= arm7_9_assert_reset
,
259 .deassert_reset
= arm7_9_deassert_reset
,
260 .soft_reset_halt
= arm7_9_soft_reset_halt
,
262 .get_gdb_arch
= arm_get_gdb_arch
,
263 .get_gdb_reg_list
= arm_get_gdb_reg_list
,
265 .read_memory
= arm7_9_read_memory
,
266 .write_memory
= arm7_9_write_memory_opt
,
268 .checksum_memory
= arm_checksum_memory
,
269 .blank_check_memory
= arm_blank_check_memory
,
271 .run_algorithm
= armv4_5_run_algorithm
,
273 .add_breakpoint
= arm7_9_add_breakpoint
,
274 .remove_breakpoint
= arm7_9_remove_breakpoint
,
275 .add_watchpoint
= arm7_9_add_watchpoint
,
276 .remove_watchpoint
= arm7_9_remove_watchpoint
,
278 .commands
= arm966e_command_handlers
,
279 .target_create
= arm966e_target_create
,
280 .init_target
= arm9tdmi_init_target
,
281 .examine
= arm7_9_examine
,
282 .check_reset
= arm7_9_check_reset
,
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