Nicolas Pitre <nico@cam.org> Dragonite support
[openocd.git] / src / target / arm966e.c
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
7 * *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
12 * *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
17 * *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
23 #ifdef HAVE_CONFIG_H
24 #include "config.h"
25 #endif
26
27 #include "arm966e.h"
28 #include "target_type.h"
29
30
31 #if 0
32 #define _DEBUG_INSTRUCTION_EXECUTION_
33 #endif
34
35 /* forward declarations */
36 int arm966e_target_create(struct target_s *target, Jim_Interp *interp);
37 int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
38 int arm966e_quit(void);
39
40 target_type_t arm966e_target =
41 {
42 .name = "arm966e",
43
44 .poll = arm7_9_poll,
45 .arch_state = armv4_5_arch_state,
46
47 .target_request_data = arm7_9_target_request_data,
48
49 .halt = arm7_9_halt,
50 .resume = arm7_9_resume,
51 .step = arm7_9_step,
52
53 .assert_reset = arm7_9_assert_reset,
54 .deassert_reset = arm7_9_deassert_reset,
55 .soft_reset_halt = arm7_9_soft_reset_halt,
56
57 .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
58
59 .read_memory = arm7_9_read_memory,
60 .write_memory = arm7_9_write_memory,
61 .bulk_write_memory = arm7_9_bulk_write_memory,
62 .checksum_memory = arm7_9_checksum_memory,
63 .blank_check_memory = arm7_9_blank_check_memory,
64
65 .run_algorithm = armv4_5_run_algorithm,
66
67 .add_breakpoint = arm7_9_add_breakpoint,
68 .remove_breakpoint = arm7_9_remove_breakpoint,
69 .add_watchpoint = arm7_9_add_watchpoint,
70 .remove_watchpoint = arm7_9_remove_watchpoint,
71
72 .register_commands = arm966e_register_commands,
73 .target_create = arm966e_target_create,
74 .init_target = arm966e_init_target,
75 .examine = arm9tdmi_examine,
76 .quit = arm966e_quit,
77 };
78
79 int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
80 {
81 arm9tdmi_init_target(cmd_ctx, target);
82
83 return ERROR_OK;
84 }
85
86 int arm966e_quit(void)
87 {
88 return ERROR_OK;
89 }
90
91 int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, jtag_tap_t *tap)
92 {
93 arm9tdmi_common_t *arm9tdmi = &arm966e->arm9tdmi_common;
94 arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common;
95
96 arm9tdmi_init_arch_info(target, arm9tdmi, tap);
97
98 arm9tdmi->arch_info = arm966e;
99 arm966e->common_magic = ARM966E_COMMON_MAGIC;
100
101 /* The ARM966E-S implements the ARMv5TE architecture which
102 * has the BKPT instruction, so we don't have to use a watchpoint comparator
103 */
104 arm7_9->arm_bkpt = ARMV5_BKPT(0x0);
105 arm7_9->thumb_bkpt = ARMV5_T_BKPT(0x0) & 0xffff;
106
107 return ERROR_OK;
108 }
109
110 int arm966e_target_create(struct target_s *target, Jim_Interp *interp)
111 {
112 arm966e_common_t *arm966e = calloc(1,sizeof(arm966e_common_t));
113
114 arm966e_init_arch_info(target, arm966e, target->tap);
115
116 return ERROR_OK;
117 }
118
119 int arm966e_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, arm9tdmi_common_t **arm9tdmi_p, arm966e_common_t **arm966e_p)
120 {
121 armv4_5_common_t *armv4_5 = target->arch_info;
122 arm7_9_common_t *arm7_9;
123 arm9tdmi_common_t *arm9tdmi;
124 arm966e_common_t *arm966e;
125
126 if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
127 {
128 return -1;
129 }
130
131 arm7_9 = armv4_5->arch_info;
132 if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC)
133 {
134 return -1;
135 }
136
137 arm9tdmi = arm7_9->arch_info;
138 if (arm9tdmi->common_magic != ARM9TDMI_COMMON_MAGIC)
139 {
140 return -1;
141 }
142
143 arm966e = arm9tdmi->arch_info;
144 if (arm966e->common_magic != ARM966E_COMMON_MAGIC)
145 {
146 return -1;
147 }
148
149 *armv4_5_p = armv4_5;
150 *arm7_9_p = arm7_9;
151 *arm9tdmi_p = arm9tdmi;
152 *arm966e_p = arm966e;
153
154 return ERROR_OK;
155 }
156
157 int arm966e_read_cp15(target_t *target, int reg_addr, uint32_t *value)
158 {
159 int retval = ERROR_OK;
160 armv4_5_common_t *armv4_5 = target->arch_info;
161 arm7_9_common_t *arm7_9 = armv4_5->arch_info;
162 arm_jtag_t *jtag_info = &arm7_9->jtag_info;
163 scan_field_t fields[3];
164 uint8_t reg_addr_buf = reg_addr & 0x3f;
165 uint8_t nr_w_buf = 0;
166
167 jtag_set_end_state(TAP_IDLE);
168 if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
169 {
170 return retval;
171 }
172 arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
173
174 fields[0].tap = jtag_info->tap;
175 fields[0].num_bits = 32;
176 fields[0].out_value = NULL;
177 fields[0].in_value = NULL;
178
179 fields[1].tap = jtag_info->tap;
180 fields[1].num_bits = 6;
181 fields[1].out_value = &reg_addr_buf;
182 fields[1].in_value = NULL;
183
184 fields[2].tap = jtag_info->tap;
185 fields[2].num_bits = 1;
186 fields[2].out_value = &nr_w_buf;
187 fields[2].in_value = NULL;
188
189 jtag_add_dr_scan(3, fields, jtag_get_end_state());
190
191 fields[1].in_value = (uint8_t *)value;
192
193 jtag_add_dr_scan(3, fields, jtag_get_end_state());
194
195 jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)value);
196
197
198 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
199 if ((retval = jtag_execute_queue()) != ERROR_OK)
200 {
201 return retval;
202 }
203 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
204 #endif
205
206 return ERROR_OK;
207 }
208
209 int arm966e_write_cp15(target_t *target, int reg_addr, uint32_t value)
210 {
211 int retval = ERROR_OK;
212 armv4_5_common_t *armv4_5 = target->arch_info;
213 arm7_9_common_t *arm7_9 = armv4_5->arch_info;
214 arm_jtag_t *jtag_info = &arm7_9->jtag_info;
215 scan_field_t fields[3];
216 uint8_t reg_addr_buf = reg_addr & 0x3f;
217 uint8_t nr_w_buf = 1;
218 uint8_t value_buf[4];
219
220 buf_set_u32(value_buf, 0, 32, value);
221
222 jtag_set_end_state(TAP_IDLE);
223 if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
224 {
225 return retval;
226 }
227 arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
228
229 fields[0].tap = jtag_info->tap;
230 fields[0].num_bits = 32;
231 fields[0].out_value = value_buf;
232 fields[0].in_value = NULL;
233
234 fields[1].tap = jtag_info->tap;
235 fields[1].num_bits = 6;
236 fields[1].out_value = &reg_addr_buf;
237 fields[1].in_value = NULL;
238
239 fields[2].tap = jtag_info->tap;
240 fields[2].num_bits = 1;
241 fields[2].out_value = &nr_w_buf;
242 fields[2].in_value = NULL;
243
244 jtag_add_dr_scan(3, fields, jtag_get_end_state());
245
246 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
247 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
248 #endif
249
250 return ERROR_OK;
251 }
252
253 int arm966e_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
254 {
255 int retval;
256 target_t *target = get_current_target(cmd_ctx);
257 armv4_5_common_t *armv4_5;
258 arm7_9_common_t *arm7_9;
259 arm9tdmi_common_t *arm9tdmi;
260 arm966e_common_t *arm966e;
261 arm_jtag_t *jtag_info;
262
263 if (arm966e_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi, &arm966e) != ERROR_OK)
264 {
265 command_print(cmd_ctx, "current target isn't an ARM966e target");
266 return ERROR_OK;
267 }
268
269 jtag_info = &arm7_9->jtag_info;
270
271 if (target->state != TARGET_HALTED)
272 {
273 command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
274 return ERROR_OK;
275 }
276
277 /* one or more argument, access a single register (write if second argument is given */
278 if (argc >= 1)
279 {
280 int address = strtoul(args[0], NULL, 0);
281
282 if (argc == 1)
283 {
284 uint32_t value;
285 if ((retval = arm966e_read_cp15(target, address, &value)) != ERROR_OK)
286 {
287 command_print(cmd_ctx, "couldn't access reg %i", address);
288 return ERROR_OK;
289 }
290 if ((retval = jtag_execute_queue()) != ERROR_OK)
291 {
292 return retval;
293 }
294
295 command_print(cmd_ctx, "%i: %8.8" PRIx32 "", address, value);
296 }
297 else if (argc == 2)
298 {
299 uint32_t value = strtoul(args[1], NULL, 0);
300 if ((retval = arm966e_write_cp15(target, address, value)) != ERROR_OK)
301 {
302 command_print(cmd_ctx, "couldn't access reg %i", address);
303 return ERROR_OK;
304 }
305 command_print(cmd_ctx, "%i: %8.8" PRIx32 "", address, value);
306 }
307 }
308
309 return ERROR_OK;
310 }
311
312 int arm966e_register_commands(struct command_context_s *cmd_ctx)
313 {
314 int retval;
315 command_t *arm966e_cmd;
316
317 retval = arm9tdmi_register_commands(cmd_ctx);
318 arm966e_cmd = register_command(cmd_ctx, NULL, "arm966e", NULL, COMMAND_ANY, "arm966e specific commands");
319 register_command(cmd_ctx, arm966e_cmd, "cp15", arm966e_handle_cp15_command, COMMAND_EXEC, "display/modify cp15 register <num> [value]");
320
321 return retval;
322 }

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