39653c2ef16044c5ae798015058ccf49426d98cb
[openocd.git] / src / target / arm966e.c
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
7 * *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
12 * *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
17 * *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
22 ***************************************************************************/
23
24 #ifdef HAVE_CONFIG_H
25 #include "config.h"
26 #endif
27
28 #include "arm966e.h"
29 #include "target_type.h"
30 #include "arm_opcodes.h"
31
32 #if 0
33 #define _DEBUG_INSTRUCTION_EXECUTION_
34 #endif
35
36 int arm966e_init_arch_info(struct target *target, struct arm966e_common *arm966e, struct jtag_tap *tap)
37 {
38 struct arm7_9_common *arm7_9 = &arm966e->arm7_9_common;
39
40 /* initialize arm7/arm9 specific info (including armv4_5) */
41 arm9tdmi_init_arch_info(target, arm7_9, tap);
42
43 arm966e->common_magic = ARM966E_COMMON_MAGIC;
44
45 /* The ARM966E-S implements the ARMv5TE architecture which
46 * has the BKPT instruction, so we don't have to use a watchpoint comparator
47 */
48 arm7_9->arm_bkpt = ARMV5_BKPT(0x0);
49 arm7_9->thumb_bkpt = ARMV5_T_BKPT(0x0) & 0xffff;
50
51 return ERROR_OK;
52 }
53
54 static int arm966e_target_create(struct target *target, Jim_Interp *interp)
55 {
56 struct arm966e_common *arm966e = calloc(1, sizeof(struct arm966e_common));
57
58 return arm966e_init_arch_info(target, arm966e, target->tap);
59 }
60
61 static int arm966e_verify_pointer(struct command_context *cmd_ctx,
62 struct arm966e_common *arm966e)
63 {
64 if (arm966e->common_magic != ARM966E_COMMON_MAGIC) {
65 command_print(cmd_ctx, "target is not an ARM966");
66 return ERROR_TARGET_INVALID;
67 }
68 return ERROR_OK;
69 }
70
71 /*
72 * REVISIT: The "read_cp15" and "write_cp15" commands could hook up
73 * to eventual mrc() and mcr() routines ... the reg_addr values being
74 * constructed (for CP15 only) from Opcode_1, Opcode_2, and CRn values.
75 * See section 7.3 of the ARM966E-S TRM.
76 */
77
78 static int arm966e_read_cp15(struct target *target, int reg_addr, uint32_t *value)
79 {
80 int retval = ERROR_OK;
81 struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
82 struct arm_jtag *jtag_info = &arm7_9->jtag_info;
83 struct scan_field fields[3];
84 uint8_t reg_addr_buf = reg_addr & 0x3f;
85 uint8_t nr_w_buf = 0;
86
87 retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
88 if (retval != ERROR_OK)
89 return retval;
90 retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
91 if (retval != ERROR_OK)
92 return retval;
93
94 fields[0].num_bits = 32;
95 /* REVISIT: table 7-2 shows that bits 31-31 need to be
96 * specified for accessing BIST registers ...
97 */
98 fields[0].out_value = NULL;
99 fields[0].in_value = NULL;
100
101 fields[1].num_bits = 6;
102 fields[1].out_value = &reg_addr_buf;
103 fields[1].in_value = NULL;
104
105 fields[2].num_bits = 1;
106 fields[2].out_value = &nr_w_buf;
107 fields[2].in_value = NULL;
108
109 jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
110
111 fields[1].in_value = (uint8_t *)value;
112
113 jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
114
115 jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)value);
116
117
118 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
119 retval = jtag_execute_queue();
120 if (retval != ERROR_OK)
121 return retval;
122 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
123 #endif
124
125 return ERROR_OK;
126 }
127
128 /* EXPORTED to str9x (flash) */
129 int arm966e_write_cp15(struct target *target, int reg_addr, uint32_t value)
130 {
131 int retval = ERROR_OK;
132 struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
133 struct arm_jtag *jtag_info = &arm7_9->jtag_info;
134 struct scan_field fields[3];
135 uint8_t reg_addr_buf = reg_addr & 0x3f;
136 uint8_t nr_w_buf = 1;
137 uint8_t value_buf[4];
138
139 buf_set_u32(value_buf, 0, 32, value);
140
141 retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
142 if (retval != ERROR_OK)
143 return retval;
144 retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
145 if (retval != ERROR_OK)
146 return retval;
147
148 fields[0].num_bits = 32;
149 fields[0].out_value = value_buf;
150 fields[0].in_value = NULL;
151
152 fields[1].num_bits = 6;
153 fields[1].out_value = &reg_addr_buf;
154 fields[1].in_value = NULL;
155
156 fields[2].num_bits = 1;
157 fields[2].out_value = &nr_w_buf;
158 fields[2].in_value = NULL;
159
160 jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
161
162 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
163 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
164 #endif
165
166 return ERROR_OK;
167 }
168
169 COMMAND_HANDLER(arm966e_handle_cp15_command)
170 {
171 int retval;
172 struct target *target = get_current_target(CMD_CTX);
173 struct arm966e_common *arm966e = target_to_arm966(target);
174
175 retval = arm966e_verify_pointer(CMD_CTX, arm966e);
176 if (retval != ERROR_OK)
177 return retval;
178
179 if (target->state != TARGET_HALTED) {
180 command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
181 return ERROR_OK;
182 }
183
184 /* one or more argument, access a single register (write if second argument is given */
185 if (CMD_ARGC >= 1) {
186 uint32_t address;
187 COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
188
189 if (CMD_ARGC == 1) {
190 uint32_t value;
191 retval = arm966e_read_cp15(target, address, &value);
192 if (retval != ERROR_OK) {
193 command_print(CMD_CTX,
194 "couldn't access reg %" PRIi32,
195 address);
196 return ERROR_OK;
197 }
198 retval = jtag_execute_queue();
199 if (retval != ERROR_OK)
200 return retval;
201
202 command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32,
203 address, value);
204 } else if (CMD_ARGC == 2) {
205 uint32_t value;
206 COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
207 retval = arm966e_write_cp15(target, address, value);
208 if (retval != ERROR_OK) {
209 command_print(CMD_CTX,
210 "couldn't access reg %" PRIi32,
211 address);
212 return ERROR_OK;
213 }
214 command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32,
215 address, value);
216 }
217 }
218
219 return ERROR_OK;
220 }
221
222 static const struct command_registration arm966e_exec_command_handlers[] = {
223 {
224 .name = "cp15",
225 .handler = arm966e_handle_cp15_command,
226 .mode = COMMAND_EXEC,
227 .usage = "regnum [value]",
228 .help = "display/modify cp15 register",
229 },
230 COMMAND_REGISTRATION_DONE
231 };
232
233 const struct command_registration arm966e_command_handlers[] = {
234 {
235 .chain = arm9tdmi_command_handlers,
236 },
237 {
238 .name = "arm966e",
239 .mode = COMMAND_ANY,
240 .help = "arm966e command group",
241 .usage = "",
242 .chain = arm966e_exec_command_handlers,
243 },
244 COMMAND_REGISTRATION_DONE
245 };
246
247 /** Holds methods for ARM966 targets. */
248 struct target_type arm966e_target = {
249 .name = "arm966e",
250
251 .poll = arm7_9_poll,
252 .arch_state = arm_arch_state,
253
254 .target_request_data = arm7_9_target_request_data,
255
256 .halt = arm7_9_halt,
257 .resume = arm7_9_resume,
258 .step = arm7_9_step,
259
260 .assert_reset = arm7_9_assert_reset,
261 .deassert_reset = arm7_9_deassert_reset,
262 .soft_reset_halt = arm7_9_soft_reset_halt,
263
264 .get_gdb_reg_list = arm_get_gdb_reg_list,
265
266 .read_memory = arm7_9_read_memory,
267 .write_memory = arm7_9_write_memory,
268 .bulk_write_memory = arm7_9_bulk_write_memory,
269
270 .checksum_memory = arm_checksum_memory,
271 .blank_check_memory = arm_blank_check_memory,
272
273 .run_algorithm = armv4_5_run_algorithm,
274
275 .add_breakpoint = arm7_9_add_breakpoint,
276 .remove_breakpoint = arm7_9_remove_breakpoint,
277 .add_watchpoint = arm7_9_add_watchpoint,
278 .remove_watchpoint = arm7_9_remove_watchpoint,
279
280 .commands = arm966e_command_handlers,
281 .target_create = arm966e_target_create,
282 .init_target = arm9tdmi_init_target,
283 .examine = arm7_9_examine,
284 .check_reset = arm7_9_check_reset,
285 };