target/adi_v5_jtag: fix endianness error in transaction replay
[openocd.git] / src / target / adi_v5_jtag.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /***************************************************************************
4 * Copyright (C) 2006 by Magnus Lundin
5 * lundin@mlu.mine.nu
6 *
7 * Copyright (C) 2008 by Spencer Oliver
8 * spen@spen-soft.co.uk
9 *
10 * Copyright (C) 2009 by Oyvind Harboe
11 * oyvind.harboe@zylin.com
12 *
13 * Copyright (C) 2009-2010 by David Brownell
14 *
15 * Copyright (C) 2020-2021, Ampere Computing LLC *
16 ***************************************************************************/
17
18 /**
19 * @file
20 * This file implements JTAG transport support for cores implementing
21 the ARM Debug Interface version 5 (ADIv5) and version 6 (ADIv6).
22 */
23
24 #ifdef HAVE_CONFIG_H
25 #include "config.h"
26 #endif
27
28 #include "arm.h"
29 #include "arm_adi_v5.h"
30 #include <helper/time_support.h>
31 #include <helper/list.h>
32 #include <jtag/swd.h>
33
34 /*#define DEBUG_WAIT*/
35
36 /* JTAG instructions/registers for JTAG-DP and SWJ-DP */
37 #define JTAG_DP_ABORT 0xF8
38 #define JTAG_DP_DPACC 0xFA
39 #define JTAG_DP_APACC 0xFB
40 #define JTAG_DP_IDCODE 0xFE
41
42 /* three-bit ACK values for DPACC and APACC reads */
43 #define JTAG_ACK_WAIT 0x1 /* ADIv5 and ADIv6 */
44 #define JTAG_ACK_OK_FAULT 0x2 /* ADIv5 */
45 #define JTAG_ACK_FAULT 0x2 /* ADIv6 */
46 #define JTAG_ACK_OK 0x4 /* ADIV6 */
47
48 static int jtag_ap_q_abort(struct adiv5_dap *dap, uint8_t *ack);
49
50 #ifdef DEBUG_WAIT
51 static const char *dap_reg_name(struct adiv5_dap *dap, uint8_t instr, uint16_t reg_addr)
52 {
53 char *reg_name = "UNK";
54
55 if (instr == JTAG_DP_DPACC) {
56 switch (reg_addr) {
57 case DP_ABORT:
58 reg_name = "ABORT";
59 break;
60 case DP_CTRL_STAT:
61 reg_name = "CTRL/STAT";
62 break;
63 case DP_SELECT:
64 reg_name = "SELECT";
65 break;
66 case DP_RDBUFF:
67 reg_name = "RDBUFF";
68 break;
69 case DP_DLCR:
70 reg_name = "DLCR";
71 break;
72 default:
73 reg_name = "UNK";
74 break;
75 }
76 }
77
78 if (instr == JTAG_DP_APACC) {
79 if (reg_addr == MEM_AP_REG_CSW(dap))
80 reg_name = "CSW";
81 else if (reg_addr == MEM_AP_REG_TAR(dap))
82 reg_name = "TAR";
83 else if (reg_addr == MEM_AP_REG_TAR64(dap))
84 reg_name = "TAR64";
85 else if (reg_addr == MEM_AP_REG_DRW(dap))
86 reg_name = "DRW";
87 else if (reg_addr == MEM_AP_REG_BD0(dap))
88 reg_name = "BD0";
89 else if (reg_addr == MEM_AP_REG_BD1(dap))
90 reg_name = "BD1";
91 else if (reg_addr == MEM_AP_REG_BD2(dap))
92 reg_name = "BD2";
93 else if (reg_addr == MEM_AP_REG_BD3(dap))
94 reg_name = "BD3";
95 else if (reg_addr == MEM_AP_REG_CFG(dap))
96 reg_name = "CFG";
97 else if (reg_addr == MEM_AP_REG_BASE(dap))
98 reg_name = "BASE";
99 else if (reg_addr == MEM_AP_REG_BASE64(dap))
100 reg_name = "BASE64";
101 else if (reg_addr == AP_REG_IDR(dap))
102 reg_name = "IDR";
103 else
104 reg_name = "UNK";
105 }
106
107 return reg_name;
108 }
109 #endif
110
111 struct dap_cmd {
112 struct list_head lh;
113 uint8_t instr;
114 uint16_t reg_addr;
115 uint8_t rnw;
116 uint8_t *invalue;
117 uint8_t ack;
118 uint32_t memaccess_tck;
119 uint64_t dp_select;
120
121 struct scan_field fields[2];
122 uint8_t out_addr_buf;
123 uint8_t invalue_buf[4];
124 uint8_t outvalue_buf[4];
125 };
126
127 #define MAX_DAP_COMMAND_NUM 65536
128
129 struct dap_cmd_pool {
130 struct list_head lh;
131 struct dap_cmd cmd;
132 };
133
134 static void log_dap_cmd(struct adiv5_dap *dap, const char *header, struct dap_cmd *el)
135 {
136 #ifdef DEBUG_WAIT
137 const char *ack;
138 switch (el->ack) {
139 case JTAG_ACK_WAIT: /* ADIv5 and ADIv6 */
140 ack = "WAIT";
141 break;
142 case JTAG_ACK_OK_FAULT: /* ADIv5, same value as JTAG_ACK_FAULT */
143 /* case JTAG_ACK_FAULT: */ /* ADIv6 */
144 if (is_adiv6(dap))
145 ack = "FAULT";
146 else
147 ack = "OK";
148 break;
149 case JTAG_ACK_OK: /* ADIv6 */
150 if (is_adiv6(dap)) {
151 ack = "OK";
152 break;
153 }
154 /* fall-through */
155 default:
156 ack = "INVAL";
157 break;
158 }
159 LOG_DEBUG("%s: %2s %6s %5s 0x%08x 0x%08x %2s", header,
160 el->instr == JTAG_DP_APACC ? "AP" : "DP",
161 dap_reg_name(dap, el->instr, el->reg_addr),
162 el->rnw == DPAP_READ ? "READ" : "WRITE",
163 buf_get_u32(el->outvalue_buf, 0, 32),
164 buf_get_u32(el->invalue, 0, 32),
165 ack);
166 #endif
167 }
168
169 static int jtag_limit_queue_size(struct adiv5_dap *dap)
170 {
171 if (dap->cmd_pool_size < MAX_DAP_COMMAND_NUM)
172 return ERROR_OK;
173
174 return dap_run(dap);
175 }
176
177 static struct dap_cmd *dap_cmd_new(struct adiv5_dap *dap, uint8_t instr,
178 uint16_t reg_addr, uint8_t rnw,
179 uint8_t *outvalue, uint8_t *invalue,
180 uint32_t memaccess_tck)
181 {
182
183 struct dap_cmd_pool *pool = NULL;
184
185 if (list_empty(&dap->cmd_pool)) {
186 pool = calloc(1, sizeof(struct dap_cmd_pool));
187 if (!pool)
188 return NULL;
189 } else {
190 pool = list_first_entry(&dap->cmd_pool, struct dap_cmd_pool, lh);
191 list_del(&pool->lh);
192 }
193
194 INIT_LIST_HEAD(&pool->lh);
195 dap->cmd_pool_size++;
196
197 struct dap_cmd *cmd = &pool->cmd;
198 INIT_LIST_HEAD(&cmd->lh);
199 cmd->instr = instr;
200 cmd->reg_addr = reg_addr;
201 cmd->rnw = rnw;
202 if (outvalue)
203 memcpy(cmd->outvalue_buf, outvalue, 4);
204 cmd->invalue = (invalue) ? invalue : cmd->invalue_buf;
205 cmd->memaccess_tck = memaccess_tck;
206
207 return cmd;
208 }
209
210 static void dap_cmd_release(struct adiv5_dap *dap, struct dap_cmd *cmd)
211 {
212 struct dap_cmd_pool *pool = container_of(cmd, struct dap_cmd_pool, cmd);
213 if (dap->cmd_pool_size > MAX_DAP_COMMAND_NUM)
214 free(pool);
215 else
216 list_add(&pool->lh, &dap->cmd_pool);
217
218 dap->cmd_pool_size--;
219 }
220
221 static void flush_journal(struct adiv5_dap *dap, struct list_head *lh)
222 {
223 struct dap_cmd *el, *tmp;
224
225 list_for_each_entry_safe(el, tmp, lh, lh) {
226 list_del(&el->lh);
227 dap_cmd_release(dap, el);
228 }
229 }
230
231 static void jtag_quit(struct adiv5_dap *dap)
232 {
233 struct dap_cmd_pool *el, *tmp;
234 struct list_head *lh = &dap->cmd_pool;
235
236 list_for_each_entry_safe(el, tmp, lh, lh) {
237 list_del(&el->lh);
238 free(el);
239 }
240 }
241
242 /***************************************************************************
243 *
244 * DPACC and APACC scanchain access through JTAG-DP (or SWJ-DP)
245 *
246 ***************************************************************************/
247
248 static int adi_jtag_dp_scan_cmd(struct adiv5_dap *dap, struct dap_cmd *cmd, uint8_t *ack)
249 {
250 struct jtag_tap *tap = dap->tap;
251 int retval;
252
253 retval = arm_jtag_set_instr(tap, cmd->instr, NULL, TAP_IDLE);
254 if (retval != ERROR_OK)
255 return retval;
256
257 /* Scan out a read or write operation using some DP or AP register.
258 * For APACC access with any sticky error flag set, this is discarded.
259 */
260 cmd->fields[0].num_bits = 3;
261 buf_set_u32(&cmd->out_addr_buf, 0, 3, ((cmd->reg_addr >> 1) & 0x6) | (cmd->rnw & 0x1));
262 cmd->fields[0].out_value = &cmd->out_addr_buf;
263 cmd->fields[0].in_value = (ack) ? ack : &cmd->ack;
264
265 /* NOTE: if we receive JTAG_ACK_WAIT, the previous operation did not
266 * complete; data we write is discarded, data we read is unpredictable.
267 * When overrun detect is active, STICKYORUN is set.
268 */
269
270 cmd->fields[1].num_bits = 32;
271 cmd->fields[1].out_value = cmd->outvalue_buf;
272 cmd->fields[1].in_value = cmd->invalue;
273
274 jtag_add_dr_scan(tap, 2, cmd->fields, TAP_IDLE);
275
276 /* Add specified number of tck clocks after starting AP register
277 * access or memory bus access, giving the hardware time to complete
278 * the access.
279 * They provide more time for the (MEM) AP to complete the read ...
280 * See "Minimum Response Time" for JTAG-DP, in the ADIv5/ADIv6 spec.
281 */
282 if (cmd->instr == JTAG_DP_APACC && cmd->memaccess_tck != 0)
283 jtag_add_runtest(cmd->memaccess_tck, TAP_IDLE);
284
285 return ERROR_OK;
286 }
287
288 static int adi_jtag_dp_scan_cmd_sync(struct adiv5_dap *dap, struct dap_cmd *cmd, uint8_t *ack)
289 {
290 int retval;
291
292 retval = adi_jtag_dp_scan_cmd(dap, cmd, ack);
293 if (retval != ERROR_OK)
294 return retval;
295
296 return jtag_execute_queue();
297 }
298
299 /**
300 * Scan DPACC or APACC using target ordered uint8_t buffers. No endianness
301 * conversions are performed. See section 4.4.3 of the ADIv5/ADIv6 spec, which
302 * discusses operations which access these registers.
303 *
304 * Note that only one scan is performed. If rnw is set, a separate scan
305 * will be needed to collect the data which was read; the "invalue" collects
306 * the posted result of a preceding operation, not the current one.
307 *
308 * @param dap the DAP
309 * @param instr JTAG_DP_APACC (AP access) or JTAG_DP_DPACC (DP access)
310 * @param reg_addr two significant bits; A[3:2]; for APACC access, the
311 * SELECT register has more addressing bits.
312 * @param rnw false iff outvalue will be written to the DP or AP
313 * @param outvalue points to a 32-bit (little-endian) integer
314 * @param invalue NULL, or points to a 32-bit (little-endian) integer
315 * @param ack points to where the three bit JTAG_ACK_* code will be stored
316 * @param memaccess_tck number of idle cycles to add after AP access
317 */
318
319 static int adi_jtag_dp_scan(struct adiv5_dap *dap,
320 uint8_t instr, uint16_t reg_addr, uint8_t rnw,
321 uint8_t *outvalue, uint8_t *invalue,
322 uint32_t memaccess_tck, uint8_t *ack)
323 {
324 struct dap_cmd *cmd;
325 int retval;
326
327 cmd = dap_cmd_new(dap, instr, reg_addr, rnw, outvalue, invalue, memaccess_tck);
328 if (cmd)
329 cmd->dp_select = dap->select;
330 else
331 return ERROR_JTAG_DEVICE_ERROR;
332
333 retval = adi_jtag_dp_scan_cmd(dap, cmd, ack);
334 if (retval == ERROR_OK)
335 list_add_tail(&cmd->lh, &dap->cmd_journal);
336
337 return retval;
338 }
339
340 /**
341 * Scan DPACC or APACC out and in from host ordered uint32_t buffers.
342 * This is exactly like adi_jtag_dp_scan(), except that endianness
343 * conversions are performed (so the types of invalue and outvalue
344 * must be different).
345 */
346 static int adi_jtag_dp_scan_u32(struct adiv5_dap *dap,
347 uint8_t instr, uint16_t reg_addr, uint8_t rnw,
348 uint32_t outvalue, uint32_t *invalue,
349 uint32_t memaccess_tck, uint8_t *ack)
350 {
351 uint8_t out_value_buf[4];
352 int retval;
353 uint64_t sel = (reg_addr >> 4) & 0xf;
354
355 /* No need to change SELECT or RDBUFF as they are not banked */
356 if (instr == JTAG_DP_DPACC && reg_addr != DP_SELECT && reg_addr != DP_RDBUFF &&
357 sel != (dap->select & 0xf)) {
358 if (dap->select != DP_SELECT_INVALID)
359 sel |= dap->select & ~0xfull;
360 dap->select = sel;
361 LOG_DEBUG("DP BANKSEL: %x", (uint32_t)sel);
362 buf_set_u32(out_value_buf, 0, 32, (uint32_t)sel);
363 retval = adi_jtag_dp_scan(dap, JTAG_DP_DPACC,
364 DP_SELECT, DPAP_WRITE, out_value_buf, NULL, 0, NULL);
365 if (retval != ERROR_OK)
366 return retval;
367 }
368 buf_set_u32(out_value_buf, 0, 32, outvalue);
369
370 retval = adi_jtag_dp_scan(dap, instr, reg_addr, rnw,
371 out_value_buf, (uint8_t *)invalue, memaccess_tck, ack);
372 if (retval != ERROR_OK)
373 return retval;
374
375 if (invalue)
376 jtag_add_callback(arm_le_to_h_u32,
377 (jtag_callback_data_t) invalue);
378
379 return retval;
380 }
381
382 static int adi_jtag_finish_read(struct adiv5_dap *dap)
383 {
384 int retval = ERROR_OK;
385
386 if (dap->last_read) {
387 retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC,
388 DP_RDBUFF, DPAP_READ, 0, dap->last_read, 0, NULL);
389 dap->last_read = NULL;
390 }
391
392 return retval;
393 }
394
395 static int adi_jtag_scan_inout_check_u32(struct adiv5_dap *dap,
396 uint8_t instr, uint16_t reg_addr, uint8_t rnw,
397 uint32_t outvalue, uint32_t *invalue, uint32_t memaccess_tck)
398 {
399 int retval;
400
401 /* Issue the read or write */
402 retval = adi_jtag_dp_scan_u32(dap, instr, reg_addr,
403 rnw, outvalue, NULL, memaccess_tck, NULL);
404 if (retval != ERROR_OK)
405 return retval;
406
407 /* For reads, collect posted value; RDBUFF has no other effect.
408 * Assumes read gets acked with OK/FAULT, and CTRL_STAT says "OK".
409 */
410 if ((rnw == DPAP_READ) && (invalue)) {
411 retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC,
412 DP_RDBUFF, DPAP_READ, 0, invalue, 0, NULL);
413 if (retval != ERROR_OK)
414 return retval;
415 }
416
417 return jtag_execute_queue();
418 }
419
420 static int jtagdp_overrun_check(struct adiv5_dap *dap)
421 {
422 int retval;
423 struct dap_cmd *el, *tmp, *prev = NULL;
424 int found_wait = 0;
425 int64_t time_now;
426 LIST_HEAD(replay_list);
427
428 /* make sure all queued transactions are complete */
429 retval = jtag_execute_queue();
430 if (retval != ERROR_OK)
431 goto done;
432
433 /* skip all completed transactions up to the first WAIT */
434 list_for_each_entry(el, &dap->cmd_journal, lh) {
435 /*
436 * JTAG_ACK_OK_FAULT (ADIv5) and JTAG_ACK_FAULT (ADIv6) are equal so
437 * the following statement is checking to see if an acknowledgment of
438 * OK or FAULT is generated for ADIv5 or ADIv6
439 */
440 if (el->ack == JTAG_ACK_OK_FAULT || (is_adiv6(dap) && el->ack == JTAG_ACK_OK)) {
441 log_dap_cmd(dap, "LOG", el);
442 } else if (el->ack == JTAG_ACK_WAIT) {
443 found_wait = 1;
444 break;
445 } else {
446 LOG_ERROR("Invalid ACK (%1x) in DAP response", el->ack);
447 log_dap_cmd(dap, "ERR", el);
448 retval = ERROR_JTAG_DEVICE_ERROR;
449 goto done;
450 }
451 }
452
453 /*
454 * If we found a stalled transaction and a previous transaction
455 * exists, check if it's a READ access.
456 */
457 if (found_wait && el != list_first_entry(&dap->cmd_journal, struct dap_cmd, lh)) {
458 prev = list_entry(el->lh.prev, struct dap_cmd, lh);
459 if (prev->rnw == DPAP_READ) {
460 log_dap_cmd(dap, "PND", prev);
461 /* search for the next OK transaction, it contains
462 * the result of the previous READ */
463 tmp = el;
464 list_for_each_entry_from(tmp, &dap->cmd_journal, lh) {
465 /* The following check covers OK and FAULT ACKs for both ADIv5 and ADIv6 */
466 if (tmp->ack == JTAG_ACK_OK_FAULT || (is_adiv6(dap) && tmp->ack == JTAG_ACK_OK)) {
467 /* recover the read value */
468 log_dap_cmd(dap, "FND", tmp);
469 if (el->invalue != el->invalue_buf) {
470 uint32_t invalue = le_to_h_u32(tmp->invalue);
471 memcpy(el->invalue, &invalue, sizeof(uint32_t));
472 }
473 prev = NULL;
474 break;
475 }
476 }
477
478 if (prev) {
479 log_dap_cmd(dap, "LST", el);
480
481 /*
482 * At this point we're sure that no previous
483 * transaction completed and the DAP/AP is still
484 * in busy state. We know that the next "OK" scan
485 * will return the READ result we need to recover.
486 * To complete the READ, we just keep polling RDBUFF
487 * until the WAIT condition clears
488 */
489 tmp = dap_cmd_new(dap, JTAG_DP_DPACC,
490 DP_RDBUFF, DPAP_READ, NULL, NULL, 0);
491 if (!tmp) {
492 retval = ERROR_JTAG_DEVICE_ERROR;
493 goto done;
494 }
495 /* synchronously retry the command until it succeeds */
496 time_now = timeval_ms();
497 do {
498 retval = adi_jtag_dp_scan_cmd_sync(dap, tmp, NULL);
499 if (retval != ERROR_OK)
500 break;
501 /* The following check covers OK and FAULT ACKs for both ADIv5 and ADIv6 */
502 if (tmp->ack == JTAG_ACK_OK_FAULT || (is_adiv6(dap) && tmp->ack == JTAG_ACK_OK)) {
503 log_dap_cmd(dap, "FND", tmp);
504 if (el->invalue != el->invalue_buf) {
505 uint32_t invalue = le_to_h_u32(tmp->invalue);
506 memcpy(el->invalue, &invalue, sizeof(uint32_t));
507 }
508 break;
509 }
510 if (tmp->ack != JTAG_ACK_WAIT) {
511 LOG_ERROR("Invalid ACK (%1x) in DAP response", tmp->ack);
512 log_dap_cmd(dap, "ERR", tmp);
513 retval = ERROR_JTAG_DEVICE_ERROR;
514 break;
515 }
516
517 } while (timeval_ms() - time_now < 1000);
518
519 if (retval == ERROR_OK) {
520 /* timeout happened */
521 if (tmp->ack == JTAG_ACK_WAIT) {
522 LOG_ERROR("Timeout during WAIT recovery");
523 dap->select = DP_SELECT_INVALID;
524 jtag_ap_q_abort(dap, NULL);
525 /* clear the sticky overrun condition */
526 adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
527 DP_CTRL_STAT, DPAP_WRITE,
528 dap->dp_ctrl_stat | SSTICKYORUN, NULL, 0);
529 retval = ERROR_JTAG_DEVICE_ERROR;
530 }
531 }
532
533 /* we're done with this command, release it */
534 dap_cmd_release(dap, tmp);
535
536 if (retval != ERROR_OK)
537 goto done;
538
539 }
540 /* make el->invalue point to the default invalue
541 * so that we can safely retry it without clobbering
542 * the result we just recovered */
543 el->invalue = el->invalue_buf;
544 }
545 }
546
547 /* move all remaining transactions over to the replay list */
548 list_for_each_entry_safe_from(el, tmp, &dap->cmd_journal, lh) {
549 log_dap_cmd(dap, "REP", el);
550 list_move_tail(&el->lh, &replay_list);
551 }
552
553 /* we're done with the journal, flush it */
554 flush_journal(dap, &dap->cmd_journal);
555
556 /* check for overrun condition in the last batch of transactions */
557 if (found_wait) {
558 LOG_INFO("DAP transaction stalled (WAIT) - slowing down and resending");
559 /* clear the sticky overrun condition */
560 retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
561 DP_CTRL_STAT, DPAP_WRITE,
562 dap->dp_ctrl_stat | SSTICKYORUN, NULL, 0);
563 if (retval != ERROR_OK)
564 goto done;
565
566 /* restore SELECT register first */
567 if (!list_empty(&replay_list)) {
568 el = list_first_entry(&replay_list, struct dap_cmd, lh);
569
570 uint8_t out_value_buf[4];
571 buf_set_u32(out_value_buf, 0, 32, (uint32_t)(el->dp_select));
572
573 tmp = dap_cmd_new(dap, JTAG_DP_DPACC,
574 DP_SELECT, DPAP_WRITE, out_value_buf, NULL, 0);
575 if (!tmp) {
576 retval = ERROR_JTAG_DEVICE_ERROR;
577 goto done;
578 }
579 list_add(&tmp->lh, &replay_list);
580
581 /* TODO: ADIv6 DP SELECT1 handling */
582
583 dap->select = DP_SELECT_INVALID;
584 }
585
586 list_for_each_entry_safe(el, tmp, &replay_list, lh) {
587 time_now = timeval_ms();
588 do {
589 retval = adi_jtag_dp_scan_cmd_sync(dap, el, NULL);
590 if (retval != ERROR_OK)
591 break;
592 log_dap_cmd(dap, "REC", el);
593 if (el->ack == JTAG_ACK_OK_FAULT || (is_adiv6(dap) && el->ack == JTAG_ACK_OK)) {
594 if (el->invalue != el->invalue_buf) {
595 uint32_t invalue = le_to_h_u32(el->invalue);
596 memcpy(el->invalue, &invalue, sizeof(uint32_t));
597 }
598 break;
599 }
600 if (el->ack != JTAG_ACK_WAIT) {
601 LOG_ERROR("Invalid ACK (%1x) in DAP response", el->ack);
602 log_dap_cmd(dap, "ERR", el);
603 retval = ERROR_JTAG_DEVICE_ERROR;
604 break;
605 }
606 LOG_DEBUG("DAP transaction stalled during replay (WAIT) - resending");
607 /* clear the sticky overrun condition */
608 retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
609 DP_CTRL_STAT, DPAP_WRITE,
610 dap->dp_ctrl_stat | SSTICKYORUN, NULL, 0);
611 if (retval != ERROR_OK)
612 break;
613 } while (timeval_ms() - time_now < 1000);
614
615 if (retval == ERROR_OK) {
616 if (el->ack == JTAG_ACK_WAIT) {
617 LOG_ERROR("Timeout during WAIT recovery");
618 dap->select = DP_SELECT_INVALID;
619 jtag_ap_q_abort(dap, NULL);
620 /* clear the sticky overrun condition */
621 adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
622 DP_CTRL_STAT, DPAP_WRITE,
623 dap->dp_ctrl_stat | SSTICKYORUN, NULL, 0);
624 retval = ERROR_JTAG_DEVICE_ERROR;
625 break;
626 }
627 } else
628 break;
629 }
630 }
631
632 done:
633 flush_journal(dap, &replay_list);
634 flush_journal(dap, &dap->cmd_journal);
635 return retval;
636 }
637
638 static int jtagdp_transaction_endcheck(struct adiv5_dap *dap)
639 {
640 int retval;
641 uint32_t ctrlstat, pwrmask;
642
643 /* too expensive to call keep_alive() here */
644
645 /* Post CTRL/STAT read; discard any previous posted read value
646 * but collect its ACK status.
647 */
648 retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
649 DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat, 0);
650 if (retval != ERROR_OK)
651 goto done;
652
653 /* REVISIT also STICKYCMP, for pushed comparisons (nyet used) */
654
655 /* Check for STICKYERR */
656 if (ctrlstat & SSTICKYERR) {
657 LOG_DEBUG("jtag-dp: CTRL/STAT 0x%" PRIx32, ctrlstat);
658 /* Check power to debug regions */
659 pwrmask = CDBGPWRUPREQ | CDBGPWRUPACK | CSYSPWRUPREQ;
660 if (!dap->ignore_syspwrupack)
661 pwrmask |= CSYSPWRUPACK;
662 if ((ctrlstat & pwrmask) != pwrmask) {
663 LOG_ERROR("Debug regions are unpowered, an unexpected reset might have happened");
664 dap->do_reconnect = true;
665 }
666
667 if (ctrlstat & SSTICKYERR)
668 LOG_ERROR("JTAG-DP STICKY ERROR");
669 if (ctrlstat & SSTICKYORUN)
670 LOG_DEBUG("JTAG-DP STICKY OVERRUN");
671
672 /* Clear Sticky Error and Sticky Overrun Bits */
673 retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
674 DP_CTRL_STAT, DPAP_WRITE,
675 dap->dp_ctrl_stat | SSTICKYERR | SSTICKYORUN, NULL, 0);
676 if (retval != ERROR_OK)
677 goto done;
678
679 retval = ERROR_JTAG_DEVICE_ERROR;
680 }
681
682 done:
683 flush_journal(dap, &dap->cmd_journal);
684 return retval;
685 }
686
687 /*--------------------------------------------------------------------------*/
688
689 static int jtag_connect(struct adiv5_dap *dap)
690 {
691 dap->do_reconnect = false;
692 return dap_dp_init(dap);
693 }
694
695 static int jtag_check_reconnect(struct adiv5_dap *dap)
696 {
697 if (dap->do_reconnect)
698 return jtag_connect(dap);
699
700 return ERROR_OK;
701 }
702
703 static int jtag_send_sequence(struct adiv5_dap *dap, enum swd_special_seq seq)
704 {
705 int retval;
706
707 switch (seq) {
708 case JTAG_TO_SWD:
709 retval = jtag_add_tms_seq(swd_seq_jtag_to_swd_len,
710 swd_seq_jtag_to_swd, TAP_INVALID);
711 break;
712 case SWD_TO_JTAG:
713 retval = jtag_add_tms_seq(swd_seq_swd_to_jtag_len,
714 swd_seq_swd_to_jtag, TAP_RESET);
715 break;
716 default:
717 LOG_ERROR("Sequence %d not supported", seq);
718 return ERROR_FAIL;
719 }
720 if (retval == ERROR_OK)
721 retval = jtag_execute_queue();
722 return retval;
723 }
724
725 static int jtag_dp_q_read(struct adiv5_dap *dap, unsigned reg,
726 uint32_t *data)
727 {
728 int retval = jtag_limit_queue_size(dap);
729 if (retval != ERROR_OK)
730 return retval;
731
732 retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC, reg,
733 DPAP_READ, 0, dap->last_read, 0, NULL);
734 dap->last_read = data;
735 return retval;
736 }
737
738 static int jtag_dp_q_write(struct adiv5_dap *dap, unsigned reg,
739 uint32_t data)
740 {
741 int retval = jtag_limit_queue_size(dap);
742 if (retval != ERROR_OK)
743 return retval;
744
745 retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC,
746 reg, DPAP_WRITE, data, dap->last_read, 0, NULL);
747 dap->last_read = NULL;
748 return retval;
749 }
750
751 /** Select the AP register bank matching bits 7:4 of reg. */
752 static int jtag_ap_q_bankselect(struct adiv5_ap *ap, unsigned reg)
753 {
754 int retval;
755 struct adiv5_dap *dap = ap->dap;
756 uint64_t sel;
757
758 if (is_adiv6(dap)) {
759 sel = ap->ap_num | (reg & 0x00000FF0);
760 if (sel == (dap->select & ~0xfull))
761 return ERROR_OK;
762
763 if (dap->select != DP_SELECT_INVALID)
764 sel |= dap->select & 0xf;
765 dap->select = sel;
766 LOG_DEBUG("AP BANKSEL: %" PRIx64, sel);
767
768 retval = jtag_dp_q_write(dap, DP_SELECT, (uint32_t)sel);
769 if (retval != ERROR_OK)
770 return retval;
771
772 if (dap->asize > 32)
773 return jtag_dp_q_write(dap, DP_SELECT1, (uint32_t)(sel >> 32));
774 return ERROR_OK;
775 }
776
777 /* ADIv5 */
778 sel = (ap->ap_num << 24) | (reg & 0x000000F0);
779
780 if (sel == dap->select)
781 return ERROR_OK;
782
783 dap->select = sel;
784
785 return jtag_dp_q_write(dap, DP_SELECT, (uint32_t)sel);
786 }
787
788 static int jtag_ap_q_read(struct adiv5_ap *ap, unsigned reg,
789 uint32_t *data)
790 {
791 int retval = jtag_limit_queue_size(ap->dap);
792 if (retval != ERROR_OK)
793 return retval;
794
795 retval = jtag_check_reconnect(ap->dap);
796 if (retval != ERROR_OK)
797 return retval;
798
799 retval = jtag_ap_q_bankselect(ap, reg);
800 if (retval != ERROR_OK)
801 return retval;
802
803 retval = adi_jtag_dp_scan_u32(ap->dap, JTAG_DP_APACC, reg,
804 DPAP_READ, 0, ap->dap->last_read, ap->memaccess_tck, NULL);
805 ap->dap->last_read = data;
806
807 return retval;
808 }
809
810 static int jtag_ap_q_write(struct adiv5_ap *ap, unsigned reg,
811 uint32_t data)
812 {
813 int retval = jtag_limit_queue_size(ap->dap);
814 if (retval != ERROR_OK)
815 return retval;
816
817 retval = jtag_check_reconnect(ap->dap);
818 if (retval != ERROR_OK)
819 return retval;
820
821 retval = jtag_ap_q_bankselect(ap, reg);
822 if (retval != ERROR_OK)
823 return retval;
824
825 retval = adi_jtag_dp_scan_u32(ap->dap, JTAG_DP_APACC, reg,
826 DPAP_WRITE, data, ap->dap->last_read, ap->memaccess_tck, NULL);
827 ap->dap->last_read = NULL;
828 return retval;
829 }
830
831 static int jtag_ap_q_abort(struct adiv5_dap *dap, uint8_t *ack)
832 {
833 /* for JTAG, this is the only valid ABORT register operation */
834 int retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_ABORT,
835 0, DPAP_WRITE, 1, NULL, 0, NULL);
836 if (retval != ERROR_OK)
837 return retval;
838
839 return jtag_execute_queue();
840 }
841
842 static int jtag_dp_run(struct adiv5_dap *dap)
843 {
844 int retval;
845 int retval2 = ERROR_OK;
846
847 retval = adi_jtag_finish_read(dap);
848 if (retval != ERROR_OK)
849 goto done;
850 retval2 = jtagdp_overrun_check(dap);
851 retval = jtagdp_transaction_endcheck(dap);
852
853 done:
854 return (retval2 != ERROR_OK) ? retval2 : retval;
855 }
856
857 static int jtag_dp_sync(struct adiv5_dap *dap)
858 {
859 return jtagdp_overrun_check(dap);
860 }
861
862 /* FIXME don't export ... just initialize as
863 * part of DAP setup
864 */
865 const struct dap_ops jtag_dp_ops = {
866 .connect = jtag_connect,
867 .send_sequence = jtag_send_sequence,
868 .queue_dp_read = jtag_dp_q_read,
869 .queue_dp_write = jtag_dp_q_write,
870 .queue_ap_read = jtag_ap_q_read,
871 .queue_ap_write = jtag_ap_q_write,
872 .queue_ap_abort = jtag_ap_q_abort,
873 .run = jtag_dp_run,
874 .sync = jtag_dp_sync,
875 .quit = jtag_quit,
876 };

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