f972191731c751f33b6f4b01509d1a606207af83
[openocd.git] / src / jtag / zy1000 / zy1000.c
1 /***************************************************************************
2 * Copyright (C) 2007-2010 by Øyvind Harboe *
3 * *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
8 * *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
13 * *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
19
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
21 *
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
28 *
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
32 *
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
35 *
36 * See Zylin web pages or contact Zylin for more information.
37 *
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
42 * systems(PCs).
43 */
44 #ifdef HAVE_CONFIG_H
45 #include "config.h"
46 #endif
47
48 #include <target/embeddedice.h>
49 #include <jtag/minidriver.h>
50 #include <jtag/interface.h>
51 #include <time.h>
52 #include <helper/time_support.h>
53
54 #include <netinet/tcp.h>
55
56 #if BUILD_ECOSBOARD
57 #include "zy1000_version.h"
58
59 #include <cyg/hal/hal_io.h> // low level i/o
60 #include <cyg/hal/hal_diag.h>
61
62 #ifdef CYGPKG_HAL_NIOS2
63 #include <cyg/hal/io.h>
64 #include <cyg/firmwareutil/firmwareutil.h>
65 #define ZYLIN_KHZ 60000
66 #else
67 #define ZYLIN_KHZ 64000
68 #endif
69
70 #define ZYLIN_VERSION GIT_ZY1000_VERSION
71 #define ZYLIN_DATE __DATE__
72 #define ZYLIN_TIME __TIME__
73 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
74 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
75
76 #else
77 /* Assume we're connecting to a revc w/60MHz clock. */
78 #define ZYLIN_KHZ 60000
79 #endif
80
81
82 /* The software needs to check if it's in RCLK mode or not */
83 static bool zy1000_rclk = false;
84
85 static int zy1000_khz(int khz, int *jtag_speed)
86 {
87 if (khz == 0)
88 {
89 *jtag_speed = 0;
90 }
91 else
92 {
93 int speed;
94 /* Round speed up to nearest divisor.
95 *
96 * E.g. 16000kHz
97 * (64000 + 15999) / 16000 = 4
98 * (4 + 1) / 2 = 2
99 * 2 * 2 = 4
100 *
101 * 64000 / 4 = 16000
102 *
103 * E.g. 15999
104 * (64000 + 15998) / 15999 = 5
105 * (5 + 1) / 2 = 3
106 * 3 * 2 = 6
107 *
108 * 64000 / 6 = 10666
109 *
110 */
111 speed = (ZYLIN_KHZ + (khz -1)) / khz;
112 speed = (speed + 1 ) / 2;
113 speed *= 2;
114 if (speed > 8190)
115 {
116 /* maximum dividend */
117 speed = 8190;
118 }
119 *jtag_speed = speed;
120 }
121 return ERROR_OK;
122 }
123
124 static int zy1000_speed_div(int speed, int *khz)
125 {
126 if (speed == 0)
127 {
128 *khz = 0;
129 }
130 else
131 {
132 *khz = ZYLIN_KHZ / speed;
133 }
134
135 return ERROR_OK;
136 }
137
138 static bool readPowerDropout(void)
139 {
140 uint32_t state;
141 // sample and clear power dropout
142 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
143 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
144 bool powerDropout;
145 powerDropout = (state & 0x80) != 0;
146 return powerDropout;
147 }
148
149
150 static bool readSRST(void)
151 {
152 uint32_t state;
153 // sample and clear SRST sensing
154 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
155 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
156 bool srstAsserted;
157 srstAsserted = (state & 0x40) != 0;
158 return srstAsserted;
159 }
160
161 static int zy1000_srst_asserted(int *srst_asserted)
162 {
163 *srst_asserted = readSRST();
164 return ERROR_OK;
165 }
166
167 static int zy1000_power_dropout(int *dropout)
168 {
169 *dropout = readPowerDropout();
170 return ERROR_OK;
171 }
172
173 void zy1000_reset(int trst, int srst)
174 {
175 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
176
177 /* flush the JTAG FIFO. Not flushing the queue before messing with
178 * reset has such interesting bugs as causing hard to reproduce
179 * RCLK bugs as RCLK will stop responding when TRST is asserted
180 */
181 waitIdle();
182
183 if (!srst)
184 {
185 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000001);
186 }
187 else
188 {
189 /* Danger!!! if clk != 0 when in
190 * idle in TAP_IDLE, reset halt on str912 will fail.
191 */
192 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000001);
193 }
194
195 if (!trst)
196 {
197 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000002);
198 }
199 else
200 {
201 /* assert reset */
202 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000002);
203 }
204
205 if (trst||(srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
206 {
207 /* we're now in the RESET state until trst is deasserted */
208 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_RESET);
209 } else
210 {
211 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
212 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
213 }
214
215 /* wait for srst to float back up */
216 if ((!srst && ((jtag_get_reset_config() & RESET_TRST_PULLS_SRST) == 0))||
217 (!srst && !trst && (jtag_get_reset_config() & RESET_TRST_PULLS_SRST)))
218 {
219 bool first = true;
220 long long start = 0;
221 long total = 0;
222 for (;;)
223 {
224 // We don't want to sense our own reset, so we clear here.
225 // There is of course a timing hole where we could loose
226 // a "real" reset.
227 if (!readSRST())
228 {
229 if (total > 1)
230 {
231 LOG_USER("SRST took %dms to deassert", (int)total);
232 }
233 break;
234 }
235
236 if (first)
237 {
238 first = false;
239 start = timeval_ms();
240 }
241
242 total = timeval_ms() - start;
243
244 keep_alive();
245
246 if (total > 5000)
247 {
248 LOG_ERROR("SRST took too long to deassert: %dms", (int)total);
249 break;
250 }
251 }
252
253 }
254 }
255
256 int zy1000_speed(int speed)
257 {
258 /* flush JTAG master FIFO before setting speed */
259 waitIdle();
260
261 zy1000_rclk = false;
262
263 if (speed == 0)
264 {
265 /*0 means RCLK*/
266 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x100);
267 zy1000_rclk = true;
268 LOG_DEBUG("jtag_speed using RCLK");
269 }
270 else
271 {
272 if (speed > 8190 || speed < 2)
273 {
274 LOG_USER("valid ZY1000 jtag_speed=[8190,2]. With divisor is %dkHz / even values between 8190-2, i.e. min %dHz, max %dMHz",
275 ZYLIN_KHZ, (ZYLIN_KHZ * 1000) / 8190, ZYLIN_KHZ / (2 * 1000));
276 return ERROR_INVALID_ARGUMENTS;
277 }
278
279 int khz;
280 speed &= ~1;
281 zy1000_speed_div(speed, &khz);
282 LOG_USER("jtag_speed %d => JTAG clk=%d kHz", speed, khz);
283 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x100);
284 ZY1000_POKE(ZY1000_JTAG_BASE + 0x1c, speed);
285 }
286 return ERROR_OK;
287 }
288
289 static bool savePower;
290
291
292 static void setPower(bool power)
293 {
294 savePower = power;
295 if (power)
296 {
297 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
298 } else
299 {
300 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
301 }
302 }
303
304 COMMAND_HANDLER(handle_power_command)
305 {
306 switch (CMD_ARGC)
307 {
308 case 1: {
309 bool enable;
310 COMMAND_PARSE_ON_OFF(CMD_ARGV[0], enable);
311 setPower(enable);
312 // fall through
313 }
314 case 0:
315 LOG_INFO("Target power %s", savePower ? "on" : "off");
316 break;
317 default:
318 return ERROR_INVALID_ARGUMENTS;
319 }
320
321 return ERROR_OK;
322 }
323
324 #if !BUILD_ZY1000_MASTER
325 static char *tcp_server = "notspecified";
326 static int jim_zy1000_server(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
327 {
328 if (argc != 2)
329 return JIM_ERR;
330
331 tcp_server = strdup(Jim_GetString(argv[1], NULL));
332
333 return JIM_OK;
334 }
335 #endif
336
337 #if BUILD_ECOSBOARD
338 /* Give TELNET a way to find out what version this is */
339 static int jim_zy1000_version(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
340 {
341 if ((argc < 1) || (argc > 3))
342 return JIM_ERR;
343 const char *version_str = NULL;
344
345 if (argc == 1)
346 {
347 version_str = ZYLIN_OPENOCD_VERSION;
348 } else
349 {
350 const char *str = Jim_GetString(argv[1], NULL);
351 const char *str2 = NULL;
352 if (argc > 2)
353 str2 = Jim_GetString(argv[2], NULL);
354 if (strcmp("openocd", str) == 0)
355 {
356 version_str = ZYLIN_OPENOCD;
357 }
358 else if (strcmp("zy1000", str) == 0)
359 {
360 version_str = ZYLIN_VERSION;
361 }
362 else if (strcmp("date", str) == 0)
363 {
364 version_str = ZYLIN_DATE;
365 }
366 else if (strcmp("time", str) == 0)
367 {
368 version_str = ZYLIN_TIME;
369 }
370 else if (strcmp("pcb", str) == 0)
371 {
372 #ifdef CYGPKG_HAL_NIOS2
373 version_str="c";
374 #else
375 version_str="b";
376 #endif
377 }
378 #ifdef CYGPKG_HAL_NIOS2
379 else if (strcmp("fpga", str) == 0)
380 {
381
382 /* return a list of 32 bit integers to describe the expected
383 * and actual FPGA
384 */
385 static char *fpga_id = "0x12345678 0x12345678 0x12345678 0x12345678";
386 uint32_t id, timestamp;
387 HAL_READ_UINT32(SYSID_BASE, id);
388 HAL_READ_UINT32(SYSID_BASE+4, timestamp);
389 sprintf(fpga_id, "0x%08x 0x%08x 0x%08x 0x%08x", id, timestamp, SYSID_ID, SYSID_TIMESTAMP);
390 version_str = fpga_id;
391 if ((argc>2) && (strcmp("time", str2) == 0))
392 {
393 time_t last_mod = timestamp;
394 char * t = ctime (&last_mod) ;
395 t[strlen(t)-1] = 0;
396 version_str = t;
397 }
398 }
399 #endif
400
401 else
402 {
403 return JIM_ERR;
404 }
405 }
406
407 Jim_SetResult(interp, Jim_NewStringObj(interp, version_str, -1));
408
409 return JIM_OK;
410 }
411 #endif
412
413 #ifdef CYGPKG_HAL_NIOS2
414
415
416 struct info_forward
417 {
418 void *data;
419 struct cyg_upgrade_info *upgraded_file;
420 };
421
422 static void report_info(void *data, const char * format, va_list args)
423 {
424 char *s = alloc_vprintf(format, args);
425 LOG_USER_N("%s", s);
426 free(s);
427 }
428
429 struct cyg_upgrade_info firmware_info =
430 {
431 (uint8_t *)0x84000000,
432 "/ram/firmware.phi",
433 "Firmware",
434 0x0300000,
435 0x1f00000 -
436 0x0300000,
437 "ZylinNiosFirmware\n",
438 report_info,
439 };
440
441 // File written to /ram/firmware.phi before arriving at this fn
442 static int jim_zy1000_writefirmware(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
443 {
444 if (argc != 1)
445 return JIM_ERR;
446
447 if (!cyg_firmware_upgrade(NULL, firmware_info))
448 return JIM_ERR;
449
450 return JIM_OK;
451 }
452 #endif
453
454 static int
455 zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
456 int argc,
457 Jim_Obj * const *argv)
458 {
459 if (argc != 1)
460 {
461 Jim_WrongNumArgs(interp, 1, argv, "powerstatus");
462 return JIM_ERR;
463 }
464
465 bool dropout = readPowerDropout();
466
467 Jim_SetResult(interp, Jim_NewIntObj(interp, dropout));
468
469 return JIM_OK;
470 }
471
472
473
474 int zy1000_quit(void)
475 {
476
477 return ERROR_OK;
478 }
479
480
481
482 int interface_jtag_execute_queue(void)
483 {
484 uint32_t empty;
485
486 waitIdle();
487
488 /* We must make sure to write data read back to memory location before we return
489 * from this fn
490 */
491 zy1000_flush_readqueue();
492
493 /* and handle any callbacks... */
494 zy1000_flush_callbackqueue();
495
496 if (zy1000_rclk)
497 {
498 /* Only check for errors when using RCLK to speed up
499 * jtag over TCP/IP
500 */
501 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty);
502 /* clear JTAG error register */
503 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
504
505 if ((empty&0x400) != 0)
506 {
507 LOG_WARNING("RCLK timeout");
508 /* the error is informative only as we don't want to break the firmware if there
509 * is a false positive.
510 */
511 // return ERROR_FAIL;
512 }
513 }
514 return ERROR_OK;
515 }
516
517
518
519
520 static void writeShiftValue(uint8_t *data, int bits);
521
522 // here we shuffle N bits out/in
523 static __inline void scanBits(const uint8_t *out_value, uint8_t *in_value, int num_bits, bool pause_now, tap_state_t shiftState, tap_state_t end_state)
524 {
525 tap_state_t pause_state = shiftState;
526 for (int j = 0; j < num_bits; j += 32)
527 {
528 int k = num_bits - j;
529 if (k > 32)
530 {
531 k = 32;
532 /* we have more to shift out */
533 } else if (pause_now)
534 {
535 /* this was the last to shift out this time */
536 pause_state = end_state;
537 }
538
539 // we have (num_bits + 7)/8 bytes of bits to toggle out.
540 // bits are pushed out LSB to MSB
541 uint32_t value;
542 value = 0;
543 if (out_value != NULL)
544 {
545 for (int l = 0; l < k; l += 8)
546 {
547 value|=out_value[(j + l)/8]<<l;
548 }
549 }
550 /* mask away unused bits for easier debugging */
551 if (k < 32)
552 {
553 value&=~(((uint32_t)0xffffffff) << k);
554 } else
555 {
556 /* Shifting by >= 32 is not defined by the C standard
557 * and will in fact shift by &0x1f bits on nios */
558 }
559
560 shiftValueInner(shiftState, pause_state, k, value);
561
562 if (in_value != NULL)
563 {
564 writeShiftValue(in_value + (j/8), k);
565 }
566 }
567 }
568
569 static __inline void scanFields(int num_fields, const struct scan_field *fields, tap_state_t shiftState, tap_state_t end_state)
570 {
571 for (int i = 0; i < num_fields; i++)
572 {
573 scanBits(fields[i].out_value,
574 fields[i].in_value,
575 fields[i].num_bits,
576 (i == num_fields-1),
577 shiftState,
578 end_state);
579 }
580 }
581
582 int interface_jtag_add_ir_scan(struct jtag_tap *active, const struct scan_field *fields, tap_state_t state)
583 {
584 int scan_size = 0;
585 struct jtag_tap *tap, *nextTap;
586 tap_state_t pause_state = TAP_IRSHIFT;
587
588 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
589 {
590 nextTap = jtag_tap_next_enabled(tap);
591 if (nextTap==NULL)
592 {
593 pause_state = state;
594 }
595 scan_size = tap->ir_length;
596
597 /* search the list */
598 if (tap == active)
599 {
600 scanFields(1, fields, TAP_IRSHIFT, pause_state);
601 /* update device information */
602 buf_cpy(fields[0].out_value, tap->cur_instr, scan_size);
603
604 tap->bypass = 0;
605 } else
606 {
607 /* if a device isn't listed, set it to BYPASS */
608 assert(scan_size <= 32);
609 shiftValueInner(TAP_IRSHIFT, pause_state, scan_size, 0xffffffff);
610
611 tap->bypass = 1;
612 }
613 }
614
615 return ERROR_OK;
616 }
617
618
619
620
621
622 int interface_jtag_add_plain_ir_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
623 {
624 scanBits(out_bits, in_bits, num_bits, true, TAP_IRSHIFT, state);
625 return ERROR_OK;
626 }
627
628 int interface_jtag_add_dr_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
629 {
630 struct jtag_tap *tap, *nextTap;
631 tap_state_t pause_state = TAP_DRSHIFT;
632 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
633 {
634 nextTap = jtag_tap_next_enabled(tap);
635 if (nextTap==NULL)
636 {
637 pause_state = state;
638 }
639
640 /* Find a range of fields to write to this tap */
641 if (tap == active)
642 {
643 assert(!tap->bypass);
644
645 scanFields(num_fields, fields, TAP_DRSHIFT, pause_state);
646 } else
647 {
648 /* Shift out a 0 for disabled tap's */
649 assert(tap->bypass);
650 shiftValueInner(TAP_DRSHIFT, pause_state, 1, 0);
651 }
652 }
653 return ERROR_OK;
654 }
655
656 int interface_jtag_add_plain_dr_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
657 {
658 scanBits(out_bits, in_bits, num_bits, true, TAP_DRSHIFT, state);
659 return ERROR_OK;
660 }
661
662 int interface_jtag_add_tlr()
663 {
664 setCurrentState(TAP_RESET);
665 return ERROR_OK;
666 }
667
668
669 int interface_jtag_add_reset(int req_trst, int req_srst)
670 {
671 zy1000_reset(req_trst, req_srst);
672 return ERROR_OK;
673 }
674
675 static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t clockstate)
676 {
677 /* num_cycles can be 0 */
678 setCurrentState(clockstate);
679
680 /* execute num_cycles, 32 at the time. */
681 int i;
682 for (i = 0; i < num_cycles; i += 32)
683 {
684 int num;
685 num = 32;
686 if (num_cycles-i < num)
687 {
688 num = num_cycles-i;
689 }
690 shiftValueInner(clockstate, clockstate, num, 0);
691 }
692
693 #if !TEST_MANUAL()
694 /* finish in end_state */
695 setCurrentState(state);
696 #else
697 tap_state_t t = TAP_IDLE;
698 /* test manual drive code on any target */
699 int tms;
700 uint8_t tms_scan = tap_get_tms_path(t, state);
701 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
702
703 for (i = 0; i < tms_count; i++)
704 {
705 tms = (tms_scan >> i) & 1;
706 waitIdle();
707 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
708 }
709 waitIdle();
710 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
711 #endif
712
713 return ERROR_OK;
714 }
715
716 int interface_jtag_add_runtest(int num_cycles, tap_state_t state)
717 {
718 return zy1000_jtag_add_clocks(num_cycles, state, TAP_IDLE);
719 }
720
721 int interface_jtag_add_clocks(int num_cycles)
722 {
723 return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
724 }
725
726 int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state state)
727 {
728 /*wait for the fifo to be empty*/
729 waitIdle();
730
731 for (unsigned i = 0; i < num_bits; i++)
732 {
733 int tms;
734
735 if (((seq[i/8] >> (i % 8)) & 1) == 0)
736 {
737 tms = 0;
738 }
739 else
740 {
741 tms = 1;
742 }
743
744 waitIdle();
745 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
746 }
747
748 waitIdle();
749 if (state != TAP_INVALID)
750 {
751 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
752 } else
753 {
754 /* this would be normal if we are switching to SWD mode */
755 }
756 return ERROR_OK;
757 }
758
759 int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
760 {
761 int state_count;
762 int tms = 0;
763
764 state_count = 0;
765
766 tap_state_t cur_state = cmd_queue_cur_state;
767
768 uint8_t seq[16];
769 memset(seq, 0, sizeof(seq));
770 assert(num_states < (int)((sizeof(seq) * 8)));
771
772 while (num_states)
773 {
774 if (tap_state_transition(cur_state, false) == path[state_count])
775 {
776 tms = 0;
777 }
778 else if (tap_state_transition(cur_state, true) == path[state_count])
779 {
780 tms = 1;
781 }
782 else
783 {
784 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state), tap_state_name(path[state_count]));
785 exit(-1);
786 }
787
788 seq[state_count/8] = seq[state_count/8] | (tms << (state_count % 8));
789
790 cur_state = path[state_count];
791 state_count++;
792 num_states--;
793 }
794
795 return interface_add_tms_seq(state_count, seq, cur_state);
796 }
797
798 static void jtag_pre_post_bits(struct jtag_tap *tap, int *pre, int *post)
799 {
800 /* bypass bits before and after */
801 int pre_bits = 0;
802 int post_bits = 0;
803
804 bool found = false;
805 struct jtag_tap *cur_tap, *nextTap;
806 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap!= NULL; cur_tap = nextTap)
807 {
808 nextTap = jtag_tap_next_enabled(cur_tap);
809 if (cur_tap == tap)
810 {
811 found = true;
812 } else
813 {
814 if (found)
815 {
816 post_bits++;
817 } else
818 {
819 pre_bits++;
820 }
821 }
822 }
823 *pre = pre_bits;
824 *post = post_bits;
825 }
826
827 /*
828 static const int embeddedice_num_bits[] = {32, 6};
829 uint32_t values[2];
830
831 values[0] = value;
832 values[1] = (1 << 5) | reg_addr;
833
834 jtag_add_dr_out(tap,
835 2,
836 embeddedice_num_bits,
837 values,
838 TAP_IDLE);
839 */
840
841 void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
842 {
843 #if 0
844 int i;
845 for (i = 0; i < count; i++)
846 {
847 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
848 buffer += 4;
849 }
850 #else
851 int pre_bits;
852 int post_bits;
853 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
854
855 if ((pre_bits > 32) || (post_bits + 6 > 32))
856 {
857 int i;
858 for (i = 0; i < count; i++)
859 {
860 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
861 buffer += 4;
862 }
863 } else
864 {
865 int i;
866 for (i = 0; i < count; i++)
867 {
868 /* Fewer pokes means we get to use the FIFO more efficiently */
869 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
870 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
871 /* Danger! here we need to exit into the TAP_IDLE state to make
872 * DCC pick up this value.
873 */
874 shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits, (reg_addr | (1 << 5)));
875 buffer += 4;
876 }
877 }
878 #endif
879 }
880
881
882
883 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count)
884 {
885 /* bypass bits before and after */
886 int pre_bits;
887 int post_bits;
888 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
889 post_bits+=2;
890
891 if ((pre_bits > 32) || (post_bits > 32))
892 {
893 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap *, uint32_t, uint32_t *, size_t);
894 return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count);
895 } else
896 {
897 static const int bits[] = {32, 2};
898 uint32_t values[] = {0, 0};
899
900 /* FIX!!!!!! the target_write_memory() API started this nasty problem
901 * with unaligned uint32_t * pointers... */
902 const uint8_t *t = (const uint8_t *)data;
903
904 while (--count > 0)
905 {
906 #if 1
907 /* Danger! This code doesn't update cmd_queue_cur_state, so
908 * invoking jtag_add_pathmove() before jtag_add_dr_out() after
909 * this loop would fail!
910 */
911 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
912
913 uint32_t value;
914 value = *t++;
915 value |= (*t++<<8);
916 value |= (*t++<<16);
917 value |= (*t++<<24);
918
919 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, value);
920 /* minimum 2 bits */
921 shiftValueInner(TAP_DRSHIFT, TAP_DRPAUSE, post_bits, 0);
922
923 /* copy & paste from arm11_dbgtap.c */
924 //TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
925 /* KLUDGE! we have to flush the fifo or the Nios CPU locks up.
926 * This is probably a bug in the Avalon bus(cross clocking bridge?)
927 * or in the jtag registers module.
928 */
929 waitIdle();
930 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
931 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
932 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
933 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
934 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
935 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
936 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
937 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
938 /* we don't have to wait for the queue to empty here */
939 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_DRSHIFT);
940 waitIdle();
941 #else
942 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] =
943 {
944 TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
945 };
946
947 values[0] = *t++;
948 values[0] |= (*t++<<8);
949 values[0] |= (*t++<<16);
950 values[0] |= (*t++<<24);
951
952 jtag_add_dr_out(tap,
953 2,
954 bits,
955 values,
956 TAP_IDLE);
957
958 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
959 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
960 #endif
961 }
962
963 values[0] = *t++;
964 values[0] |= (*t++<<8);
965 values[0] |= (*t++<<16);
966 values[0] |= (*t++<<24);
967
968 /* This will happen on the last iteration updating cmd_queue_cur_state
969 * so we don't have to track it during the common code path
970 */
971 jtag_add_dr_out(tap,
972 2,
973 bits,
974 values,
975 TAP_IDLE);
976
977 return jtag_execute_queue();
978 }
979 }
980
981
982 static const struct command_registration zy1000_commands[] = {
983 {
984 .name = "power",
985 .handler = handle_power_command,
986 .mode = COMMAND_ANY,
987 .help = "Turn power switch to target on/off. "
988 "With no arguments, prints status.",
989 .usage = "('on'|'off)",
990 },
991 #if BUILD_ZY1000_MASTER
992 #if BUILD_ECOSBOARD
993 {
994 .name = "zy1000_version",
995 .mode = COMMAND_ANY,
996 .jim_handler = jim_zy1000_version,
997 .help = "Print version info for zy1000.",
998 .usage = "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
999 },
1000 #endif
1001 #else
1002 {
1003 .name = "zy1000_server",
1004 .mode = COMMAND_ANY,
1005 .jim_handler = jim_zy1000_server,
1006 .help = "Tcpip address for ZY1000 server.",
1007 .usage = "address",
1008 },
1009 #endif
1010 {
1011 .name = "powerstatus",
1012 .mode = COMMAND_ANY,
1013 .jim_handler = zylinjtag_Jim_Command_powerstatus,
1014 .help = "Returns power status of target",
1015 },
1016 #ifdef CYGPKG_HAL_NIOS2
1017 {
1018 .name = "updatezy1000firmware",
1019 .mode = COMMAND_ANY,
1020 .jim_handler = jim_zy1000_writefirmware,
1021 .help = "writes firmware to flash",
1022 /* .usage = "some_string", */
1023 },
1024 #endif
1025 COMMAND_REGISTRATION_DONE
1026 };
1027
1028
1029 #if !BUILD_ZY1000_MASTER || BUILD_ECOSBOARD
1030 static int tcp_ip = -1;
1031
1032 /* Write large packets if we can */
1033 static size_t out_pos;
1034 static uint8_t out_buffer[16384];
1035 static size_t in_pos;
1036 static size_t in_write;
1037 static uint8_t in_buffer[16384];
1038
1039 static bool flush_writes(void)
1040 {
1041 bool ok = (write(tcp_ip, out_buffer, out_pos) == (int)out_pos);
1042 out_pos = 0;
1043 return ok;
1044 }
1045
1046 static bool writeLong(uint32_t l)
1047 {
1048 int i;
1049 for (i = 0; i < 4; i++)
1050 {
1051 uint8_t c = (l >> (i*8))&0xff;
1052 out_buffer[out_pos++] = c;
1053 if (out_pos >= sizeof(out_buffer))
1054 {
1055 if (!flush_writes())
1056 {
1057 return false;
1058 }
1059 }
1060 }
1061 return true;
1062 }
1063
1064 static bool readLong(uint32_t *out_data)
1065 {
1066 uint32_t data = 0;
1067 int i;
1068 for (i = 0; i < 4; i++)
1069 {
1070 uint8_t c;
1071 if (in_pos == in_write)
1072 {
1073 /* If we have some data that we can send, send them before
1074 * we wait for more data
1075 */
1076 if (out_pos > 0)
1077 {
1078 if (!flush_writes())
1079 {
1080 return false;
1081 }
1082 }
1083
1084 /* read more */
1085 int t;
1086 t = read(tcp_ip, in_buffer, sizeof(in_buffer));
1087 if (t < 1)
1088 {
1089 return false;
1090 }
1091 in_write = (size_t) t;
1092 in_pos = 0;
1093 }
1094 c = in_buffer[in_pos++];
1095
1096 data |= (c << (i*8));
1097 }
1098 *out_data = data;
1099 return true;
1100 }
1101 #endif
1102
1103 enum ZY1000_CMD
1104 {
1105 ZY1000_CMD_POKE = 0x0,
1106 ZY1000_CMD_PEEK = 0x8,
1107 ZY1000_CMD_SLEEP = 0x1,
1108 ZY1000_CMD_WAITIDLE = 2
1109 };
1110
1111
1112 #if !BUILD_ZY1000_MASTER
1113
1114 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
1115 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
1116
1117 /* We initialize this late since we need to know the server address
1118 * first.
1119 */
1120 static void tcpip_open(void)
1121 {
1122 if (tcp_ip >= 0)
1123 return;
1124
1125 struct sockaddr_in echoServAddr; /* Echo server address */
1126
1127 /* Create a reliable, stream socket using TCP */
1128 if ((tcp_ip = socket(PF_INET, SOCK_STREAM, IPPROTO_TCP)) < 0)
1129 {
1130 fprintf(stderr, "Failed to connect to zy1000 server\n");
1131 exit(-1);
1132 }
1133
1134 /* Construct the server address structure */
1135 memset(&echoServAddr, 0, sizeof(echoServAddr)); /* Zero out structure */
1136 echoServAddr.sin_family = AF_INET; /* Internet address family */
1137 echoServAddr.sin_addr.s_addr = inet_addr(tcp_server); /* Server IP address */
1138 echoServAddr.sin_port = htons(7777); /* Server port */
1139
1140 /* Establish the connection to the echo server */
1141 if (connect(tcp_ip, (struct sockaddr *) &echoServAddr, sizeof(echoServAddr)) < 0)
1142 {
1143 fprintf(stderr, "Failed to connect to zy1000 server\n");
1144 exit(-1);
1145 }
1146
1147 int flag = 1;
1148 setsockopt(tcp_ip, /* socket affected */
1149 IPPROTO_TCP, /* set option at TCP level */
1150 TCP_NODELAY, /* name of option */
1151 (char *)&flag, /* the cast is historical cruft */
1152 sizeof(int)); /* length of option value */
1153
1154 }
1155
1156
1157 /* send a poke */
1158 void zy1000_tcpout(uint32_t address, uint32_t data)
1159 {
1160 tcpip_open();
1161 if (!writeLong((ZY1000_CMD_POKE << 24) | address)||
1162 !writeLong(data))
1163 {
1164 fprintf(stderr, "Could not write to zy1000 server\n");
1165 exit(-1);
1166 }
1167 }
1168
1169 /* By sending the wait to the server, we avoid a readback
1170 * of status. Radically improves performance for this operation
1171 * with long ping times.
1172 */
1173 void waitIdle(void)
1174 {
1175 tcpip_open();
1176 if (!writeLong((ZY1000_CMD_WAITIDLE << 24)))
1177 {
1178 fprintf(stderr, "Could not write to zy1000 server\n");
1179 exit(-1);
1180 }
1181 }
1182
1183 uint32_t zy1000_tcpin(uint32_t address)
1184 {
1185 tcpip_open();
1186
1187 zy1000_flush_readqueue();
1188
1189 uint32_t data;
1190 if (!writeLong((ZY1000_CMD_PEEK << 24) | address)||
1191 !readLong(&data))
1192 {
1193 fprintf(stderr, "Could not read from zy1000 server\n");
1194 exit(-1);
1195 }
1196 return data;
1197 }
1198
1199 int interface_jtag_add_sleep(uint32_t us)
1200 {
1201 tcpip_open();
1202 if (!writeLong((ZY1000_CMD_SLEEP << 24))||
1203 !writeLong(us))
1204 {
1205 fprintf(stderr, "Could not read from zy1000 server\n");
1206 exit(-1);
1207 }
1208 return ERROR_OK;
1209 }
1210
1211 /* queue a readback */
1212 #define readqueue_size 16384
1213 static struct
1214 {
1215 uint8_t *dest;
1216 int bits;
1217 } readqueue[readqueue_size];
1218
1219 static int readqueue_pos = 0;
1220
1221 /* flush the readqueue, this means reading any data that
1222 * we're expecting and store them into the final position
1223 */
1224 void zy1000_flush_readqueue(void)
1225 {
1226 if (readqueue_pos == 0)
1227 {
1228 /* simply debugging by allowing easy breakpoints when there
1229 * is something to do. */
1230 return;
1231 }
1232 int i;
1233 tcpip_open();
1234 for (i = 0; i < readqueue_pos; i++)
1235 {
1236 uint32_t value;
1237 if (!readLong(&value))
1238 {
1239 fprintf(stderr, "Could not read from zy1000 server\n");
1240 exit(-1);
1241 }
1242
1243 uint8_t *in_value = readqueue[i].dest;
1244 int k = readqueue[i].bits;
1245
1246 // we're shifting in data to MSB, shift data to be aligned for returning the value
1247 value >>= 32-k;
1248
1249 for (int l = 0; l < k; l += 8)
1250 {
1251 in_value[l/8]=(value >> l)&0xff;
1252 }
1253 }
1254 readqueue_pos = 0;
1255 }
1256
1257 /* By queuing the callback's we avoid flushing the
1258 read queue until jtag_execute_queue(). This can
1259 reduce latency dramatically for cases where
1260 callbacks are used extensively.
1261 */
1262 #define callbackqueue_size 128
1263 static struct callbackentry
1264 {
1265 jtag_callback_t callback;
1266 jtag_callback_data_t data0;
1267 jtag_callback_data_t data1;
1268 jtag_callback_data_t data2;
1269 jtag_callback_data_t data3;
1270 } callbackqueue[callbackqueue_size];
1271
1272 static int callbackqueue_pos = 0;
1273
1274 void zy1000_jtag_add_callback4(jtag_callback_t callback, jtag_callback_data_t data0, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
1275 {
1276 if (callbackqueue_pos >= callbackqueue_size)
1277 {
1278 zy1000_flush_callbackqueue();
1279 }
1280
1281 callbackqueue[callbackqueue_pos].callback = callback;
1282 callbackqueue[callbackqueue_pos].data0 = data0;
1283 callbackqueue[callbackqueue_pos].data1 = data1;
1284 callbackqueue[callbackqueue_pos].data2 = data2;
1285 callbackqueue[callbackqueue_pos].data3 = data3;
1286 callbackqueue_pos++;
1287 }
1288
1289 static int zy1000_jtag_convert_to_callback4(jtag_callback_data_t data0, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
1290 {
1291 ((jtag_callback1_t)data1)(data0);
1292 return ERROR_OK;
1293 }
1294
1295 void zy1000_jtag_add_callback(jtag_callback1_t callback, jtag_callback_data_t data0)
1296 {
1297 zy1000_jtag_add_callback4(zy1000_jtag_convert_to_callback4, data0, (jtag_callback_data_t)callback, 0, 0);
1298 }
1299
1300 void zy1000_flush_callbackqueue(void)
1301 {
1302 /* we have to flush the read queue so we have access to
1303 the data the callbacks will use
1304 */
1305 zy1000_flush_readqueue();
1306 int i;
1307 for (i = 0; i < callbackqueue_pos; i++)
1308 {
1309 struct callbackentry *entry = &callbackqueue[i];
1310 jtag_set_error(entry->callback(entry->data0, entry->data1, entry->data2, entry->data3));
1311 }
1312 callbackqueue_pos = 0;
1313 }
1314
1315 static void writeShiftValue(uint8_t *data, int bits)
1316 {
1317 waitIdle();
1318
1319 if (!writeLong((ZY1000_CMD_PEEK << 24) | (ZY1000_JTAG_BASE + 0xc)))
1320 {
1321 fprintf(stderr, "Could not read from zy1000 server\n");
1322 exit(-1);
1323 }
1324
1325 if (readqueue_pos >= readqueue_size)
1326 {
1327 zy1000_flush_readqueue();
1328 }
1329
1330 readqueue[readqueue_pos].dest = data;
1331 readqueue[readqueue_pos].bits = bits;
1332 readqueue_pos++;
1333 }
1334
1335 #else
1336
1337 static void writeShiftValue(uint8_t *data, int bits)
1338 {
1339 uint32_t value;
1340 waitIdle();
1341 ZY1000_PEEK(ZY1000_JTAG_BASE + 0xc, value);
1342 VERBOSE(LOG_INFO("getShiftValue %08x", value));
1343
1344 // data in, LSB to MSB
1345 // we're shifting in data to MSB, shift data to be aligned for returning the value
1346 value >>= 32 - bits;
1347
1348 for (int l = 0; l < bits; l += 8)
1349 {
1350 data[l/8]=(value >> l)&0xff;
1351 }
1352 }
1353
1354 #endif
1355
1356 #if BUILD_ECOSBOARD
1357 static char tcpip_stack[2048];
1358 static cyg_thread tcpip_thread_object;
1359 static cyg_handle_t tcpip_thread_handle;
1360
1361 static char watchdog_stack[2048];
1362 static cyg_thread watchdog_thread_object;
1363 static cyg_handle_t watchdog_thread_handle;
1364
1365 /* Infinite loop peeking & poking */
1366 static void tcpipserver(void)
1367 {
1368 for (;;)
1369 {
1370 uint32_t address;
1371 if (!readLong(&address))
1372 return;
1373 enum ZY1000_CMD c = (address >> 24) & 0xff;
1374 address &= 0xffffff;
1375 switch (c)
1376 {
1377 case ZY1000_CMD_POKE:
1378 {
1379 uint32_t data;
1380 if (!readLong(&data))
1381 return;
1382 address &= ~0x80000000;
1383 ZY1000_POKE(address + ZY1000_JTAG_BASE, data);
1384 break;
1385 }
1386 case ZY1000_CMD_PEEK:
1387 {
1388 uint32_t data;
1389 ZY1000_PEEK(address + ZY1000_JTAG_BASE, data);
1390 if (!writeLong(data))
1391 return;
1392 break;
1393 }
1394 case ZY1000_CMD_SLEEP:
1395 {
1396 uint32_t data;
1397 if (!readLong(&data))
1398 return;
1399 /* Wait for some us */
1400 usleep(data);
1401 break;
1402 }
1403 case ZY1000_CMD_WAITIDLE:
1404 {
1405 waitIdle();
1406 break;
1407 }
1408 default:
1409 return;
1410 }
1411 }
1412 }
1413
1414
1415 static void tcpip_server(cyg_addrword_t data)
1416 {
1417 int so_reuseaddr_option = 1;
1418
1419 int fd;
1420 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1421 {
1422 LOG_ERROR("error creating socket: %s", strerror(errno));
1423 exit(-1);
1424 }
1425
1426 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1427 sizeof(int));
1428
1429 struct sockaddr_in sin;
1430 unsigned int address_size;
1431 address_size = sizeof(sin);
1432 memset(&sin, 0, sizeof(sin));
1433 sin.sin_family = AF_INET;
1434 sin.sin_addr.s_addr = INADDR_ANY;
1435 sin.sin_port = htons(7777);
1436
1437 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1438 {
1439 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1440 exit(-1);
1441 }
1442
1443 if (listen(fd, 1) == -1)
1444 {
1445 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1446 exit(-1);
1447 }
1448
1449
1450 for (;;)
1451 {
1452 tcp_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1453 if (tcp_ip < 0)
1454 {
1455 continue;
1456 }
1457
1458 int flag = 1;
1459 setsockopt(tcp_ip, /* socket affected */
1460 IPPROTO_TCP, /* set option at TCP level */
1461 TCP_NODELAY, /* name of option */
1462 (char *)&flag, /* the cast is historical cruft */
1463 sizeof(int)); /* length of option value */
1464
1465 bool save_poll = jtag_poll_get_enabled();
1466
1467 /* polling will screw up the "connection" */
1468 jtag_poll_set_enabled(false);
1469
1470 tcpipserver();
1471
1472 jtag_poll_set_enabled(save_poll);
1473
1474 close(tcp_ip);
1475
1476 }
1477 close(fd);
1478
1479 }
1480
1481 #ifdef WATCHDOG_BASE
1482 /* If we connect to port 8888 we must send a char every 10s or the board resets itself */
1483 static void watchdog_server(cyg_addrword_t data)
1484 {
1485 int so_reuseaddr_option = 1;
1486
1487 int fd;
1488 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1489 {
1490 LOG_ERROR("error creating socket: %s", strerror(errno));
1491 exit(-1);
1492 }
1493
1494 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1495 sizeof(int));
1496
1497 struct sockaddr_in sin;
1498 unsigned int address_size;
1499 address_size = sizeof(sin);
1500 memset(&sin, 0, sizeof(sin));
1501 sin.sin_family = AF_INET;
1502 sin.sin_addr.s_addr = INADDR_ANY;
1503 sin.sin_port = htons(8888);
1504
1505 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1506 {
1507 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1508 exit(-1);
1509 }
1510
1511 if (listen(fd, 1) == -1)
1512 {
1513 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1514 exit(-1);
1515 }
1516
1517
1518 for (;;)
1519 {
1520 int watchdog_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1521
1522 /* Start watchdog, must be reset every 10 seconds. */
1523 HAL_WRITE_UINT32(WATCHDOG_BASE + 4, 4);
1524
1525 if (watchdog_ip < 0)
1526 {
1527 LOG_ERROR("couldn't open watchdog socket: %s", strerror(errno));
1528 exit(-1);
1529 }
1530
1531 int flag = 1;
1532 setsockopt(watchdog_ip, /* socket affected */
1533 IPPROTO_TCP, /* set option at TCP level */
1534 TCP_NODELAY, /* name of option */
1535 (char *)&flag, /* the cast is historical cruft */
1536 sizeof(int)); /* length of option value */
1537
1538
1539 char buf;
1540 for (;;)
1541 {
1542 if (read(watchdog_ip, &buf, 1) == 1)
1543 {
1544 /* Reset timer */
1545 HAL_WRITE_UINT32(WATCHDOG_BASE + 8, 0x1234);
1546 /* Echo so we can telnet in and see that resetting works */
1547 write(watchdog_ip, &buf, 1);
1548 } else
1549 {
1550 /* Stop tickling the watchdog, the CPU will reset in < 10 seconds
1551 * now.
1552 */
1553 return;
1554 }
1555
1556 }
1557
1558 /* Never reached */
1559 }
1560 }
1561 #endif
1562
1563 #endif
1564
1565 #if BUILD_ZY1000_MASTER
1566 int interface_jtag_add_sleep(uint32_t us)
1567 {
1568 jtag_sleep(us);
1569 return ERROR_OK;
1570 }
1571 #endif
1572
1573 #if BUILD_ZY1000_MASTER && !BUILD_ECOSBOARD
1574 volatile void *zy1000_jtag_master;
1575 #include <sys/mman.h>
1576 #endif
1577
1578 int zy1000_init(void)
1579 {
1580 #if BUILD_ECOSBOARD
1581 LOG_USER("%s", ZYLIN_OPENOCD_VERSION);
1582 #elif BUILD_ZY1000_MASTER
1583 int fd;
1584 if((fd = open("/dev/mem", O_RDWR | O_SYNC)) == -1)
1585 {
1586 LOG_ERROR("No access to /dev/mem");
1587 return ERROR_FAIL;
1588 }
1589 #ifndef REGISTERS_BASE
1590 #define REGISTERS_BASE 0x9002000
1591 #define REGISTERS_SPAN 128
1592 #endif
1593
1594 zy1000_jtag_master = mmap(0, REGISTERS_SPAN, PROT_READ | PROT_WRITE, MAP_SHARED, fd, REGISTERS_BASE);
1595
1596 if(zy1000_jtag_master == (void *) -1)
1597 {
1598 close(fd);
1599 LOG_ERROR("No access to /dev/mem");
1600 return ERROR_FAIL;
1601 }
1602 #endif
1603
1604
1605
1606 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x30); // Turn on LED1 & LED2
1607
1608 setPower(true); // on by default
1609
1610
1611 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1612 zy1000_reset(0, 0);
1613 int jtag_speed_var;
1614 int retval = jtag_get_speed(&jtag_speed_var);
1615 if (retval != ERROR_OK)
1616 return retval;
1617 zy1000_speed(jtag_speed_var);
1618
1619
1620 #if BUILD_ECOSBOARD
1621 cyg_thread_create(1, tcpip_server, (cyg_addrword_t) 0, "tcip/ip server",
1622 (void *) tcpip_stack, sizeof(tcpip_stack),
1623 &tcpip_thread_handle, &tcpip_thread_object);
1624 cyg_thread_resume(tcpip_thread_handle);
1625 #ifdef WATCHDOG_BASE
1626 cyg_thread_create(1, watchdog_server, (cyg_addrword_t) 0, "watchdog tcip/ip server",
1627 (void *) watchdog_stack, sizeof(watchdog_stack),
1628 &watchdog_thread_handle, &watchdog_thread_object);
1629 cyg_thread_resume(watchdog_thread_handle);
1630 #endif
1631 #endif
1632
1633 return ERROR_OK;
1634 }
1635
1636
1637
1638 struct jtag_interface zy1000_interface =
1639 {
1640 .name = "ZY1000",
1641 .supported = DEBUG_CAP_TMS_SEQ,
1642 .execute_queue = NULL,
1643 .speed = zy1000_speed,
1644 .commands = zy1000_commands,
1645 .init = zy1000_init,
1646 .quit = zy1000_quit,
1647 .khz = zy1000_khz,
1648 .speed_div = zy1000_speed_div,
1649 .power_dropout = zy1000_power_dropout,
1650 .srst_asserted = zy1000_srst_asserted,
1651 };

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