1 /***************************************************************************
2 * Copyright (C) 2013 by Paul Fertser, fercerpav@gmail.com *
4 * Copyright (C) 2012 by Creative Product Design, marc @ cpdesign.com.au *
5 * Based on at91rm9200.c (c) Anders Larsen *
6 * and RPi GPIO examples by Gert van Loo & Dom *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
20 ***************************************************************************/
26 #include <jtag/interface.h>
31 uint32_t bcm2835_peri_base
= 0x20000000;
32 #define BCM2835_GPIO_BASE (bcm2835_peri_base + 0x200000) /* GPIO controller */
34 #define BCM2835_PADS_GPIO_0_27 (bcm2835_peri_base + 0x100000)
35 #define BCM2835_PADS_GPIO_0_27_OFFSET (0x2c / 4)
37 /* GPIO setup macros */
38 #define MODE_GPIO(g) (*(pio_base+((g)/10))>>(((g)%10)*3) & 7)
39 #define INP_GPIO(g) do { *(pio_base+((g)/10)) &= ~(7<<(((g)%10)*3)); } while (0)
40 #define SET_MODE_GPIO(g, m) do { /* clear the mode bits first, then set as necessary */ \
42 *(pio_base+((g)/10)) |= ((m)<<(((g)%10)*3)); } while (0)
43 #define OUT_GPIO(g) SET_MODE_GPIO(g, 1)
45 #define GPIO_SET (*(pio_base+7)) /* sets bits which are 1, ignores bits which are 0 */
46 #define GPIO_CLR (*(pio_base+10)) /* clears bits which are 1, ignores bits which are 0 */
47 #define GPIO_LEV (*(pio_base+13)) /* current level of the pin */
49 static int dev_mem_fd
;
50 static volatile uint32_t *pio_base
;
52 static bb_value_t
bcm2835gpio_read(void);
53 static int bcm2835gpio_write(int tck
, int tms
, int tdi
);
55 static int bcm2835_swdio_read(void);
56 static void bcm2835_swdio_drive(bool is_output
);
58 static int bcm2835gpio_init(void);
59 static int bcm2835gpio_quit(void);
61 static struct bitbang_interface bcm2835gpio_bitbang
= {
62 .read
= bcm2835gpio_read
,
63 .write
= bcm2835gpio_write
,
64 .swdio_read
= bcm2835_swdio_read
,
65 .swdio_drive
= bcm2835_swdio_drive
,
69 /* GPIO numbers for each signal. Negative values are invalid */
70 static int tck_gpio
= -1;
71 static int tck_gpio_mode
;
72 static int tms_gpio
= -1;
73 static int tms_gpio_mode
;
74 static int tdi_gpio
= -1;
75 static int tdi_gpio_mode
;
76 static int tdo_gpio
= -1;
77 static int tdo_gpio_mode
;
78 static int trst_gpio
= -1;
79 static int trst_gpio_mode
;
80 static int srst_gpio
= -1;
81 static int srst_gpio_mode
;
82 static int swclk_gpio
= -1;
83 static int swclk_gpio_mode
;
84 static int swdio_gpio
= -1;
85 static int swdio_gpio_mode
;
87 /* Transition delay coefficients */
88 static int speed_coeff
= 113714;
89 static int speed_offset
= 28;
90 static unsigned int jtag_delay
;
92 static bb_value_t
bcm2835gpio_read(void)
94 return (GPIO_LEV
& 1<<tdo_gpio
) ? BB_HIGH
: BB_LOW
;
97 static int bcm2835gpio_write(int tck
, int tms
, int tdi
)
99 uint32_t set
= tck
<<tck_gpio
| tms
<<tms_gpio
| tdi
<<tdi_gpio
;
100 uint32_t clear
= !tck
<<tck_gpio
| !tms
<<tms_gpio
| !tdi
<<tdi_gpio
;
105 for (unsigned int i
= 0; i
< jtag_delay
; i
++)
111 static int bcm2835gpio_swd_write(int tck
, int tms
, int tdi
)
113 uint32_t set
= tck
<<swclk_gpio
| tdi
<<swdio_gpio
;
114 uint32_t clear
= !tck
<<swclk_gpio
| !tdi
<<swdio_gpio
;
119 for (unsigned int i
= 0; i
< jtag_delay
; i
++)
125 /* (1) assert or (0) deassert reset lines */
126 static int bcm2835gpio_reset(int trst
, int srst
)
132 set
|= !trst
<<trst_gpio
;
133 clear
|= trst
<<trst_gpio
;
137 set
|= !srst
<<srst_gpio
;
138 clear
|= srst
<<srst_gpio
;
147 static void bcm2835_swdio_drive(bool is_output
)
150 OUT_GPIO(swdio_gpio
);
152 INP_GPIO(swdio_gpio
);
155 static int bcm2835_swdio_read(void)
157 return !!(GPIO_LEV
& 1 << swdio_gpio
);
160 static int bcm2835gpio_khz(int khz
, int *jtag_speed
)
163 LOG_DEBUG("RCLK not supported");
166 *jtag_speed
= speed_coeff
/khz
- speed_offset
;
172 static int bcm2835gpio_speed_div(int speed
, int *khz
)
174 *khz
= speed_coeff
/(speed
+ speed_offset
);
178 static int bcm2835gpio_speed(int speed
)
184 static int is_gpio_valid(int gpio
)
186 return gpio
>= 0 && gpio
<= 53;
189 COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionums
)
192 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], tck_gpio
);
193 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[1], tms_gpio
);
194 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[2], tdi_gpio
);
195 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[3], tdo_gpio
);
196 } else if (CMD_ARGC
!= 0) {
197 return ERROR_COMMAND_SYNTAX_ERROR
;
201 "BCM2835 GPIO config: tck = %d, tms = %d, tdi = %d, tdo = %d",
202 tck_gpio
, tms_gpio
, tdi_gpio
, tdo_gpio
);
207 COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_tck
)
210 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], tck_gpio
);
212 command_print(CMD
, "BCM2835 GPIO config: tck = %d", tck_gpio
);
216 COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_tms
)
219 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], tms_gpio
);
221 command_print(CMD
, "BCM2835 GPIO config: tms = %d", tms_gpio
);
225 COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_tdo
)
228 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], tdo_gpio
);
230 command_print(CMD
, "BCM2835 GPIO config: tdo = %d", tdo_gpio
);
234 COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_tdi
)
237 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], tdi_gpio
);
239 command_print(CMD
, "BCM2835 GPIO config: tdi = %d", tdi_gpio
);
243 COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_srst
)
246 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], srst_gpio
);
248 command_print(CMD
, "BCM2835 GPIO config: srst = %d", srst_gpio
);
252 COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_trst
)
255 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], trst_gpio
);
257 command_print(CMD
, "BCM2835 GPIO config: trst = %d", trst_gpio
);
261 COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionums
)
264 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], swclk_gpio
);
265 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[1], swdio_gpio
);
266 } else if (CMD_ARGC
!= 0) {
267 return ERROR_COMMAND_SYNTAX_ERROR
;
271 "BCM2835 GPIO nums: swclk = %d, swdio = %d",
272 swclk_gpio
, swdio_gpio
);
277 COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionum_swclk
)
280 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], swclk_gpio
);
282 command_print(CMD
, "BCM2835 num: swclk = %d", swclk_gpio
);
286 COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionum_swdio
)
289 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], swdio_gpio
);
291 command_print(CMD
, "BCM2835 num: swdio = %d", swdio_gpio
);
295 COMMAND_HANDLER(bcm2835gpio_handle_speed_coeffs
)
298 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], speed_coeff
);
299 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[1], speed_offset
);
302 command_print(CMD
, "BCM2835 GPIO: speed_coeffs = %d, speed_offset = %d",
303 speed_coeff
, speed_offset
);
307 COMMAND_HANDLER(bcm2835gpio_handle_peripheral_base
)
310 COMMAND_PARSE_NUMBER(u32
, CMD_ARGV
[0], bcm2835_peri_base
);
312 command_print(CMD
, "BCM2835 GPIO: peripheral_base = 0x%08x",
317 static const struct command_registration bcm2835gpio_command_handlers
[] = {
319 .name
= "bcm2835gpio_jtag_nums",
320 .handler
= &bcm2835gpio_handle_jtag_gpionums
,
321 .mode
= COMMAND_CONFIG
,
322 .help
= "gpio numbers for tck, tms, tdi, tdo. (in that order)",
323 .usage
= "[tck tms tdi tdo]",
326 .name
= "bcm2835gpio_tck_num",
327 .handler
= &bcm2835gpio_handle_jtag_gpionum_tck
,
328 .mode
= COMMAND_CONFIG
,
329 .help
= "gpio number for tck.",
333 .name
= "bcm2835gpio_tms_num",
334 .handler
= &bcm2835gpio_handle_jtag_gpionum_tms
,
335 .mode
= COMMAND_CONFIG
,
336 .help
= "gpio number for tms.",
340 .name
= "bcm2835gpio_tdo_num",
341 .handler
= &bcm2835gpio_handle_jtag_gpionum_tdo
,
342 .mode
= COMMAND_CONFIG
,
343 .help
= "gpio number for tdo.",
347 .name
= "bcm2835gpio_tdi_num",
348 .handler
= &bcm2835gpio_handle_jtag_gpionum_tdi
,
349 .mode
= COMMAND_CONFIG
,
350 .help
= "gpio number for tdi.",
354 .name
= "bcm2835gpio_swd_nums",
355 .handler
= &bcm2835gpio_handle_swd_gpionums
,
356 .mode
= COMMAND_CONFIG
,
357 .help
= "gpio numbers for swclk, swdio. (in that order)",
358 .usage
= "[swclk swdio]",
361 .name
= "bcm2835gpio_swclk_num",
362 .handler
= &bcm2835gpio_handle_swd_gpionum_swclk
,
363 .mode
= COMMAND_CONFIG
,
364 .help
= "gpio number for swclk.",
368 .name
= "bcm2835gpio_swdio_num",
369 .handler
= &bcm2835gpio_handle_swd_gpionum_swdio
,
370 .mode
= COMMAND_CONFIG
,
371 .help
= "gpio number for swdio.",
375 .name
= "bcm2835gpio_srst_num",
376 .handler
= &bcm2835gpio_handle_jtag_gpionum_srst
,
377 .mode
= COMMAND_CONFIG
,
378 .help
= "gpio number for srst.",
382 .name
= "bcm2835gpio_trst_num",
383 .handler
= &bcm2835gpio_handle_jtag_gpionum_trst
,
384 .mode
= COMMAND_CONFIG
,
385 .help
= "gpio number for trst.",
389 .name
= "bcm2835gpio_speed_coeffs",
390 .handler
= &bcm2835gpio_handle_speed_coeffs
,
391 .mode
= COMMAND_CONFIG
,
392 .help
= "SPEED_COEFF and SPEED_OFFSET for delay calculations.",
393 .usage
= "[SPEED_COEFF SPEED_OFFSET]",
396 .name
= "bcm2835gpio_peripheral_base",
397 .handler
= &bcm2835gpio_handle_peripheral_base
,
398 .mode
= COMMAND_CONFIG
,
399 .help
= "peripheral base to access GPIOs (RPi1 0x20000000, RPi2 0x3F000000).",
403 COMMAND_REGISTRATION_DONE
406 static const char * const bcm2835_transports
[] = { "jtag", "swd", NULL
};
408 static struct jtag_interface bcm2835gpio_interface
= {
409 .supported
= DEBUG_CAP_TMS_SEQ
,
410 .execute_queue
= bitbang_execute_queue
,
413 struct adapter_driver bcm2835gpio_adapter_driver
= {
414 .name
= "bcm2835gpio",
415 .transports
= bcm2835_transports
,
416 .commands
= bcm2835gpio_command_handlers
,
418 .init
= bcm2835gpio_init
,
419 .quit
= bcm2835gpio_quit
,
420 .reset
= bcm2835gpio_reset
,
421 .speed
= bcm2835gpio_speed
,
422 .khz
= bcm2835gpio_khz
,
423 .speed_div
= bcm2835gpio_speed_div
,
425 .jtag_ops
= &bcm2835gpio_interface
,
426 .swd_ops
= &bitbang_swd
,
429 static bool bcm2835gpio_jtag_mode_possible(void)
431 if (!is_gpio_valid(tck_gpio
))
433 if (!is_gpio_valid(tms_gpio
))
435 if (!is_gpio_valid(tdi_gpio
))
437 if (!is_gpio_valid(tdo_gpio
))
442 static bool bcm2835gpio_swd_mode_possible(void)
444 if (!is_gpio_valid(swclk_gpio
))
446 if (!is_gpio_valid(swdio_gpio
))
451 static int bcm2835gpio_init(void)
453 bitbang_interface
= &bcm2835gpio_bitbang
;
455 LOG_INFO("BCM2835 GPIO JTAG/SWD bitbang driver");
457 if (bcm2835gpio_jtag_mode_possible()) {
458 if (bcm2835gpio_swd_mode_possible())
459 LOG_INFO("JTAG and SWD modes enabled");
461 LOG_INFO("JTAG only mode enabled (specify swclk and swdio gpio to add SWD mode)");
462 } else if (bcm2835gpio_swd_mode_possible()) {
463 LOG_INFO("SWD only mode enabled (specify tck, tms, tdi and tdo gpios to add JTAG mode)");
465 LOG_ERROR("Require tck, tms, tdi and tdo gpios for JTAG mode and/or swclk and swdio gpio for SWD mode");
466 return ERROR_JTAG_INIT_FAILED
;
469 dev_mem_fd
= open("/dev/gpiomem", O_RDWR
| O_SYNC
);
470 if (dev_mem_fd
< 0) {
471 LOG_DEBUG("Cannot open /dev/gpiomem, fallback to /dev/mem");
472 dev_mem_fd
= open("/dev/mem", O_RDWR
| O_SYNC
);
474 if (dev_mem_fd
< 0) {
476 return ERROR_JTAG_INIT_FAILED
;
479 pio_base
= mmap(NULL
, sysconf(_SC_PAGE_SIZE
), PROT_READ
| PROT_WRITE
,
480 MAP_SHARED
, dev_mem_fd
, BCM2835_GPIO_BASE
);
482 if (pio_base
== MAP_FAILED
) {
485 return ERROR_JTAG_INIT_FAILED
;
488 static volatile uint32_t *pads_base
;
489 pads_base
= mmap(NULL
, sysconf(_SC_PAGE_SIZE
), PROT_READ
| PROT_WRITE
,
490 MAP_SHARED
, dev_mem_fd
, BCM2835_PADS_GPIO_0_27
);
492 if (pads_base
== MAP_FAILED
) {
495 return ERROR_JTAG_INIT_FAILED
;
498 /* set 4mA drive strength, slew rate limited, hysteresis on */
499 pads_base
[BCM2835_PADS_GPIO_0_27_OFFSET
] = 0x5a000008 + 1;
501 tdo_gpio_mode
= MODE_GPIO(tdo_gpio
);
502 tdi_gpio_mode
= MODE_GPIO(tdi_gpio
);
503 tck_gpio_mode
= MODE_GPIO(tck_gpio
);
504 tms_gpio_mode
= MODE_GPIO(tms_gpio
);
505 swclk_gpio_mode
= MODE_GPIO(swclk_gpio
);
506 swdio_gpio_mode
= MODE_GPIO(swdio_gpio
);
508 * Configure TDO as an input, and TDI, TCK, TMS, TRST, SRST
509 * as outputs. Drive TDI and TCK low, and TMS/TRST/SRST high.
513 GPIO_CLR
= 1<<tdi_gpio
| 1<<tck_gpio
| 1<<swdio_gpio
| 1<<swclk_gpio
;
514 GPIO_SET
= 1<<tms_gpio
;
519 OUT_GPIO(swclk_gpio
);
520 OUT_GPIO(swdio_gpio
);
521 if (trst_gpio
!= -1) {
522 trst_gpio_mode
= MODE_GPIO(trst_gpio
);
523 GPIO_SET
= 1 << trst_gpio
;
526 if (srst_gpio
!= -1) {
527 srst_gpio_mode
= MODE_GPIO(srst_gpio
);
528 GPIO_SET
= 1 << srst_gpio
;
532 LOG_DEBUG("saved pinmux settings: tck %d tms %d tdi %d "
533 "tdo %d trst %d srst %d", tck_gpio_mode
, tms_gpio_mode
,
534 tdi_gpio_mode
, tdo_gpio_mode
, trst_gpio_mode
, srst_gpio_mode
);
537 bcm2835gpio_bitbang
.write
= bcm2835gpio_swd_write
;
538 bitbang_switch_to_swd();
544 static int bcm2835gpio_quit(void)
546 SET_MODE_GPIO(tdo_gpio
, tdo_gpio_mode
);
547 SET_MODE_GPIO(tdi_gpio
, tdi_gpio_mode
);
548 SET_MODE_GPIO(tck_gpio
, tck_gpio_mode
);
549 SET_MODE_GPIO(tms_gpio
, tms_gpio_mode
);
550 SET_MODE_GPIO(swclk_gpio
, swclk_gpio_mode
);
551 SET_MODE_GPIO(swdio_gpio
, swdio_gpio_mode
);
553 SET_MODE_GPIO(trst_gpio
, trst_gpio_mode
);
555 SET_MODE_GPIO(srst_gpio
, srst_gpio_mode
);
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