src/flash/nor/stm32l4x.h

   1 /***************************************************************************
   2  *   Copyright (C) 2015 by Uwe Bonnes                                      *
   3  *   bon@elektron.ikp.physik.tu-darmstadt.de                               *
   4  *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  17  ***************************************************************************/
  18
  19 #ifndef OPENOCD_FLASH_NOR_STM32L4X
  20 #define OPENOCD_FLASH_NOR_STM32L4X
  21
  22 /* FLASH_CR register bits */
  23 #define FLASH_PG                                (1 << 0)
  24 #define FLASH_PER                               (1 << 1)
  25 #define FLASH_MER1                              (1 << 2)
  26 #define FLASH_PAGE_SHIFT                3
  27 #define FLASH_CR_BKER                   (1 << 11)
  28 #define FLASH_MER2                              (1 << 15)
  29 #define FLASH_STRT                              (1 << 16)
  30 #define FLASH_OPTSTRT                   (1 << 17)
  31 #define FLASH_EOPIE                             (1 << 24)
  32 #define FLASH_ERRIE                             (1 << 25)
  33 #define FLASH_OBL_LAUNCH                (1 << 27)
  34 #define FLASH_OPTLOCK                   (1 << 30)
  35 #define FLASH_LOCK                              (1 << 31)
  36
  37 /* FLASH_SR register bits */
  38 #define FLASH_BSY                               (1 << 16)
  39
  40 /* Fast programming not used => related errors not used*/
  41 #define FLASH_PGSERR                    (1 << 7) /* Programming sequence error */
  42 #define FLASH_SIZERR                    (1 << 6) /* Size error */
  43 #define FLASH_PGAERR                    (1 << 5) /* Programming alignment error */
  44 #define FLASH_WRPERR                    (1 << 4) /* Write protection error */
  45 #define FLASH_PROGERR                   (1 << 3) /* Programming error */
  46 #define FLASH_OPERR                             (1 << 1) /* Operation error */
  47 #define FLASH_EOP                               (1 << 0) /* End of operation */
  48 #define FLASH_ERROR                             (FLASH_PGSERR | FLASH_SIZERR | FLASH_PGAERR | \
  49                                                                 FLASH_WRPERR | FLASH_PROGERR | FLASH_OPERR)
  50
  51 /* register unlock keys */
  52 #define KEY1                                    0x45670123
  53 #define KEY2                                    0xCDEF89AB
  54
  55 /* option register unlock key */
  56 #define OPTKEY1                                 0x08192A3B
  57 #define OPTKEY2                                 0x4C5D6E7F
  58
  59 /* FLASH_OPTR register bits */
  60 #define FLASH_RDP_MASK                  0xFF
  61 #define FLASH_TZEN                              (1 << 31)
  62
  63 /* FLASH secure block based bank 1/2 register offsets */
  64 #define FLASH_SECBB1(X) (0x80 + 4 * (X - 1))
  65 #define FLASH_SECBB2(X) (0xA0 + 4 * (X - 1))
  66
  67 #define FLASH_SECBB_SECURE      0xFFFFFFFF
  68 #define FLASH_SECBB_NON_SECURE  0
  69
  70 /* other registers */
  71 #define DBGMCU_IDCODE_G0                0x40015800
  72 #define DBGMCU_IDCODE_L4_G4             0xE0042000
  73 #define DBGMCU_IDCODE_L5                0xE0044000
  74
  75 #define STM32_FLASH_BANK_BASE   0x08000000
  76 #define STM32_FLASH_S_BANK_BASE 0x0C000000
  77
  78 #endif