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[openocd.git] / src / flash / nor / stellaris.h
1 /***************************************************************************
2 * Copyright (C) 2006 by Magnus Lundin *
3 * lundin@mlu.mine.nu *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20 #ifndef STELLARIS_FLASH_H
21 #define STELLARIS_FLASH_H
22
23 struct stellaris_flash_bank
24 {
25 /* chip id register */
26 uint32_t did0;
27 uint32_t did1;
28 uint32_t dc0;
29 uint32_t dc1;
30
31 char * target_name;
32
33 uint32_t sramsiz;
34 uint32_t flshsz;
35 /* flash geometry */
36 uint32_t num_pages;
37 uint32_t pagesize;
38 uint32_t pages_in_lockregion;
39
40 /* nv memory bits */
41 uint16_t num_lockbits;
42 uint32_t lockbits;
43
44 /* main clock status */
45 uint32_t rcc;
46 uint32_t rcc2;
47 uint8_t mck_valid;
48 uint8_t xtal_mask;
49 uint32_t iosc_freq;
50 uint32_t mck_freq;
51 const char *iosc_desc;
52 const char *mck_desc;
53 };
54
55 /* STELLARIS control registers */
56 #define SCB_BASE 0x400FE000
57 #define DID0 0x000
58 #define DID1 0x004
59 #define DC0 0x008
60 #define DC1 0x010
61 #define DC2 0x014
62 #define DC3 0x018
63 #define DC4 0x01C
64
65 #define RIS 0x050
66 #define RCC 0x060
67 #define PLLCFG 0x064
68 #define RCC2 0x070
69
70 #define FMPRE 0x130
71 #define FMPPE 0x134
72 #define USECRL 0x140
73
74 #define FLASH_CONTROL_BASE 0x400FD000
75 #define FLASH_FMA (FLASH_CONTROL_BASE | 0x000)
76 #define FLASH_FMD (FLASH_CONTROL_BASE | 0x004)
77 #define FLASH_FMC (FLASH_CONTROL_BASE | 0x008)
78 #define FLASH_CRIS (FLASH_CONTROL_BASE | 0x00C)
79 #define FLASH_CIM (FLASH_CONTROL_BASE | 0x010)
80 #define FLASH_MISC (FLASH_CONTROL_BASE | 0x014)
81
82 #define AMISC 1
83 #define PMISC 2
84
85 #define AMASK 1
86 #define PMASK 2
87
88 /* Flash Controller Command bits */
89 #define FMC_WRKEY (0xA442 << 16)
90 #define FMC_COMT (1 << 3)
91 #define FMC_MERASE (1 << 2)
92 #define FMC_ERASE (1 << 1)
93 #define FMC_WRITE (1 << 0)
94
95 /* STELLARIS constants */
96
97 #endif /* STELLARIS_H */

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