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flash/nor/nrf5: unify size of HWID
[openocd.git] / src / flash / nor / em357.c
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
7 *
8 * Copyright (C) 2011 by Erik Botö
9 * erik.boto@pelagicore.com
10 *
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
15 * *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
20 * *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
23 ***************************************************************************/
24
25 #ifdef HAVE_CONFIG_H
26 #include "config.h"
27 #endif
28
29 #include "imp.h"
30 #include <helper/binarybuffer.h>
31 #include <target/algorithm.h>
32 #include <target/armv7m.h>
33
34 /* em357 register locations */
35
36 #define EM357_FLASH_ACR 0x40008000
37 #define EM357_FLASH_KEYR 0x40008004
38 #define EM357_FLASH_OPTKEYR 0x40008008
39 #define EM357_FLASH_SR 0x4000800C
40 #define EM357_FLASH_CR 0x40008010
41 #define EM357_FLASH_AR 0x40008014
42 #define EM357_FLASH_OBR 0x4000801C
43 #define EM357_FLASH_WRPR 0x40008020
44
45 #define EM357_FPEC_CLK 0x4000402c
46 /* option byte location */
47
48 #define EM357_OB_RDP 0x08040800
49 #define EM357_OB_WRP0 0x08040808
50 #define EM357_OB_WRP1 0x0804080A
51 #define EM357_OB_WRP2 0x0804080C
52
53 /* FLASH_CR register bits */
54
55 #define FLASH_PG (1 << 0)
56 #define FLASH_PER (1 << 1)
57 #define FLASH_MER (1 << 2)
58 #define FLASH_OPTPG (1 << 4)
59 #define FLASH_OPTER (1 << 5)
60 #define FLASH_STRT (1 << 6)
61 #define FLASH_LOCK (1 << 7)
62 #define FLASH_OPTWRE (1 << 9)
63
64 /* FLASH_SR register bits */
65
66 #define FLASH_BSY (1 << 0)
67 #define FLASH_PGERR (1 << 2)
68 #define FLASH_WRPRTERR (1 << 4)
69 #define FLASH_EOP (1 << 5)
70
71 /* EM357_FLASH_OBR bit definitions (reading) */
72
73 #define OPT_ERROR 0
74 #define OPT_READOUT 1
75
76 /* register unlock keys */
77
78 #define KEY1 0x45670123
79 #define KEY2 0xCDEF89AB
80
81 struct em357_options {
82 uint16_t RDP;
83 uint16_t user_options;
84 uint16_t protection[3];
85 };
86
87 struct em357_flash_bank {
88 struct em357_options option_bytes;
89 int ppage_size;
90 bool probed;
91 };
92
93 static int em357_mass_erase(struct flash_bank *bank);
94
95 /* flash bank em357 <base> <size> 0 0 <target#>
96 */
97 FLASH_BANK_COMMAND_HANDLER(em357_flash_bank_command)
98 {
99 struct em357_flash_bank *em357_info;
100
101 if (CMD_ARGC < 6)
102 return ERROR_COMMAND_SYNTAX_ERROR;
103
104 em357_info = malloc(sizeof(struct em357_flash_bank));
105 bank->driver_priv = em357_info;
106
107 em357_info->probed = false;
108
109 return ERROR_OK;
110 }
111
112 static inline int em357_get_flash_status(struct flash_bank *bank, uint32_t *status)
113 {
114 struct target *target = bank->target;
115 return target_read_u32(target, EM357_FLASH_SR, status);
116 }
117
118 static int em357_wait_status_busy(struct flash_bank *bank, int timeout)
119 {
120 struct target *target = bank->target;
121 uint32_t status;
122 int retval = ERROR_OK;
123
124 /* wait for busy to clear */
125 for (;; ) {
126 retval = em357_get_flash_status(bank, &status);
127 if (retval != ERROR_OK)
128 return retval;
129 LOG_DEBUG("status: 0x%" PRIx32 "", status);
130 if ((status & FLASH_BSY) == 0)
131 break;
132 if (timeout-- <= 0) {
133 LOG_ERROR("timed out waiting for flash");
134 return ERROR_FAIL;
135 }
136 alive_sleep(1);
137 }
138
139 if (status & FLASH_WRPRTERR) {
140 LOG_ERROR("em357 device protected");
141 retval = ERROR_FAIL;
142 }
143
144 if (status & FLASH_PGERR) {
145 LOG_ERROR("em357 device programming failed");
146 retval = ERROR_FAIL;
147 }
148
149 /* Clear but report errors */
150 if (status & (FLASH_WRPRTERR | FLASH_PGERR)) {
151 /* If this operation fails, we ignore it and report the original
152 * retval
153 */
154 target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR | FLASH_PGERR);
155 }
156 return retval;
157 }
158
159 static int em357_read_options(struct flash_bank *bank)
160 {
161 uint32_t optiondata;
162 struct em357_flash_bank *em357_info = NULL;
163 struct target *target = bank->target;
164
165 em357_info = bank->driver_priv;
166
167 /* read current option bytes */
168 int retval = target_read_u32(target, EM357_FLASH_OBR, &optiondata);
169 if (retval != ERROR_OK)
170 return retval;
171
172 em357_info->option_bytes.user_options = (uint16_t)0xFFFC | ((optiondata >> 2) & 0x03);
173 em357_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
174
175 if (optiondata & (1 << OPT_READOUT))
176 LOG_INFO("Device Security Bit Set");
177
178 /* each bit refers to a 4bank protection */
179 retval = target_read_u32(target, EM357_FLASH_WRPR, &optiondata);
180 if (retval != ERROR_OK)
181 return retval;
182
183 em357_info->option_bytes.protection[0] = (uint16_t)optiondata;
184 em357_info->option_bytes.protection[1] = (uint16_t)(optiondata >> 8);
185 em357_info->option_bytes.protection[2] = (uint16_t)(optiondata >> 16);
186
187 return ERROR_OK;
188 }
189
190 static int em357_erase_options(struct flash_bank *bank)
191 {
192 struct em357_flash_bank *em357_info = NULL;
193 struct target *target = bank->target;
194
195 em357_info = bank->driver_priv;
196
197 /* read current options */
198 em357_read_options(bank);
199
200 /* unlock flash registers */
201 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
202 if (retval != ERROR_OK)
203 return retval;
204
205 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
206 if (retval != ERROR_OK)
207 return retval;
208
209 /* unlock option flash registers */
210 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
211 if (retval != ERROR_OK)
212 return retval;
213 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
214 if (retval != ERROR_OK)
215 return retval;
216
217 /* erase option bytes */
218 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_OPTWRE);
219 if (retval != ERROR_OK)
220 return retval;
221 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_STRT | FLASH_OPTWRE);
222 if (retval != ERROR_OK)
223 return retval;
224
225 retval = em357_wait_status_busy(bank, 10);
226 if (retval != ERROR_OK)
227 return retval;
228
229 /* clear readout protection and complementary option bytes
230 * this will also force a device unlock if set */
231 em357_info->option_bytes.RDP = 0x5AA5;
232
233 return ERROR_OK;
234 }
235
236 static int em357_write_options(struct flash_bank *bank)
237 {
238 struct em357_flash_bank *em357_info = NULL;
239 struct target *target = bank->target;
240
241 em357_info = bank->driver_priv;
242
243 /* unlock flash registers */
244 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
245 if (retval != ERROR_OK)
246 return retval;
247 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
248 if (retval != ERROR_OK)
249 return retval;
250
251 /* unlock option flash registers */
252 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
253 if (retval != ERROR_OK)
254 return retval;
255 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
256 if (retval != ERROR_OK)
257 return retval;
258
259 /* program option bytes */
260 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTPG | FLASH_OPTWRE);
261 if (retval != ERROR_OK)
262 return retval;
263
264 retval = em357_wait_status_busy(bank, 10);
265 if (retval != ERROR_OK)
266 return retval;
267
268 /* write protection byte 1 */
269 retval = target_write_u16(target, EM357_OB_WRP0, em357_info->option_bytes.protection[0]);
270 if (retval != ERROR_OK)
271 return retval;
272
273 retval = em357_wait_status_busy(bank, 10);
274 if (retval != ERROR_OK)
275 return retval;
276
277 /* write protection byte 2 */
278 retval = target_write_u16(target, EM357_OB_WRP1, em357_info->option_bytes.protection[1]);
279 if (retval != ERROR_OK)
280 return retval;
281
282 retval = em357_wait_status_busy(bank, 10);
283 if (retval != ERROR_OK)
284 return retval;
285
286 /* write protection byte 3 */
287 retval = target_write_u16(target, EM357_OB_WRP2, em357_info->option_bytes.protection[2]);
288 if (retval != ERROR_OK)
289 return retval;
290
291 retval = em357_wait_status_busy(bank, 10);
292 if (retval != ERROR_OK)
293 return retval;
294
295 /* write readout protection bit */
296 retval = target_write_u16(target, EM357_OB_RDP, em357_info->option_bytes.RDP);
297 if (retval != ERROR_OK)
298 return retval;
299
300 retval = em357_wait_status_busy(bank, 10);
301 if (retval != ERROR_OK)
302 return retval;
303
304 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
305 if (retval != ERROR_OK)
306 return retval;
307
308 return ERROR_OK;
309 }
310
311 static int em357_protect_check(struct flash_bank *bank)
312 {
313 struct target *target = bank->target;
314 struct em357_flash_bank *em357_info = bank->driver_priv;
315
316 uint32_t protection;
317 int i, s;
318 int num_bits;
319 int set;
320
321 if (target->state != TARGET_HALTED) {
322 LOG_ERROR("Target not halted");
323 return ERROR_TARGET_NOT_HALTED;
324 }
325
326 /* each bit refers to a 4bank protection (bit 0-23) */
327 int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
328 if (retval != ERROR_OK)
329 return retval;
330
331 /* each protection bit is for 4 * 2K pages */
332 num_bits = (bank->num_sectors / em357_info->ppage_size);
333
334 for (i = 0; i < num_bits; i++) {
335 set = 1;
336 if (protection & (1 << i))
337 set = 0;
338
339 for (s = 0; s < em357_info->ppage_size; s++)
340 bank->sectors[(i * em357_info->ppage_size) + s].is_protected = set;
341 }
342
343 return ERROR_OK;
344 }
345
346 static int em357_erase(struct flash_bank *bank, unsigned int first,
347 unsigned int last)
348 {
349 struct target *target = bank->target;
350
351 if (bank->target->state != TARGET_HALTED) {
352 LOG_ERROR("Target not halted");
353 return ERROR_TARGET_NOT_HALTED;
354 }
355
356 if ((first == 0) && (last == (bank->num_sectors - 1)))
357 return em357_mass_erase(bank);
358
359 /* Enable FPEC clock */
360 target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
361
362 /* unlock flash registers */
363 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
364 if (retval != ERROR_OK)
365 return retval;
366 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
367 if (retval != ERROR_OK)
368 return retval;
369
370 for (unsigned int i = first; i <= last; i++) {
371 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER);
372 if (retval != ERROR_OK)
373 return retval;
374 retval = target_write_u32(target, EM357_FLASH_AR,
375 bank->base + bank->sectors[i].offset);
376 if (retval != ERROR_OK)
377 return retval;
378 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER | FLASH_STRT);
379 if (retval != ERROR_OK)
380 return retval;
381
382 retval = em357_wait_status_busy(bank, 100);
383 if (retval != ERROR_OK)
384 return retval;
385
386 bank->sectors[i].is_erased = 1;
387 }
388
389 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
390 if (retval != ERROR_OK)
391 return retval;
392
393 return ERROR_OK;
394 }
395
396 static int em357_protect(struct flash_bank *bank, int set, unsigned int first,
397 unsigned int last)
398 {
399 struct em357_flash_bank *em357_info = NULL;
400 struct target *target = bank->target;
401 uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
402 int reg, bit;
403 int status;
404 uint32_t protection;
405
406 em357_info = bank->driver_priv;
407
408 if (target->state != TARGET_HALTED) {
409 LOG_ERROR("Target not halted");
410 return ERROR_TARGET_NOT_HALTED;
411 }
412
413 if ((first % em357_info->ppage_size) != 0) {
414 LOG_WARNING("aligned start protect sector to a %d sector boundary",
415 em357_info->ppage_size);
416 first = first - (first % em357_info->ppage_size);
417 }
418 if (((last + 1) % em357_info->ppage_size) != 0) {
419 LOG_WARNING("aligned end protect sector to a %d sector boundary",
420 em357_info->ppage_size);
421 last++;
422 last = last - (last % em357_info->ppage_size);
423 last--;
424 }
425
426 /* each bit refers to a 4bank protection */
427 int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
428 if (retval != ERROR_OK)
429 return retval;
430
431 prot_reg[0] = (uint16_t)protection;
432 prot_reg[1] = (uint16_t)(protection >> 8);
433 prot_reg[2] = (uint16_t)(protection >> 16);
434
435 for (unsigned int i = first; i <= last; i++) {
436 reg = (i / em357_info->ppage_size) / 8;
437 bit = (i / em357_info->ppage_size) - (reg * 8);
438
439 LOG_WARNING("reg, bit: %d, %d", reg, bit);
440 if (set)
441 prot_reg[reg] &= ~(1 << bit);
442 else
443 prot_reg[reg] |= (1 << bit);
444 }
445
446 status = em357_erase_options(bank);
447 if (retval != ERROR_OK)
448 return status;
449
450 em357_info->option_bytes.protection[0] = prot_reg[0];
451 em357_info->option_bytes.protection[1] = prot_reg[1];
452 em357_info->option_bytes.protection[2] = prot_reg[2];
453
454 return em357_write_options(bank);
455 }
456
457 static int em357_write_block(struct flash_bank *bank, const uint8_t *buffer,
458 uint32_t offset, uint32_t count)
459 {
460 struct target *target = bank->target;
461 uint32_t buffer_size = 16384;
462 struct working_area *write_algorithm;
463 struct working_area *source;
464 uint32_t address = bank->base + offset;
465 struct reg_param reg_params[4];
466 struct armv7m_algorithm armv7m_info;
467 int retval = ERROR_OK;
468
469 /* see contrib/loaders/flash/stm32x.s for src, the same is used here except for
470 * a modified *_FLASH_BASE */
471
472 static const uint8_t em357_flash_write_code[] = {
473 /* #define EM357_FLASH_CR_OFFSET 0x10
474 * #define EM357_FLASH_SR_OFFSET 0x0C
475 * write: */
476 0x08, 0x4c, /* ldr r4, EM357_FLASH_BASE */
477 0x1c, 0x44, /* add r4, r3 */
478 /* write_half_word: */
479 0x01, 0x23, /* movs r3, #0x01 */
480 0x23, 0x61, /* str r3, [r4,
481 *#EM357_FLASH_CR_OFFSET] */
482 0x30, 0xf8, 0x02, 0x3b, /* ldrh r3, [r0], #0x02 */
483 0x21, 0xf8, 0x02, 0x3b, /* strh r3, [r1], #0x02 */
484 /* busy: */
485 0xe3, 0x68, /* ldr r3, [r4,
486 *#EM357_FLASH_SR_OFFSET] */
487 0x13, 0xf0, 0x01, 0x0f, /* tst r3, #0x01 */
488 0xfb, 0xd0, /* beq busy */
489 0x13, 0xf0, 0x14, 0x0f, /* tst r3, #0x14 */
490 0x01, 0xd1, /* bne exit */
491 0x01, 0x3a, /* subs r2, r2, #0x01 */
492 0xf0, 0xd1, /* bne write_half_word */
493 /* exit: */
494 0x00, 0xbe, /* bkpt #0x00 */
495 0x00, 0x80, 0x00, 0x40, /* EM357_FLASH_BASE: .word 0x40008000 */
496 };
497
498 /* flash write code */
499 if (target_alloc_working_area(target, sizeof(em357_flash_write_code),
500 &write_algorithm) != ERROR_OK) {
501 LOG_WARNING("no working area available, can't do block memory writes");
502 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
503 }
504
505 retval = target_write_buffer(target, write_algorithm->address,
506 sizeof(em357_flash_write_code), em357_flash_write_code);
507 if (retval != ERROR_OK)
508 return retval;
509
510 /* memory buffer */
511 while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
512 buffer_size /= 2;
513 if (buffer_size <= 256) {
514 /* we already allocated the writing code, but failed to get a
515 * buffer, free the algorithm */
516 target_free_working_area(target, write_algorithm);
517
518 LOG_WARNING(
519 "no large enough working area available, can't do block memory writes");
520 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
521 }
522 }
523
524 armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
525 armv7m_info.core_mode = ARM_MODE_THREAD;
526
527 init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
528 init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
529 init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
530 init_reg_param(&reg_params[3], "r3", 32, PARAM_IN_OUT);
531
532 while (count > 0) {
533 uint32_t thisrun_count = (count > (buffer_size / 2)) ?
534 (buffer_size / 2) : count;
535
536 retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer);
537 if (retval != ERROR_OK)
538 break;
539
540 buf_set_u32(reg_params[0].value, 0, 32, source->address);
541 buf_set_u32(reg_params[1].value, 0, 32, address);
542 buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
543 buf_set_u32(reg_params[3].value, 0, 32, 0);
544
545 retval = target_run_algorithm(target, 0, NULL, 4, reg_params,
546 write_algorithm->address, 0, 10000, &armv7m_info);
547 if (retval != ERROR_OK) {
548 LOG_ERROR("error executing em357 flash write algorithm");
549 break;
550 }
551
552 if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_PGERR) {
553 LOG_ERROR("flash memory not erased before writing");
554 /* Clear but report errors */
555 target_write_u32(target, EM357_FLASH_SR, FLASH_PGERR);
556 retval = ERROR_FAIL;
557 break;
558 }
559
560 if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_WRPRTERR) {
561 LOG_ERROR("flash memory write protected");
562 /* Clear but report errors */
563 target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR);
564 retval = ERROR_FAIL;
565 break;
566 }
567
568 buffer += thisrun_count * 2;
569 address += thisrun_count * 2;
570 count -= thisrun_count;
571 }
572
573 target_free_working_area(target, source);
574 target_free_working_area(target, write_algorithm);
575
576 destroy_reg_param(&reg_params[0]);
577 destroy_reg_param(&reg_params[1]);
578 destroy_reg_param(&reg_params[2]);
579 destroy_reg_param(&reg_params[3]);
580
581 return retval;
582 }
583
584 static int em357_write(struct flash_bank *bank, const uint8_t *buffer,
585 uint32_t offset, uint32_t count)
586 {
587 struct target *target = bank->target;
588 uint32_t words_remaining = (count / 2);
589 uint32_t bytes_remaining = (count & 0x00000001);
590 uint32_t address = bank->base + offset;
591 uint32_t bytes_written = 0;
592 int retval;
593
594 if (bank->target->state != TARGET_HALTED) {
595 LOG_ERROR("Target not halted");
596 return ERROR_TARGET_NOT_HALTED;
597 }
598
599 if (offset & 0x1) {
600 LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
601 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
602 }
603
604 /* unlock flash registers */
605 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
606 if (retval != ERROR_OK)
607 return retval;
608 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
609 if (retval != ERROR_OK)
610 return retval;
611
612 target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
613
614 /* multiple half words (2-byte) to be programmed? */
615 if (words_remaining > 0) {
616 /* try using a block write */
617 retval = em357_write_block(bank, buffer, offset, words_remaining);
618 if (retval != ERROR_OK) {
619 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
620 /* if block write failed (no sufficient working area),
621 * we use normal (slow) single dword accesses */
622 LOG_WARNING(
623 "couldn't use block writes, falling back to single memory accesses");
624 }
625 } else {
626 buffer += words_remaining * 2;
627 address += words_remaining * 2;
628 words_remaining = 0;
629 }
630 }
631
632 if ((retval != ERROR_OK) && (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE))
633 return retval;
634
635 while (words_remaining > 0) {
636 uint16_t value;
637 memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
638
639 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
640 if (retval != ERROR_OK)
641 return retval;
642 retval = target_write_u16(target, address, value);
643 if (retval != ERROR_OK)
644 return retval;
645
646 retval = em357_wait_status_busy(bank, 5);
647 if (retval != ERROR_OK)
648 return retval;
649
650 bytes_written += 2;
651 words_remaining--;
652 address += 2;
653 }
654
655 if (bytes_remaining) {
656 uint16_t value = 0xffff;
657 memcpy(&value, buffer + bytes_written, bytes_remaining);
658
659 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
660 if (retval != ERROR_OK)
661 return retval;
662 retval = target_write_u16(target, address, value);
663 if (retval != ERROR_OK)
664 return retval;
665
666 retval = em357_wait_status_busy(bank, 5);
667 if (retval != ERROR_OK)
668 return retval;
669 }
670
671 return target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
672 }
673
674 static int em357_probe(struct flash_bank *bank)
675 {
676 struct target *target = bank->target;
677 struct em357_flash_bank *em357_info = bank->driver_priv;
678 int i;
679 uint16_t num_pages;
680 int page_size;
681 uint32_t base_address = 0x08000000;
682
683 em357_info->probed = false;
684
685 switch (bank->size) {
686 case 0x10000:
687 /* 64k -- 64 1k pages */
688 num_pages = 64;
689 page_size = 1024;
690 break;
691 case 0x20000:
692 /* 128k -- 128 1k pages */
693 num_pages = 128;
694 page_size = 1024;
695 break;
696 case 0x30000:
697 /* 192k -- 96 2k pages */
698 num_pages = 96;
699 page_size = 2048;
700 break;
701 case 0x40000:
702 /* 256k -- 128 2k pages */
703 num_pages = 128;
704 page_size = 2048;
705 break;
706 case 0x80000:
707 /* 512k -- 256 2k pages */
708 num_pages = 256;
709 page_size = 2048;
710 break;
711 default:
712 LOG_WARNING("No size specified for em357 flash driver, assuming 192k!");
713 num_pages = 96;
714 page_size = 2048;
715 break;
716 }
717
718 /* Enable FPEC CLK */
719 int retval = target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
720 if (retval != ERROR_OK)
721 return retval;
722
723 em357_info->ppage_size = 4;
724
725 LOG_INFO("flash size = %dkbytes", num_pages*page_size/1024);
726
727 free(bank->sectors);
728
729 bank->base = base_address;
730 bank->size = (num_pages * page_size);
731 bank->num_sectors = num_pages;
732 bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
733
734 for (i = 0; i < num_pages; i++) {
735 bank->sectors[i].offset = i * page_size;
736 bank->sectors[i].size = page_size;
737 bank->sectors[i].is_erased = -1;
738 bank->sectors[i].is_protected = 1;
739 }
740
741 em357_info->probed = true;
742
743 return ERROR_OK;
744 }
745
746 static int em357_auto_probe(struct flash_bank *bank)
747 {
748 struct em357_flash_bank *em357_info = bank->driver_priv;
749 if (em357_info->probed)
750 return ERROR_OK;
751 return em357_probe(bank);
752 }
753
754 COMMAND_HANDLER(em357_handle_lock_command)
755 {
756 struct target *target = NULL;
757 struct em357_flash_bank *em357_info = NULL;
758
759 if (CMD_ARGC < 1)
760 return ERROR_COMMAND_SYNTAX_ERROR;
761
762 struct flash_bank *bank;
763 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
764 if (ERROR_OK != retval)
765 return retval;
766
767 em357_info = bank->driver_priv;
768
769 target = bank->target;
770
771 if (target->state != TARGET_HALTED) {
772 LOG_ERROR("Target not halted");
773 return ERROR_TARGET_NOT_HALTED;
774 }
775
776 if (em357_erase_options(bank) != ERROR_OK) {
777 command_print(CMD, "em357 failed to erase options");
778 return ERROR_OK;
779 }
780
781 /* set readout protection */
782 em357_info->option_bytes.RDP = 0;
783
784 if (em357_write_options(bank) != ERROR_OK) {
785 command_print(CMD, "em357 failed to lock device");
786 return ERROR_OK;
787 }
788
789 command_print(CMD, "em357 locked");
790
791 return ERROR_OK;
792 }
793
794 COMMAND_HANDLER(em357_handle_unlock_command)
795 {
796 struct target *target = NULL;
797
798 if (CMD_ARGC < 1)
799 return ERROR_COMMAND_SYNTAX_ERROR;
800
801 struct flash_bank *bank;
802 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
803 if (ERROR_OK != retval)
804 return retval;
805
806 target = bank->target;
807
808 if (target->state != TARGET_HALTED) {
809 LOG_ERROR("Target not halted");
810 return ERROR_TARGET_NOT_HALTED;
811 }
812
813 if (em357_erase_options(bank) != ERROR_OK) {
814 command_print(CMD, "em357 failed to unlock device");
815 return ERROR_OK;
816 }
817
818 if (em357_write_options(bank) != ERROR_OK) {
819 command_print(CMD, "em357 failed to lock device");
820 return ERROR_OK;
821 }
822
823 command_print(CMD, "em357 unlocked.\n"
824 "INFO: a reset or power cycle is required "
825 "for the new settings to take effect.");
826
827 return ERROR_OK;
828 }
829
830 static int em357_mass_erase(struct flash_bank *bank)
831 {
832 struct target *target = bank->target;
833
834 if (target->state != TARGET_HALTED) {
835 LOG_ERROR("Target not halted");
836 return ERROR_TARGET_NOT_HALTED;
837 }
838
839 /* Make sure the flash clock is on */
840 target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
841
842 /* unlock option flash registers */
843 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
844 if (retval != ERROR_OK)
845 return retval;
846 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
847 if (retval != ERROR_OK)
848 return retval;
849
850 /* mass erase flash memory */
851 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER);
852 if (retval != ERROR_OK)
853 return retval;
854 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER | FLASH_STRT);
855 if (retval != ERROR_OK)
856 return retval;
857
858 retval = em357_wait_status_busy(bank, 100);
859 if (retval != ERROR_OK)
860 return retval;
861
862 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
863 if (retval != ERROR_OK)
864 return retval;
865
866 return ERROR_OK;
867 }
868
869 COMMAND_HANDLER(em357_handle_mass_erase_command)
870 {
871 if (CMD_ARGC < 1)
872 return ERROR_COMMAND_SYNTAX_ERROR;
873
874 struct flash_bank *bank;
875 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
876 if (ERROR_OK != retval)
877 return retval;
878
879 retval = em357_mass_erase(bank);
880 if (retval == ERROR_OK) {
881 /* set all sectors as erased */
882 for (unsigned int i = 0; i < bank->num_sectors; i++)
883 bank->sectors[i].is_erased = 1;
884
885 command_print(CMD, "em357 mass erase complete");
886 } else
887 command_print(CMD, "em357 mass erase failed");
888
889 return retval;
890 }
891
892 static const struct command_registration em357_exec_command_handlers[] = {
893 {
894 .name = "lock",
895 .usage = "<bank>",
896 .handler = em357_handle_lock_command,
897 .mode = COMMAND_EXEC,
898 .help = "Lock entire flash device.",
899 },
900 {
901 .name = "unlock",
902 .usage = "<bank>",
903 .handler = em357_handle_unlock_command,
904 .mode = COMMAND_EXEC,
905 .help = "Unlock entire protected flash device.",
906 },
907 {
908 .name = "mass_erase",
909 .usage = "<bank>",
910 .handler = em357_handle_mass_erase_command,
911 .mode = COMMAND_EXEC,
912 .help = "Erase entire flash device.",
913 },
914 COMMAND_REGISTRATION_DONE
915 };
916
917 static const struct command_registration em357_command_handlers[] = {
918 {
919 .name = "em357",
920 .mode = COMMAND_ANY,
921 .help = "em357 flash command group",
922 .usage = "",
923 .chain = em357_exec_command_handlers,
924 },
925 COMMAND_REGISTRATION_DONE
926 };
927
928 const struct flash_driver em357_flash = {
929 .name = "em357",
930 .commands = em357_command_handlers,
931 .flash_bank_command = em357_flash_bank_command,
932 .erase = em357_erase,
933 .protect = em357_protect,
934 .write = em357_write,
935 .read = default_flash_read,
936 .probe = em357_probe,
937 .auto_probe = em357_auto_probe,
938 .erase_check = default_flash_blank_check,
939 .protect_check = em357_protect_check,
940 .free_driver_priv = default_flash_free_driver_priv,
941 };
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