flash/nor/avrf: Minor code cleanups
[openocd.git] / src / flash / nor / avrf.c
1 /***************************************************************************
2 * Copyright (C) 2009 by Simon Qian *
3 * SimonQian@SimonQian.com *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
17 ***************************************************************************/
18
19 #ifdef HAVE_CONFIG_H
20 #include "config.h"
21 #endif
22
23 #include "imp.h"
24 #include <target/avrt.h>
25
26 /* AVR_JTAG_Instructions */
27 #define AVR_JTAG_INS_LEN 4
28 /* Public Instructions: */
29 #define AVR_JTAG_INS_EXTEST 0x00
30 #define AVR_JTAG_INS_IDCODE 0x01
31 #define AVR_JTAG_INS_SAMPLE_PRELOAD 0x02
32 #define AVR_JTAG_INS_BYPASS 0x0F
33 /* AVR Specified Public Instructions: */
34 #define AVR_JTAG_INS_AVR_RESET 0x0C
35 #define AVR_JTAG_INS_PROG_ENABLE 0x04
36 #define AVR_JTAG_INS_PROG_COMMANDS 0x05
37 #define AVR_JTAG_INS_PROG_PAGELOAD 0x06
38 #define AVR_JTAG_INS_PROG_PAGEREAD 0x07
39
40 /* Data Registers: */
41 #define AVR_JTAG_REG_Bypass_Len 1
42 #define AVR_JTAG_REG_DeviceID_Len 32
43
44 #define AVR_JTAG_REG_Reset_Len 1
45 #define AVR_JTAG_REG_JTAGID_Len 32
46 #define AVR_JTAG_REG_ProgrammingEnable_Len 16
47 #define AVR_JTAG_REG_ProgrammingCommand_Len 15
48 #define AVR_JTAG_REG_FlashDataByte_Len 16
49
50 struct avrf_type {
51 char name[15];
52 uint16_t chip_id;
53 int flash_page_size;
54 int flash_page_num;
55 int eeprom_page_size;
56 int eeprom_page_num;
57 };
58
59 struct avrf_flash_bank {
60 int ppage_size;
61 bool probed;
62 };
63
64 static const struct avrf_type avft_chips_info[] = {
65 /* name, chip_id, flash_page_size, flash_page_num,
66 * eeprom_page_size, eeprom_page_num
67 */
68 {"atmega128", 0x9702, 256, 512, 8, 512},
69 {"atmega128rfa1", 0xa701, 128, 512, 8, 512},
70 {"atmega256rfr2", 0xa802, 256, 1024, 8, 1024},
71 {"at90can128", 0x9781, 256, 512, 8, 512},
72 {"at90usb128", 0x9782, 256, 512, 8, 512},
73 {"atmega164p", 0x940a, 128, 128, 4, 128},
74 {"atmega324p", 0x9508, 128, 256, 4, 256},
75 {"atmega324pa", 0x9511, 128, 256, 4, 256},
76 {"atmega644p", 0x960a, 256, 256, 8, 256},
77 {"atmega1284p", 0x9705, 256, 512, 8, 512},
78 };
79
80 /* avr program functions */
81 static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
82 {
83 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
84 avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_Reset_Len);
85
86 return ERROR_OK;
87 }
88
89 static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id)
90 {
91 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
92 avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
93
94 return ERROR_OK;
95 }
96
97 static int avr_jtagprg_enterprogmode(struct avr_common *avr)
98 {
99 avr_jtag_reset(avr, 1);
100
101 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
102 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
103
104 return ERROR_OK;
105 }
106
107 static int avr_jtagprg_leaveprogmode(struct avr_common *avr)
108 {
109 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
110 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
111 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
112
113 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
114 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
115
116 avr_jtag_reset(avr, 0);
117
118 return ERROR_OK;
119 }
120
121 static int avr_jtagprg_chiperase(struct avr_common *avr)
122 {
123 uint32_t poll_value;
124
125 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
126 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
127 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
128 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
129 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
130
131 do {
132 poll_value = 0;
133 avr_jtag_senddat(avr->jtag_info.tap,
134 &poll_value,
135 0x3380,
136 AVR_JTAG_REG_ProgrammingCommand_Len);
137 if (ERROR_OK != mcu_execute_queue())
138 return ERROR_FAIL;
139 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
140 } while (!(poll_value & 0x0200));
141
142 return ERROR_OK;
143 }
144
145 static int avr_jtagprg_writeflashpage(struct avr_common *avr,
146 const bool ext_addressing,
147 const uint8_t *page_buf,
148 uint32_t buf_size,
149 uint32_t addr,
150 uint32_t page_size)
151 {
152 uint32_t poll_value;
153
154 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
155 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
156
157 /* load extended high byte */
158 if (ext_addressing)
159 avr_jtag_senddat(avr->jtag_info.tap,
160 NULL,
161 0x0b00 | ((addr >> 17) & 0xFF),
162 AVR_JTAG_REG_ProgrammingCommand_Len);
163
164 /* load addr high byte */
165 avr_jtag_senddat(avr->jtag_info.tap,
166 NULL,
167 0x0700 | ((addr >> 9) & 0xFF),
168 AVR_JTAG_REG_ProgrammingCommand_Len);
169
170 /* load addr low byte */
171 avr_jtag_senddat(avr->jtag_info.tap,
172 NULL,
173 0x0300 | ((addr >> 1) & 0xFF),
174 AVR_JTAG_REG_ProgrammingCommand_Len);
175
176 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
177
178 for (uint32_t i = 0; i < page_size; i++) {
179 if (i < buf_size)
180 avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
181 else
182 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
183 }
184
185 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
186
187 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
188 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
189 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
190 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
191
192 do {
193 poll_value = 0;
194 avr_jtag_senddat(avr->jtag_info.tap,
195 &poll_value,
196 0x3700,
197 AVR_JTAG_REG_ProgrammingCommand_Len);
198 if (ERROR_OK != mcu_execute_queue())
199 return ERROR_FAIL;
200 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
201 } while (!(poll_value & 0x0200));
202
203 return ERROR_OK;
204 }
205
206 FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
207 {
208 struct avrf_flash_bank *avrf_info;
209
210 if (CMD_ARGC < 6)
211 return ERROR_COMMAND_SYNTAX_ERROR;
212
213 avrf_info = malloc(sizeof(struct avrf_flash_bank));
214 bank->driver_priv = avrf_info;
215
216 avrf_info->probed = false;
217
218 return ERROR_OK;
219 }
220
221 static int avrf_erase(struct flash_bank *bank, int first, int last)
222 {
223 struct target *target = bank->target;
224 struct avr_common *avr = target->arch_info;
225 int status;
226
227 LOG_DEBUG("%s", __func__);
228
229 if (target->state != TARGET_HALTED) {
230 LOG_ERROR("Target not halted");
231 return ERROR_TARGET_NOT_HALTED;
232 }
233
234 status = avr_jtagprg_enterprogmode(avr);
235 if (status != ERROR_OK)
236 return status;
237
238 status = avr_jtagprg_chiperase(avr);
239 if (status != ERROR_OK)
240 return status;
241
242 return avr_jtagprg_leaveprogmode(avr);
243 }
244
245 static int avrf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
246 {
247 struct target *target = bank->target;
248 struct avr_common *avr = target->arch_info;
249 uint32_t cur_size, cur_buffer_size, page_size;
250 bool ext_addressing;
251
252 if (bank->target->state != TARGET_HALTED) {
253 LOG_ERROR("Target not halted");
254 return ERROR_TARGET_NOT_HALTED;
255 }
256
257 page_size = bank->sectors[0].size;
258 if ((offset % page_size) != 0) {
259 LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment",
260 offset,
261 page_size);
262 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
263 }
264
265 LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
266 LOG_DEBUG("count is %" PRId32 "", count);
267
268 if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
269 return ERROR_FAIL;
270
271 if (bank->size > 0x20000)
272 ext_addressing = true;
273 else
274 ext_addressing = false;
275
276 cur_size = 0;
277 while (count > 0) {
278 if (count > page_size)
279 cur_buffer_size = page_size;
280 else
281 cur_buffer_size = count;
282 avr_jtagprg_writeflashpage(avr,
283 ext_addressing,
284 buffer + cur_size,
285 cur_buffer_size,
286 offset + cur_size,
287 page_size);
288 count -= cur_buffer_size;
289 cur_size += cur_buffer_size;
290
291 keep_alive();
292 }
293
294 return avr_jtagprg_leaveprogmode(avr);
295 }
296
297 #define EXTRACT_MFG(X) (((X) & 0xffe) >> 1)
298 #define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
299 #define EXTRACT_VER(X) (((X) & 0xf0000000) >> 28)
300
301 static int avrf_probe(struct flash_bank *bank)
302 {
303 struct target *target = bank->target;
304 struct avrf_flash_bank *avrf_info = bank->driver_priv;
305 struct avr_common *avr = target->arch_info;
306 const struct avrf_type *avr_info = NULL;
307 uint32_t device_id;
308
309 if (bank->target->state != TARGET_HALTED) {
310 LOG_ERROR("Target not halted");
311 return ERROR_TARGET_NOT_HALTED;
312 }
313
314 avrf_info->probed = false;
315
316 avr_jtag_read_jtagid(avr, &device_id);
317 if (ERROR_OK != mcu_execute_queue())
318 return ERROR_FAIL;
319
320 LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
321 if (EXTRACT_MFG(device_id) != 0x1F)
322 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
323 EXTRACT_MFG(device_id),
324 0x1F);
325
326 for (size_t i = 0; i < ARRAY_SIZE(avft_chips_info); i++) {
327 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
328 avr_info = &avft_chips_info[i];
329 LOG_INFO("target device is %s", avr_info->name);
330 break;
331 }
332 }
333
334 if (avr_info != NULL) {
335 if (bank->sectors) {
336 free(bank->sectors);
337 bank->sectors = NULL;
338 }
339
340 /* chip found */
341 bank->base = 0x00000000;
342 bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
343 bank->num_sectors = avr_info->flash_page_num;
344 bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num);
345
346 for (int i = 0; i < avr_info->flash_page_num; i++) {
347 bank->sectors[i].offset = i * avr_info->flash_page_size;
348 bank->sectors[i].size = avr_info->flash_page_size;
349 bank->sectors[i].is_erased = -1;
350 bank->sectors[i].is_protected = -1;
351 }
352
353 avrf_info->probed = true;
354 return ERROR_OK;
355 } else {
356 /* chip not supported */
357 LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
358
359 avrf_info->probed = true;
360 return ERROR_FAIL;
361 }
362 }
363
364 static int avrf_auto_probe(struct flash_bank *bank)
365 {
366 struct avrf_flash_bank *avrf_info = bank->driver_priv;
367 if (avrf_info->probed)
368 return ERROR_OK;
369 return avrf_probe(bank);
370 }
371
372 static int avrf_info(struct flash_bank *bank, char *buf, int buf_size)
373 {
374 struct target *target = bank->target;
375 struct avr_common *avr = target->arch_info;
376 const struct avrf_type *avr_info = NULL;
377 uint32_t device_id;
378
379 if (bank->target->state != TARGET_HALTED) {
380 LOG_ERROR("Target not halted");
381 return ERROR_TARGET_NOT_HALTED;
382 }
383
384 avr_jtag_read_jtagid(avr, &device_id);
385 if (ERROR_OK != mcu_execute_queue())
386 return ERROR_FAIL;
387
388 LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
389 if (EXTRACT_MFG(device_id) != 0x1F)
390 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
391 EXTRACT_MFG(device_id),
392 0x1F);
393
394 for (size_t i = 0; i < ARRAY_SIZE(avft_chips_info); i++) {
395 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
396 avr_info = &avft_chips_info[i];
397 LOG_INFO("target device is %s", avr_info->name);
398
399 break;
400 }
401 }
402
403 if (avr_info != NULL) {
404 /* chip found */
405 snprintf(buf, buf_size, "%s - Rev: 0x%" PRIx32 "", avr_info->name,
406 EXTRACT_VER(device_id));
407 return ERROR_OK;
408 } else {
409 /* chip not supported */
410 snprintf(buf, buf_size, "Cannot identify target as a avr\n");
411 return ERROR_FLASH_OPERATION_FAILED;
412 }
413 }
414
415 static int avrf_mass_erase(struct flash_bank *bank)
416 {
417 struct target *target = bank->target;
418 struct avr_common *avr = target->arch_info;
419
420 if (target->state != TARGET_HALTED) {
421 LOG_ERROR("Target not halted");
422 return ERROR_TARGET_NOT_HALTED;
423 }
424
425 if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
426 || (ERROR_OK != avr_jtagprg_chiperase(avr))
427 || (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
428 return ERROR_FAIL;
429
430 return ERROR_OK;
431 }
432
433 COMMAND_HANDLER(avrf_handle_mass_erase_command)
434 {
435 if (CMD_ARGC < 1)
436 return ERROR_COMMAND_SYNTAX_ERROR;
437
438 struct flash_bank *bank;
439 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
440 if (ERROR_OK != retval)
441 return retval;
442
443 if (avrf_mass_erase(bank) == ERROR_OK) {
444 /* set all sectors as erased */
445 for (int i = 0; i < bank->num_sectors; i++)
446 bank->sectors[i].is_erased = 1;
447
448 command_print(CMD, "avr mass erase complete");
449 } else
450 command_print(CMD, "avr mass erase failed");
451
452 LOG_DEBUG("%s", __func__);
453 return ERROR_OK;
454 }
455
456 static const struct command_registration avrf_exec_command_handlers[] = {
457 {
458 .name = "mass_erase",
459 .usage = "<bank>",
460 .handler = avrf_handle_mass_erase_command,
461 .mode = COMMAND_EXEC,
462 .help = "erase entire device",
463 },
464 COMMAND_REGISTRATION_DONE
465 };
466 static const struct command_registration avrf_command_handlers[] = {
467 {
468 .name = "avrf",
469 .mode = COMMAND_ANY,
470 .help = "AVR flash command group",
471 .usage = "",
472 .chain = avrf_exec_command_handlers,
473 },
474 COMMAND_REGISTRATION_DONE
475 };
476
477 const struct flash_driver avr_flash = {
478 .name = "avr",
479 .commands = avrf_command_handlers,
480 .flash_bank_command = avrf_flash_bank_command,
481 .erase = avrf_erase,
482 .write = avrf_write,
483 .read = default_flash_read,
484 .probe = avrf_probe,
485 .auto_probe = avrf_auto_probe,
486 .erase_check = default_flash_blank_check,
487 .info = avrf_info,
488 .free_driver_priv = default_flash_free_driver_priv,
489 };

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