1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath <Dominic.Rath@gmx.de> *
3 * Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
4 * Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
6 * Partially based on drivers/mtd/nand_ids.c from Linux. *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
29 /* configured NAND devices and NAND Flash command handler */
30 struct nand_device
*nand_devices
= NULL
;
32 void nand_device_add(struct nand_device
*c
)
35 struct nand_device
*p
= nand_devices
;
36 while (p
&& p
->next
) p
= p
->next
;
45 * Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
48 * Pagesize; 0, 256, 512
49 * 0 get this information from the extended chip ID
50 * 256 256 Byte page size
51 * 512 512 Byte page size
53 static struct nand_info nand_flash_ids
[] =
55 /* start "museum" IDs */
56 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
57 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
58 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
59 {"NAND 1MiB 3.3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
60 {"NAND 1MiB 3.3V 8-bit", 0xec, 256, 1, 0x1000, 0},
61 {"NAND 2MiB 3.3V 8-bit", 0xea, 256, 2, 0x1000, 0},
62 {"NAND 4MiB 3.3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
63 {"NAND 4MiB 3.3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
64 {"NAND 4MiB 3.3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
65 {"NAND 8MiB 3.3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
67 {"NAND 8MiB 1.8V 8-bit", 0x39, 512, 8, 0x2000, 0},
68 {"NAND 8MiB 3.3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
69 {"NAND 8MiB 1.8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
70 {"NAND 8MiB 3.3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
71 /* end "museum" IDs */
73 {"NAND 16MiB 1.8V 8-bit", 0x33, 512, 16, 0x4000, 0},
74 {"NAND 16MiB 3.3V 8-bit", 0x73, 512, 16, 0x4000, 0},
75 {"NAND 16MiB 1.8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
76 {"NAND 16MiB 3.3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
78 {"NAND 32MiB 1.8V 8-bit", 0x35, 512, 32, 0x4000, 0},
79 {"NAND 32MiB 3.3V 8-bit", 0x75, 512, 32, 0x4000, 0},
80 {"NAND 32MiB 1.8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
81 {"NAND 32MiB 3.3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
83 {"NAND 64MiB 1.8V 8-bit", 0x36, 512, 64, 0x4000, 0},
84 {"NAND 64MiB 3.3V 8-bit", 0x76, 512, 64, 0x4000, 0},
85 {"NAND 64MiB 1.8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
86 {"NAND 64MiB 3.3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
88 {"NAND 128MiB 1.8V 8-bit", 0x78, 512, 128, 0x4000, 0},
89 {"NAND 128MiB 1.8V 8-bit", 0x39, 512, 128, 0x4000, 0},
90 {"NAND 128MiB 3.3V 8-bit", 0x79, 512, 128, 0x4000, 0},
91 {"NAND 128MiB 1.8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
92 {"NAND 128MiB 1.8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
93 {"NAND 128MiB 3.3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
94 {"NAND 128MiB 3.3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
96 {"NAND 256MiB 3.3V 8-bit", 0x71, 512, 256, 0x4000, 0},
98 {"NAND 64MiB 1.8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS
},
99 {"NAND 64MiB 3.3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS
},
100 {"NAND 64MiB 1.8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16
},
101 {"NAND 64MiB 3.3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16
},
103 {"NAND 128MiB 1.8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS
},
104 {"NAND 128MiB 3.3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS
},
105 {"NAND 128MiB 1.8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16
},
106 {"NAND 128MiB 3.3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16
},
108 {"NAND 256MiB 1.8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS
},
109 {"NAND 256MiB 3.3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS
},
110 {"NAND 256MiB 1.8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16
},
111 {"NAND 256MiB 3.3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16
},
113 {"NAND 512MiB 1.8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS
},
114 {"NAND 512MiB 3.3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS
},
115 {"NAND 512MiB 1.8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16
},
116 {"NAND 512MiB 3.3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16
},
118 {"NAND 1GiB 1.8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS
},
119 {"NAND 1GiB 3.3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS
},
120 {"NAND 1GiB 1.8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16
},
121 {"NAND 1GiB 3.3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16
},
123 {"NAND 2GiB 1.8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS
},
124 {"NAND 2GiB 3.3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS
},
125 {"NAND 2GiB 1.8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16
},
126 {"NAND 2GiB 3.3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16
},
128 {"NAND 2GiB 3.3V 8-bit", 0x48, 0, 2048, 0, LP_OPTIONS
},
130 {NULL
, 0, 0, 0, 0, 0 }
133 /* Manufacturer ID list
135 static struct nand_manufacturer nand_manuf_ids
[] =
138 {NAND_MFR_TOSHIBA
, "Toshiba"},
139 {NAND_MFR_SAMSUNG
, "Samsung"},
140 {NAND_MFR_FUJITSU
, "Fujitsu"},
141 {NAND_MFR_NATIONAL
, "National"},
142 {NAND_MFR_RENESAS
, "Renesas"},
143 {NAND_MFR_STMICRO
, "ST Micro"},
144 {NAND_MFR_HYNIX
, "Hynix"},
145 {NAND_MFR_MICRON
, "Micron"},
150 * Define default oob placement schemes for large and small page devices
154 static struct nand_ecclayout nand_oob_8
= {
166 * Returns the flash bank specified by @a name, which matches the
167 * driver name and a suffix (option) specify the driver-specific
168 * bank number. The suffix consists of the '.' and the driver-specific
169 * bank number: when two davinci banks are defined, then 'davinci.1' refers
170 * to the second (e.g. DM355EVM).
172 static struct nand_device
*get_nand_device_by_name(const char *name
)
174 unsigned requested
= get_flash_name_index(name
);
177 struct nand_device
*nand
;
178 for (nand
= nand_devices
; NULL
!= nand
; nand
= nand
->next
)
180 if (strcmp(nand
->name
, name
) == 0)
182 if (!flash_driver_name_matches(nand
->controller
->name
, name
))
184 if (++found
< requested
)
191 struct nand_device
*get_nand_device_by_num(int num
)
193 struct nand_device
*p
;
196 for (p
= nand_devices
; p
; p
= p
->next
)
207 COMMAND_HELPER(nand_command_get_device
, unsigned name_index
,
208 struct nand_device
**nand
)
210 const char *str
= CMD_ARGV
[name_index
];
211 *nand
= get_nand_device_by_name(str
);
216 COMMAND_PARSE_NUMBER(uint
, str
, num
);
217 *nand
= get_nand_device_by_num(num
);
219 command_print(CMD_CTX
, "NAND flash device '%s' not found", str
);
220 return ERROR_INVALID_ARGUMENTS
;
225 int nand_build_bbt(struct nand_device
*nand
, int first
, int last
)
229 int pages_per_block
= (nand
->erase_size
/ nand
->page_size
);
233 if ((first
< 0) || (first
>= nand
->num_blocks
))
236 if ((last
>= nand
->num_blocks
) || (last
== -1))
237 last
= nand
->num_blocks
- 1;
239 page
= first
* pages_per_block
;
240 for (i
= first
; i
<= last
; i
++)
242 ret
= nand_read_page(nand
, page
, NULL
, 0, oob
, 6);
246 if (((nand
->device
->options
& NAND_BUSWIDTH_16
) && ((oob
[0] & oob
[1]) != 0xff))
247 || (((nand
->page_size
== 512) && (oob
[5] != 0xff)) ||
248 ((nand
->page_size
== 2048) && (oob
[0] != 0xff))))
250 LOG_WARNING("bad block: %i", i
);
251 nand
->blocks
[i
].is_bad
= 1;
255 nand
->blocks
[i
].is_bad
= 0;
258 page
+= pages_per_block
;
264 int nand_read_status(struct nand_device
*nand
, uint8_t *status
)
267 return ERROR_NAND_DEVICE_NOT_PROBED
;
269 /* Send read status command */
270 nand
->controller
->command(nand
, NAND_CMD_STATUS
);
275 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
278 nand
->controller
->read_data(nand
, &data
);
279 *status
= data
& 0xff;
283 nand
->controller
->read_data(nand
, status
);
289 static int nand_poll_ready(struct nand_device
*nand
, int timeout
)
293 nand
->controller
->command(nand
, NAND_CMD_STATUS
);
295 if (nand
->device
->options
& NAND_BUSWIDTH_16
) {
297 nand
->controller
->read_data(nand
, &data
);
298 status
= data
& 0xff;
300 nand
->controller
->read_data(nand
, &status
);
302 if (status
& NAND_STATUS_READY
)
307 return (status
& NAND_STATUS_READY
) != 0;
310 int nand_probe(struct nand_device
*nand
)
312 uint8_t manufacturer_id
, device_id
;
317 /* clear device data */
319 nand
->manufacturer
= NULL
;
321 /* clear device parameters */
323 nand
->address_cycles
= 0;
325 nand
->erase_size
= 0;
327 /* initialize controller (device parameters are zero, use controller default) */
328 if ((retval
= nand
->controller
->init(nand
) != ERROR_OK
))
332 case ERROR_NAND_OPERATION_FAILED
:
333 LOG_DEBUG("controller initialization failed");
334 return ERROR_NAND_OPERATION_FAILED
;
335 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
336 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
337 return ERROR_NAND_OPERATION_FAILED
;
339 LOG_ERROR("BUG: unknown controller initialization failure");
340 return ERROR_NAND_OPERATION_FAILED
;
344 nand
->controller
->command(nand
, NAND_CMD_RESET
);
345 nand
->controller
->reset(nand
);
347 nand
->controller
->command(nand
, NAND_CMD_READID
);
348 nand
->controller
->address(nand
, 0x0);
350 if (nand
->bus_width
== 8)
352 nand
->controller
->read_data(nand
, &manufacturer_id
);
353 nand
->controller
->read_data(nand
, &device_id
);
358 nand
->controller
->read_data(nand
, &data_buf
);
359 manufacturer_id
= data_buf
& 0xff;
360 nand
->controller
->read_data(nand
, &data_buf
);
361 device_id
= data_buf
& 0xff;
364 for (i
= 0; nand_flash_ids
[i
].name
; i
++)
366 if (nand_flash_ids
[i
].id
== device_id
)
368 nand
->device
= &nand_flash_ids
[i
];
373 for (i
= 0; nand_manuf_ids
[i
].name
; i
++)
375 if (nand_manuf_ids
[i
].id
== manufacturer_id
)
377 nand
->manufacturer
= &nand_manuf_ids
[i
];
382 if (!nand
->manufacturer
)
384 nand
->manufacturer
= &nand_manuf_ids
[0];
385 nand
->manufacturer
->id
= manufacturer_id
;
390 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
391 manufacturer_id
, device_id
);
392 return ERROR_NAND_OPERATION_FAILED
;
395 LOG_DEBUG("found %s (%s)", nand
->device
->name
, nand
->manufacturer
->name
);
397 /* initialize device parameters */
400 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
401 nand
->bus_width
= 16;
405 /* Do we need extended device probe information? */
406 if (nand
->device
->page_size
== 0 ||
407 nand
->device
->erase_size
== 0)
409 if (nand
->bus_width
== 8)
411 nand
->controller
->read_data(nand
, id_buff
+ 3);
412 nand
->controller
->read_data(nand
, id_buff
+ 4);
413 nand
->controller
->read_data(nand
, id_buff
+ 5);
419 nand
->controller
->read_data(nand
, &data_buf
);
420 id_buff
[3] = data_buf
;
422 nand
->controller
->read_data(nand
, &data_buf
);
423 id_buff
[4] = data_buf
;
425 nand
->controller
->read_data(nand
, &data_buf
);
426 id_buff
[5] = data_buf
>> 8;
431 if (nand
->device
->page_size
== 0)
433 nand
->page_size
= 1 << (10 + (id_buff
[4] & 3));
435 else if (nand
->device
->page_size
== 256)
437 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
438 return ERROR_NAND_OPERATION_FAILED
;
442 nand
->page_size
= nand
->device
->page_size
;
445 /* number of address cycles */
446 if (nand
->page_size
<= 512)
448 /* small page devices */
449 if (nand
->device
->chip_size
<= 32)
450 nand
->address_cycles
= 3;
451 else if (nand
->device
->chip_size
<= 8*1024)
452 nand
->address_cycles
= 4;
455 LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
456 nand
->address_cycles
= 5;
461 /* large page devices */
462 if (nand
->device
->chip_size
<= 128)
463 nand
->address_cycles
= 4;
464 else if (nand
->device
->chip_size
<= 32*1024)
465 nand
->address_cycles
= 5;
468 LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
469 nand
->address_cycles
= 6;
474 if (nand
->device
->erase_size
== 0)
476 switch ((id_buff
[4] >> 4) & 3) {
478 nand
->erase_size
= 64 << 10;
481 nand
->erase_size
= 128 << 10;
484 nand
->erase_size
= 256 << 10;
487 nand
->erase_size
=512 << 10;
493 nand
->erase_size
= nand
->device
->erase_size
;
496 /* initialize controller, but leave parameters at the controllers default */
497 if ((retval
= nand
->controller
->init(nand
) != ERROR_OK
))
501 case ERROR_NAND_OPERATION_FAILED
:
502 LOG_DEBUG("controller initialization failed");
503 return ERROR_NAND_OPERATION_FAILED
;
504 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
505 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
506 nand
->bus_width
, nand
->address_cycles
, nand
->page_size
);
507 return ERROR_NAND_OPERATION_FAILED
;
509 LOG_ERROR("BUG: unknown controller initialization failure");
510 return ERROR_NAND_OPERATION_FAILED
;
514 nand
->num_blocks
= (nand
->device
->chip_size
* 1024) / (nand
->erase_size
/ 1024);
515 nand
->blocks
= malloc(sizeof(struct nand_block
) * nand
->num_blocks
);
517 for (i
= 0; i
< nand
->num_blocks
; i
++)
519 nand
->blocks
[i
].size
= nand
->erase_size
;
520 nand
->blocks
[i
].offset
= i
* nand
->erase_size
;
521 nand
->blocks
[i
].is_erased
= -1;
522 nand
->blocks
[i
].is_bad
= -1;
528 int nand_erase(struct nand_device
*nand
, int first_block
, int last_block
)
536 return ERROR_NAND_DEVICE_NOT_PROBED
;
538 if ((first_block
< 0) || (last_block
>= nand
->num_blocks
))
539 return ERROR_INVALID_ARGUMENTS
;
541 /* make sure we know if a block is bad before erasing it */
542 for (i
= first_block
; i
<= last_block
; i
++)
544 if (nand
->blocks
[i
].is_bad
== -1)
546 nand_build_bbt(nand
, i
, last_block
);
551 for (i
= first_block
; i
<= last_block
; i
++)
553 /* Send erase setup command */
554 nand
->controller
->command(nand
, NAND_CMD_ERASE1
);
556 page
= i
* (nand
->erase_size
/ nand
->page_size
);
558 /* Send page address */
559 if (nand
->page_size
<= 512)
562 nand
->controller
->address(nand
, page
& 0xff);
563 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
565 /* 3rd cycle only on devices with more than 32 MiB */
566 if (nand
->address_cycles
>= 4)
567 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
569 /* 4th cycle only on devices with more than 8 GiB */
570 if (nand
->address_cycles
>= 5)
571 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
576 nand
->controller
->address(nand
, page
& 0xff);
577 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
579 /* 3rd cycle only on devices with more than 128 MiB */
580 if (nand
->address_cycles
>= 5)
581 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
584 /* Send erase confirm command */
585 nand
->controller
->command(nand
, NAND_CMD_ERASE2
);
587 retval
= nand
->controller
->nand_ready
?
588 nand
->controller
->nand_ready(nand
, 1000) :
589 nand_poll_ready(nand
, 1000);
591 LOG_ERROR("timeout waiting for NAND flash block erase to complete");
592 return ERROR_NAND_OPERATION_TIMEOUT
;
595 if ((retval
= nand_read_status(nand
, &status
)) != ERROR_OK
)
597 LOG_ERROR("couldn't read status");
598 return ERROR_NAND_OPERATION_FAILED
;
603 LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
604 (nand
->blocks
[i
].is_bad
== 1)
607 /* continue; other blocks might still be erasable */
610 nand
->blocks
[i
].is_erased
= 1;
617 static int nand_read_plain(struct nand_device
*nand
, uint32_t address
, uint8_t *data
, uint32_t data_size
)
622 return ERROR_NAND_DEVICE_NOT_PROBED
;
624 if (address
% nand
->page_size
)
626 LOG_ERROR("reads need to be page aligned");
627 return ERROR_NAND_OPERATION_FAILED
;
630 page
= malloc(nand
->page_size
);
632 while (data_size
> 0)
634 uint32_t thisrun_size
= (data_size
> nand
->page_size
) ? nand
->page_size
: data_size
;
635 uint32_t page_address
;
638 page_address
= address
/ nand
->page_size
;
640 nand_read_page(nand
, page_address
, page
, nand
->page_size
, NULL
, 0);
642 memcpy(data
, page
, thisrun_size
);
644 address
+= thisrun_size
;
645 data
+= thisrun_size
;
646 data_size
-= thisrun_size
;
654 static int nand_write_plain(struct nand_device
*nand
, uint32_t address
, uint8_t *data
, uint32_t data_size
)
659 return ERROR_NAND_DEVICE_NOT_PROBED
;
661 if (address
% nand
->page_size
)
663 LOG_ERROR("writes need to be page aligned");
664 return ERROR_NAND_OPERATION_FAILED
;
667 page
= malloc(nand
->page_size
);
669 while (data_size
> 0)
671 uint32_t thisrun_size
= (data_size
> nand
->page_size
) ? nand
->page_size
: data_size
;
672 uint32_t page_address
;
674 memset(page
, 0xff, nand
->page_size
);
675 memcpy(page
, data
, thisrun_size
);
677 page_address
= address
/ nand
->page_size
;
679 nand_write_page(nand
, page_address
, page
, nand
->page_size
, NULL
, 0);
681 address
+= thisrun_size
;
682 data
+= thisrun_size
;
683 data_size
-= thisrun_size
;
692 int nand_write_page(struct nand_device
*nand
, uint32_t page
,
693 uint8_t *data
, uint32_t data_size
,
694 uint8_t *oob
, uint32_t oob_size
)
699 return ERROR_NAND_DEVICE_NOT_PROBED
;
701 block
= page
/ (nand
->erase_size
/ nand
->page_size
);
702 if (nand
->blocks
[block
].is_erased
== 1)
703 nand
->blocks
[block
].is_erased
= 0;
705 if (nand
->use_raw
|| nand
->controller
->write_page
== NULL
)
706 return nand_write_page_raw(nand
, page
, data
, data_size
, oob
, oob_size
);
708 return nand
->controller
->write_page(nand
, page
, data
, data_size
, oob
, oob_size
);
711 int nand_read_page(struct nand_device
*nand
, uint32_t page
,
712 uint8_t *data
, uint32_t data_size
,
713 uint8_t *oob
, uint32_t oob_size
)
716 return ERROR_NAND_DEVICE_NOT_PROBED
;
718 if (nand
->use_raw
|| nand
->controller
->read_page
== NULL
)
719 return nand_read_page_raw(nand
, page
, data
, data_size
, oob
, oob_size
);
721 return nand
->controller
->read_page(nand
, page
, data
, data_size
, oob
, oob_size
);
724 int nand_page_command(struct nand_device
*nand
, uint32_t page
,
725 uint8_t cmd
, bool oob_only
)
728 return ERROR_NAND_DEVICE_NOT_PROBED
;
730 if (oob_only
&& NAND_CMD_READ0
== cmd
&& nand
->page_size
<= 512)
731 cmd
= NAND_CMD_READOOB
;
733 nand
->controller
->command(nand
, cmd
);
735 if (nand
->page_size
<= 512) {
736 /* small page device */
738 /* column (always 0, we start at the beginning of a page/OOB area) */
739 nand
->controller
->address(nand
, 0x0);
742 nand
->controller
->address(nand
, page
& 0xff);
743 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
745 /* 4th cycle only on devices with more than 32 MiB */
746 if (nand
->address_cycles
>= 4)
747 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
749 /* 5th cycle only on devices with more than 8 GiB */
750 if (nand
->address_cycles
>= 5)
751 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
753 /* large page device */
755 /* column (0 when we start at the beginning of a page,
756 * or 2048 for the beginning of OOB area)
758 nand
->controller
->address(nand
, 0x0);
760 nand
->controller
->address(nand
, 0x8);
762 nand
->controller
->address(nand
, 0x0);
765 nand
->controller
->address(nand
, page
& 0xff);
766 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
768 /* 5th cycle only on devices with more than 128 MiB */
769 if (nand
->address_cycles
>= 5)
770 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
772 /* large page devices need a start command if reading */
773 if (NAND_CMD_READ0
== cmd
)
774 nand
->controller
->command(nand
, NAND_CMD_READSTART
);
777 if (nand
->controller
->nand_ready
) {
778 if (!nand
->controller
->nand_ready(nand
, 100))
779 return ERROR_NAND_OPERATION_TIMEOUT
;
781 /* nand_poll_read() cannot be used during nand read */
788 int nand_read_data_page(struct nand_device
*nand
, uint8_t *data
, uint32_t size
)
790 int retval
= ERROR_NAND_NO_BUFFER
;
792 if (nand
->controller
->read_block_data
!= NULL
)
793 retval
= (nand
->controller
->read_block_data
)(nand
, data
, size
);
795 if (ERROR_NAND_NO_BUFFER
== retval
) {
797 int incr
= (nand
->device
->options
& NAND_BUSWIDTH_16
) ? 2 : 1;
800 for (i
= 0; retval
== ERROR_OK
&& i
< size
; i
+= incr
) {
801 retval
= nand
->controller
->read_data(nand
, data
);
809 int nand_read_page_raw(struct nand_device
*nand
, uint32_t page
,
810 uint8_t *data
, uint32_t data_size
,
811 uint8_t *oob
, uint32_t oob_size
)
815 retval
= nand_page_command(nand
, page
, NAND_CMD_READ0
, !data
);
816 if (ERROR_OK
!= retval
)
820 nand_read_data_page(nand
, data
, data_size
);
823 nand_read_data_page(nand
, oob
, oob_size
);
828 int nand_write_data_page(struct nand_device
*nand
, uint8_t *data
, uint32_t size
)
830 int retval
= ERROR_NAND_NO_BUFFER
;
832 if (nand
->controller
->write_block_data
!= NULL
)
833 retval
= (nand
->controller
->write_block_data
)(nand
, data
, size
);
835 if (ERROR_NAND_NO_BUFFER
== retval
) {
836 bool is16bit
= nand
->device
->options
& NAND_BUSWIDTH_16
;
837 uint32_t incr
= is16bit
? 2 : 1;
841 for (i
= 0; i
< size
; i
+= incr
) {
843 write_data
= le_to_h_u16(data
);
847 retval
= nand
->controller
->write_data(nand
, write_data
);
848 if (ERROR_OK
!= retval
)
858 int nand_write_finish(struct nand_device
*nand
)
863 nand
->controller
->command(nand
, NAND_CMD_PAGEPROG
);
865 retval
= nand
->controller
->nand_ready
?
866 nand
->controller
->nand_ready(nand
, 100) :
867 nand_poll_ready(nand
, 100);
869 return ERROR_NAND_OPERATION_TIMEOUT
;
871 retval
= nand_read_status(nand
, &status
);
872 if (ERROR_OK
!= retval
) {
873 LOG_ERROR("couldn't read status");
874 return ERROR_NAND_OPERATION_FAILED
;
877 if (status
& NAND_STATUS_FAIL
) {
878 LOG_ERROR("write operation didn't pass, status: 0x%2.2x",
880 return ERROR_NAND_OPERATION_FAILED
;
886 int nand_write_page_raw(struct nand_device
*nand
, uint32_t page
,
887 uint8_t *data
, uint32_t data_size
,
888 uint8_t *oob
, uint32_t oob_size
)
892 retval
= nand_page_command(nand
, page
, NAND_CMD_SEQIN
, !data
);
893 if (ERROR_OK
!= retval
)
897 retval
= nand_write_data_page(nand
, data
, data_size
);
898 if (ERROR_OK
!= retval
) {
899 LOG_ERROR("Unable to write data to NAND device");
905 retval
= nand_write_data_page(nand
, oob
, oob_size
);
906 if (ERROR_OK
!= retval
) {
907 LOG_ERROR("Unable to write OOB data to NAND device");
912 return nand_write_finish(nand
);
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