1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Partially based on drivers/mtd/nand_ids.c from Linux. *
6 * Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
27 #include "replacements.h"
38 #include "time_support.h"
42 int nand_register_commands(struct command_context_s
*cmd_ctx
);
43 int handle_nand_list_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
44 int handle_nand_probe_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
45 int handle_nand_check_bad_blocks_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
46 int handle_nand_info_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
47 int handle_nand_copy_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
48 int handle_nand_write_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
49 int handle_nand_dump_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
50 int handle_nand_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
52 int handle_nand_raw_access_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
54 int nand_read_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
55 int nand_read_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
56 int nand_read_plain(struct nand_device_s
*device
, u32 address
, u8
*data
, u32 data_size
);
58 int nand_write_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
59 int nand_write_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
61 /* NAND flash controller
63 extern nand_flash_controller_t lpc3180_nand_controller
;
64 extern nand_flash_controller_t orion_nand_controller
;
65 extern nand_flash_controller_t s3c2410_nand_controller
;
66 extern nand_flash_controller_t s3c2412_nand_controller
;
67 extern nand_flash_controller_t s3c2440_nand_controller
;
68 extern nand_flash_controller_t s3c2443_nand_controller
;
70 /* extern nand_flash_controller_t boundary_scan_nand_controller; */
72 nand_flash_controller_t
*nand_flash_controllers
[] =
74 &lpc3180_nand_controller
,
75 &orion_nand_controller
,
76 &s3c2410_nand_controller
,
77 &s3c2412_nand_controller
,
78 &s3c2440_nand_controller
,
79 &s3c2443_nand_controller
,
80 /* &boundary_scan_nand_controller, */
84 /* configured NAND devices and NAND Flash command handler */
85 nand_device_t
*nand_devices
= NULL
;
86 static command_t
*nand_cmd
;
90 * Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
93 * Pagesize; 0, 256, 512
94 * 0 get this information from the extended chip ID
95 * 256 256 Byte page size
96 * 512 512 Byte page size
98 nand_info_t nand_flash_ids
[] =
100 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
101 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
102 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
103 {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
104 {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
105 {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
106 {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
107 {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
108 {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
109 {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
111 {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
112 {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
113 {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
114 {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
116 {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
117 {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
118 {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
119 {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
121 {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
122 {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
123 {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
124 {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
126 {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
127 {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
128 {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
129 {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
131 {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
132 {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
133 {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
134 {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
135 {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
136 {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
137 {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
139 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
141 {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS
},
142 {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS
},
143 {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16
},
144 {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16
},
146 {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS
},
147 {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS
},
148 {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16
},
149 {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16
},
151 {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS
},
152 {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS
},
153 {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16
},
154 {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16
},
156 {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS
},
157 {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS
},
158 {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16
},
159 {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16
},
161 {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS
},
162 {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS
},
163 {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16
},
164 {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16
},
166 {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS
},
167 {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS
},
168 {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16
},
169 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16
},
174 /* Manufacturer ID list
176 nand_manufacturer_t nand_manuf_ids
[] =
179 {NAND_MFR_TOSHIBA
, "Toshiba"},
180 {NAND_MFR_SAMSUNG
, "Samsung"},
181 {NAND_MFR_FUJITSU
, "Fujitsu"},
182 {NAND_MFR_NATIONAL
, "National"},
183 {NAND_MFR_RENESAS
, "Renesas"},
184 {NAND_MFR_STMICRO
, "ST Micro"},
185 {NAND_MFR_HYNIX
, "Hynix"},
189 /* nand device <nand_controller> [controller options]
191 int handle_nand_device_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
198 LOG_WARNING("incomplete flash device nand configuration");
199 return ERROR_FLASH_BANK_INVALID
;
202 for (i
= 0; nand_flash_controllers
[i
]; i
++)
204 nand_device_t
*p
, *c
;
206 if (strcmp(args
[0], nand_flash_controllers
[i
]->name
) == 0)
208 /* register flash specific commands */
209 if ((retval
= nand_flash_controllers
[i
]->register_commands(cmd_ctx
)) != ERROR_OK
)
211 LOG_ERROR("couldn't register '%s' commands", args
[0]);
215 c
= malloc(sizeof(nand_device_t
));
217 c
->controller
= nand_flash_controllers
[i
];
218 c
->controller_priv
= NULL
;
219 c
->manufacturer
= NULL
;
222 c
->address_cycles
= 0;
227 if ((retval
= nand_flash_controllers
[i
]->nand_device_command(cmd_ctx
, cmd
, args
, argc
, c
)) != ERROR_OK
)
229 LOG_ERROR("'%s' driver rejected nand flash", c
->controller
->name
);
234 /* put NAND device in linked list */
237 /* find last flash device */
238 for (p
= nand_devices
; p
&& p
->next
; p
= p
->next
);
251 /* no valid NAND controller was found (i.e. the configuration option,
252 * didn't match one of the compiled-in controllers)
254 LOG_ERROR("No valid NAND flash controller found (%s)", args
[0]);
255 LOG_ERROR("compiled-in NAND flash controllers:");
256 for (i
= 0; nand_flash_controllers
[i
]; i
++)
258 LOG_ERROR("%i: %s", i
, nand_flash_controllers
[i
]->name
);
264 int nand_register_commands(struct command_context_s
*cmd_ctx
)
266 nand_cmd
= register_command(cmd_ctx
, NULL
, "nand", NULL
, COMMAND_ANY
, "NAND specific commands");
268 register_command(cmd_ctx
, nand_cmd
, "device", handle_nand_device_command
, COMMAND_CONFIG
, NULL
);
273 int nand_init(struct command_context_s
*cmd_ctx
)
277 register_command(cmd_ctx
, nand_cmd
, "list", handle_nand_list_command
, COMMAND_EXEC
,
278 "list configured NAND flash devices");
279 register_command(cmd_ctx
, nand_cmd
, "info", handle_nand_info_command
, COMMAND_EXEC
,
280 "print info about NAND flash device <num>");
281 register_command(cmd_ctx
, nand_cmd
, "probe", handle_nand_probe_command
, COMMAND_EXEC
,
282 "identify NAND flash device <num>");
283 register_command(cmd_ctx
, nand_cmd
, "check_bad_blocks", handle_nand_check_bad_blocks_command
, COMMAND_EXEC
,
284 "check NAND flash device <num> for bad blocks [<first> <last>]");
285 register_command(cmd_ctx
, nand_cmd
, "erase", handle_nand_erase_command
, COMMAND_EXEC
,
286 "erase blocks on NAND flash device <num> <first> <last>");
287 register_command(cmd_ctx
, nand_cmd
, "copy", handle_nand_copy_command
, COMMAND_EXEC
,
288 "copy from NAND flash device <num> <offset> <length> <ram-address>");
289 register_command(cmd_ctx
, nand_cmd
, "dump", handle_nand_dump_command
, COMMAND_EXEC
,
290 "dump from NAND flash device <num> <filename> <offset> <size> [options]");
291 register_command(cmd_ctx
, nand_cmd
, "write", handle_nand_write_command
, COMMAND_EXEC
,
292 "write to NAND flash device <num> <filename> <offset> [oob_raw|oob_only]");
293 register_command(cmd_ctx
, nand_cmd
, "raw_access", handle_nand_raw_access_command
, COMMAND_EXEC
,
294 "raw access to NAND flash device <num> ['enable'|'disable']");
300 nand_device_t
*get_nand_device_by_num(int num
)
305 for (p
= nand_devices
; p
; p
= p
->next
)
316 int nand_build_bbt(struct nand_device_s
*device
, int first
, int last
)
322 if ((first
< 0) || (first
>= device
->num_blocks
))
325 if ((last
>= device
->num_blocks
) || (last
== -1))
326 last
= device
->num_blocks
- 1;
328 for (i
= first
; i
< last
; i
++)
330 nand_read_page(device
, page
, NULL
, 0, oob
, 6);
332 if (((device
->device
->options
& NAND_BUSWIDTH_16
) && ((oob
[0] & oob
[1]) != 0xff))
333 || (((device
->page_size
== 512) && (oob
[5] != 0xff)) ||
334 ((device
->page_size
== 2048) && (oob
[0] != 0xff))))
336 LOG_WARNING("invalid block: %i", i
);
337 device
->blocks
[i
].is_bad
= 1;
341 device
->blocks
[i
].is_bad
= 0;
344 page
+= (device
->erase_size
/ device
->page_size
);
350 int nand_read_status(struct nand_device_s
*device
, u8
*status
)
353 return ERROR_NAND_DEVICE_NOT_PROBED
;
355 /* Send read status command */
356 device
->controller
->command(device
, NAND_CMD_STATUS
);
361 if (device
->device
->options
& NAND_BUSWIDTH_16
)
364 device
->controller
->read_data(device
, &data
);
365 *status
= data
& 0xff;
369 device
->controller
->read_data(device
, status
);
375 int nand_poll_ready(struct nand_device_s
*device
, int timeout
)
379 device
->controller
->command(device
, NAND_CMD_STATUS
);
381 if (device
->device
->options
& NAND_BUSWIDTH_16
) {
383 device
->controller
->read_data(device
, &data
);
384 status
= data
& 0xff;
386 device
->controller
->read_data(device
, &status
);
388 if (status
& NAND_STATUS_READY
)
393 return (status
& NAND_STATUS_READY
) != 0;
396 int nand_probe(struct nand_device_s
*device
)
398 u8 manufacturer_id
, device_id
;
403 /* clear device data */
404 device
->device
= NULL
;
405 device
->manufacturer
= NULL
;
407 /* clear device parameters */
408 device
->bus_width
= 0;
409 device
->address_cycles
= 0;
410 device
->page_size
= 0;
411 device
->erase_size
= 0;
413 /* initialize controller (device parameters are zero, use controller default) */
414 if ((retval
= device
->controller
->init(device
) != ERROR_OK
))
418 case ERROR_NAND_OPERATION_FAILED
:
419 LOG_DEBUG("controller initialization failed");
420 return ERROR_NAND_OPERATION_FAILED
;
421 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
422 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
423 return ERROR_NAND_OPERATION_FAILED
;
425 LOG_ERROR("BUG: unknown controller initialization failure");
426 return ERROR_NAND_OPERATION_FAILED
;
430 device
->controller
->command(device
, NAND_CMD_RESET
);
431 device
->controller
->reset(device
);
433 device
->controller
->command(device
, NAND_CMD_READID
);
434 device
->controller
->address(device
, 0x0);
436 if (device
->bus_width
== 8)
438 device
->controller
->read_data(device
, &manufacturer_id
);
439 device
->controller
->read_data(device
, &device_id
);
444 device
->controller
->read_data(device
, &data_buf
);
445 manufacturer_id
= data_buf
& 0xff;
446 device
->controller
->read_data(device
, &data_buf
);
447 device_id
= data_buf
& 0xff;
450 for (i
= 0; nand_flash_ids
[i
].name
; i
++)
452 if (nand_flash_ids
[i
].id
== device_id
)
454 device
->device
= &nand_flash_ids
[i
];
459 for (i
= 0; nand_manuf_ids
[i
].name
; i
++)
461 if (nand_manuf_ids
[i
].id
== manufacturer_id
)
463 device
->manufacturer
= &nand_manuf_ids
[i
];
468 if (!device
->manufacturer
)
470 device
->manufacturer
= &nand_manuf_ids
[0];
471 device
->manufacturer
->id
= manufacturer_id
;
476 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
477 manufacturer_id
, device_id
);
478 return ERROR_NAND_OPERATION_FAILED
;
481 LOG_DEBUG("found %s (%s)", device
->device
->name
, device
->manufacturer
->name
);
483 /* initialize device parameters */
486 if (device
->device
->options
& NAND_BUSWIDTH_16
)
487 device
->bus_width
= 16;
489 device
->bus_width
= 8;
491 /* Do we need extended device probe information? */
492 if (device
->device
->page_size
== 0 ||
493 device
->device
->erase_size
== 0)
495 if (device
->bus_width
== 8)
497 device
->controller
->read_data(device
, id_buff
+3);
498 device
->controller
->read_data(device
, id_buff
+4);
499 device
->controller
->read_data(device
, id_buff
+5);
505 device
->controller
->read_data(device
, &data_buf
);
506 id_buff
[3] = data_buf
;
508 device
->controller
->read_data(device
, &data_buf
);
509 id_buff
[4] = data_buf
;
511 device
->controller
->read_data(device
, &data_buf
);
512 id_buff
[5] = data_buf
>> 8;
517 if (device
->device
->page_size
== 0)
519 device
->page_size
= 1 << (10 + (id_buff
[4] & 3));
521 else if (device
->device
->page_size
== 256)
523 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
524 return ERROR_NAND_OPERATION_FAILED
;
528 device
->page_size
= device
->device
->page_size
;
531 /* number of address cycles */
532 if (device
->page_size
<= 512)
534 /* small page devices */
535 if (device
->device
->chip_size
<= 32)
536 device
->address_cycles
= 3;
537 else if (device
->device
->chip_size
<= 8*1024)
538 device
->address_cycles
= 4;
541 LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
542 device
->address_cycles
= 5;
547 /* large page devices */
548 if (device
->device
->chip_size
<= 128)
549 device
->address_cycles
= 4;
550 else if (device
->device
->chip_size
<= 32*1024)
551 device
->address_cycles
= 5;
554 LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
555 device
->address_cycles
= 6;
560 if (device
->device
->erase_size
== 0)
562 switch ((id_buff
[4] >> 4) & 3) {
564 device
->erase_size
= 64 << 10;
567 device
->erase_size
= 128 << 10;
570 device
->erase_size
= 256 << 10;
573 device
->erase_size
=512 << 10;
579 device
->erase_size
= device
->device
->erase_size
;
582 /* initialize controller, but leave parameters at the controllers default */
583 if ((retval
= device
->controller
->init(device
) != ERROR_OK
))
587 case ERROR_NAND_OPERATION_FAILED
:
588 LOG_DEBUG("controller initialization failed");
589 return ERROR_NAND_OPERATION_FAILED
;
590 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
591 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
592 device
->bus_width
, device
->address_cycles
, device
->page_size
);
593 return ERROR_NAND_OPERATION_FAILED
;
595 LOG_ERROR("BUG: unknown controller initialization failure");
596 return ERROR_NAND_OPERATION_FAILED
;
600 device
->num_blocks
= (device
->device
->chip_size
* 1024) / (device
->erase_size
/ 1024);
601 device
->blocks
= malloc(sizeof(nand_block_t
) * device
->num_blocks
);
603 for (i
= 0; i
< device
->num_blocks
; i
++)
605 device
->blocks
[i
].size
= device
->erase_size
;
606 device
->blocks
[i
].offset
= i
* device
->erase_size
;
607 device
->blocks
[i
].is_erased
= -1;
608 device
->blocks
[i
].is_bad
= -1;
614 int nand_erase(struct nand_device_s
*device
, int first_block
, int last_block
)
622 return ERROR_NAND_DEVICE_NOT_PROBED
;
624 if ((first_block
< 0) || (last_block
> device
->num_blocks
))
625 return ERROR_INVALID_ARGUMENTS
;
627 /* make sure we know if a block is bad before erasing it */
628 for (i
= first_block
; i
<= last_block
; i
++)
630 if (device
->blocks
[i
].is_bad
== -1)
632 nand_build_bbt(device
, i
, last_block
);
637 for (i
= first_block
; i
<= last_block
; i
++)
639 /* Send erase setup command */
640 device
->controller
->command(device
, NAND_CMD_ERASE1
);
642 page
= i
* (device
->erase_size
/ device
->page_size
);
644 /* Send page address */
645 if (device
->page_size
<= 512)
648 device
->controller
->address(device
, page
& 0xff);
649 device
->controller
->address(device
, (page
>> 8) & 0xff);
651 /* 3rd cycle only on devices with more than 32 MiB */
652 if (device
->address_cycles
>= 4)
653 device
->controller
->address(device
, (page
>> 16) & 0xff);
655 /* 4th cycle only on devices with more than 8 GiB */
656 if (device
->address_cycles
>= 5)
657 device
->controller
->address(device
, (page
>> 24) & 0xff);
662 device
->controller
->address(device
, page
& 0xff);
663 device
->controller
->address(device
, (page
>> 8) & 0xff);
665 /* 3rd cycle only on devices with more than 128 MiB */
666 if (device
->address_cycles
>= 5)
667 device
->controller
->address(device
, (page
>> 16) & 0xff);
670 /* Send erase confirm command */
671 device
->controller
->command(device
, NAND_CMD_ERASE2
);
673 retval
= device
->controller
->nand_ready
?
674 device
->controller
->nand_ready(device
, 1000) :
675 nand_poll_ready(device
, 1000);
677 LOG_ERROR("timeout waiting for NAND flash block erase to complete");
678 return ERROR_NAND_OPERATION_TIMEOUT
;
681 if ((retval
= nand_read_status(device
, &status
)) != ERROR_OK
)
683 LOG_ERROR("couldn't read status");
684 return ERROR_NAND_OPERATION_FAILED
;
689 LOG_ERROR("erase operation didn't pass, status: 0x%2.2x", status
);
690 return ERROR_NAND_OPERATION_FAILED
;
693 device
->blocks
[i
].is_erased
= 1;
699 int nand_read_plain(struct nand_device_s
*device
, u32 address
, u8
*data
, u32 data_size
)
704 return ERROR_NAND_DEVICE_NOT_PROBED
;
706 if (address
% device
->page_size
)
708 LOG_ERROR("reads need to be page aligned");
709 return ERROR_NAND_OPERATION_FAILED
;
712 page
= malloc(device
->page_size
);
714 while (data_size
> 0 )
716 u32 thisrun_size
= (data_size
> device
->page_size
) ? device
->page_size
: data_size
;
720 page_address
= address
/ device
->page_size
;
722 nand_read_page(device
, page_address
, page
, device
->page_size
, NULL
, 0);
724 memcpy(data
, page
, thisrun_size
);
726 address
+= thisrun_size
;
727 data
+= thisrun_size
;
728 data_size
-= thisrun_size
;
736 int nand_write_plain(struct nand_device_s
*device
, u32 address
, u8
*data
, u32 data_size
)
741 return ERROR_NAND_DEVICE_NOT_PROBED
;
743 if (address
% device
->page_size
)
745 LOG_ERROR("writes need to be page aligned");
746 return ERROR_NAND_OPERATION_FAILED
;
749 page
= malloc(device
->page_size
);
751 while (data_size
> 0 )
753 u32 thisrun_size
= (data_size
> device
->page_size
) ? device
->page_size
: data_size
;
756 memset(page
, 0xff, device
->page_size
);
757 memcpy(page
, data
, thisrun_size
);
759 page_address
= address
/ device
->page_size
;
761 nand_write_page(device
, page_address
, page
, device
->page_size
, NULL
, 0);
763 address
+= thisrun_size
;
764 data
+= thisrun_size
;
765 data_size
-= thisrun_size
;
773 int nand_write_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
778 return ERROR_NAND_DEVICE_NOT_PROBED
;
780 block
= page
/ (device
->erase_size
/ device
->page_size
);
781 if (device
->blocks
[block
].is_erased
== 1)
782 device
->blocks
[block
].is_erased
= 0;
784 if (device
->use_raw
|| device
->controller
->write_page
== NULL
)
785 return nand_write_page_raw(device
, page
, data
, data_size
, oob
, oob_size
);
787 return device
->controller
->write_page(device
, page
, data
, data_size
, oob
, oob_size
);
790 int nand_read_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
793 return ERROR_NAND_DEVICE_NOT_PROBED
;
795 if (device
->use_raw
|| device
->controller
->read_page
== NULL
)
796 return nand_read_page_raw(device
, page
, data
, data_size
, oob
, oob_size
);
798 return device
->controller
->read_page(device
, page
, data
, data_size
, oob
, oob_size
);
801 int nand_read_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
806 return ERROR_NAND_DEVICE_NOT_PROBED
;
808 if (device
->page_size
<= 512)
810 /* small page device */
812 device
->controller
->command(device
, NAND_CMD_READ0
);
814 device
->controller
->command(device
, NAND_CMD_READOOB
);
816 /* column (always 0, we start at the beginning of a page/OOB area) */
817 device
->controller
->address(device
, 0x0);
820 device
->controller
->address(device
, page
& 0xff);
821 device
->controller
->address(device
, (page
>> 8) & 0xff);
823 /* 4th cycle only on devices with more than 32 MiB */
824 if (device
->address_cycles
>= 4)
825 device
->controller
->address(device
, (page
>> 16) & 0xff);
827 /* 5th cycle only on devices with more than 8 GiB */
828 if (device
->address_cycles
>= 5)
829 device
->controller
->address(device
, (page
>> 24) & 0xff);
833 /* large page device */
834 device
->controller
->command(device
, NAND_CMD_READ0
);
836 /* column (0 when we start at the beginning of a page,
837 * or 2048 for the beginning of OOB area)
839 device
->controller
->address(device
, 0x0);
841 device
->controller
->address(device
, 0x0);
843 device
->controller
->address(device
, 0x8);
846 device
->controller
->address(device
, page
& 0xff);
847 device
->controller
->address(device
, (page
>> 8) & 0xff);
849 /* 5th cycle only on devices with more than 128 MiB */
850 if (device
->address_cycles
>= 5)
851 device
->controller
->address(device
, (page
>> 16) & 0xff);
853 /* large page devices need a start command */
854 device
->controller
->command(device
, NAND_CMD_READSTART
);
857 if (device
->controller
->nand_ready
) {
858 if (!device
->controller
->nand_ready(device
, 100))
859 return ERROR_NAND_OPERATION_TIMEOUT
;
866 if (device
->controller
->read_block_data
!= NULL
)
867 (device
->controller
->read_block_data
)(device
, data
, data_size
);
870 for (i
= 0; i
< data_size
;)
872 if (device
->device
->options
& NAND_BUSWIDTH_16
)
874 device
->controller
->read_data(device
, data
);
880 device
->controller
->read_data(device
, data
);
890 if (device
->controller
->read_block_data
!= NULL
)
891 (device
->controller
->read_block_data
)(device
, oob
, oob_size
);
894 for (i
= 0; i
< oob_size
;)
896 if (device
->device
->options
& NAND_BUSWIDTH_16
)
898 device
->controller
->read_data(device
, oob
);
904 device
->controller
->read_data(device
, oob
);
915 int nand_write_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
922 return ERROR_NAND_DEVICE_NOT_PROBED
;
924 device
->controller
->command(device
, NAND_CMD_SEQIN
);
926 if (device
->page_size
<= 512)
928 /* column (always 0, we start at the beginning of a page/OOB area) */
929 device
->controller
->address(device
, 0x0);
932 device
->controller
->address(device
, page
& 0xff);
933 device
->controller
->address(device
, (page
>> 8) & 0xff);
935 /* 4th cycle only on devices with more than 32 MiB */
936 if (device
->address_cycles
>= 4)
937 device
->controller
->address(device
, (page
>> 16) & 0xff);
939 /* 5th cycle only on devices with more than 8 GiB */
940 if (device
->address_cycles
>= 5)
941 device
->controller
->address(device
, (page
>> 24) & 0xff);
945 /* column (0 when we start at the beginning of a page,
946 * or 2048 for the beginning of OOB area)
948 device
->controller
->address(device
, 0x0);
950 device
->controller
->address(device
, 0x0);
952 device
->controller
->address(device
, 0x8);
955 device
->controller
->address(device
, page
& 0xff);
956 device
->controller
->address(device
, (page
>> 8) & 0xff);
958 /* 5th cycle only on devices with more than 128 MiB */
959 if (device
->address_cycles
>= 5)
960 device
->controller
->address(device
, (page
>> 16) & 0xff);
965 if (device
->controller
->write_block_data
!= NULL
)
966 (device
->controller
->write_block_data
)(device
, data
, data_size
);
969 for (i
= 0; i
< data_size
;)
971 if (device
->device
->options
& NAND_BUSWIDTH_16
)
973 u16 data_buf
= le_to_h_u16(data
);
974 device
->controller
->write_data(device
, data_buf
);
980 device
->controller
->write_data(device
, *data
);
990 if (device
->controller
->write_block_data
!= NULL
)
991 (device
->controller
->write_block_data
)(device
, oob
, oob_size
);
994 for (i
= 0; i
< oob_size
;)
996 if (device
->device
->options
& NAND_BUSWIDTH_16
)
998 u16 oob_buf
= le_to_h_u16(data
);
999 device
->controller
->write_data(device
, oob_buf
);
1005 device
->controller
->write_data(device
, *oob
);
1013 device
->controller
->command(device
, NAND_CMD_PAGEPROG
);
1015 retval
= device
->controller
->nand_ready
?
1016 device
->controller
->nand_ready(device
, 100) :
1017 nand_poll_ready(device
, 100);
1019 return ERROR_NAND_OPERATION_TIMEOUT
;
1021 if ((retval
= nand_read_status(device
, &status
)) != ERROR_OK
)
1023 LOG_ERROR("couldn't read status");
1024 return ERROR_NAND_OPERATION_FAILED
;
1027 if (status
& NAND_STATUS_FAIL
)
1029 LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status
);
1030 return ERROR_NAND_OPERATION_FAILED
;
1036 int handle_nand_list_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1043 command_print(cmd_ctx
, "no NAND flash devices configured");
1047 for (p
= nand_devices
; p
; p
= p
->next
)
1050 command_print(cmd_ctx
, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1051 i
++, p
->device
->name
, p
->manufacturer
->name
, p
->page_size
, p
->bus_width
, p
->erase_size
);
1053 command_print(cmd_ctx
, "#%i: not probed");
1059 int handle_nand_info_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1067 if ((argc
< 1) || (argc
> 3))
1069 return ERROR_COMMAND_SYNTAX_ERROR
;
1075 first
= last
= strtoul(args
[1], NULL
, 0);
1079 first
= strtoul(args
[1], NULL
, 0);
1080 last
= strtoul(args
[2], NULL
, 0);
1083 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1088 if (first
>= p
->num_blocks
)
1089 first
= p
->num_blocks
- 1;
1091 if (last
>= p
->num_blocks
)
1092 last
= p
->num_blocks
- 1;
1094 command_print(cmd_ctx
, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1095 i
++, p
->device
->name
, p
->manufacturer
->name
, p
->page_size
, p
->bus_width
, p
->erase_size
);
1097 for (j
= first
; j
<= last
; j
++)
1099 char *erase_state
, *bad_state
;
1101 if (p
->blocks
[j
].is_erased
== 0)
1102 erase_state
= "not erased";
1103 else if (p
->blocks
[j
].is_erased
== 1)
1104 erase_state
= "erased";
1106 erase_state
= "erase state unknown";
1108 if (p
->blocks
[j
].is_bad
== 0)
1110 else if (p
->blocks
[j
].is_bad
== 1)
1111 bad_state
= " (marked bad)";
1113 bad_state
= " (block condition unknown)";
1115 command_print(cmd_ctx
, "\t#%i: 0x%8.8x (0x%xkB) %s%s",
1116 j
, p
->blocks
[j
].offset
, p
->blocks
[j
].size
/ 1024,
1117 erase_state
, bad_state
);
1122 command_print(cmd_ctx
, "#%i: not probed");
1129 int handle_nand_probe_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1136 return ERROR_COMMAND_SYNTAX_ERROR
;
1139 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1142 if ((retval
= nand_probe(p
)) == ERROR_OK
)
1144 command_print(cmd_ctx
, "NAND flash device '%s' found", p
->device
->name
);
1146 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1148 command_print(cmd_ctx
, "probing failed for NAND flash device");
1152 command_print(cmd_ctx
, "unknown error when probing NAND flash device");
1157 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1163 int handle_nand_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1170 return ERROR_COMMAND_SYNTAX_ERROR
;
1174 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1177 int first
= strtoul(args
[1], NULL
, 0);
1178 int last
= strtoul(args
[2], NULL
, 0);
1180 if ((retval
= nand_erase(p
, first
, last
)) == ERROR_OK
)
1182 command_print(cmd_ctx
, "successfully erased blocks %i to %i on NAND flash device '%s'", first
, last
, p
->device
->name
);
1184 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1186 command_print(cmd_ctx
, "erase failed");
1190 command_print(cmd_ctx
, "unknown error when erasing NAND flash device");
1195 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1201 int handle_nand_check_bad_blocks_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1208 if ((argc
< 1) || (argc
> 3) || (argc
== 2))
1210 return ERROR_COMMAND_SYNTAX_ERROR
;
1216 first
= strtoul(args
[1], NULL
, 0);
1217 last
= strtoul(args
[2], NULL
, 0);
1220 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1223 if ((retval
= nand_build_bbt(p
, first
, last
)) == ERROR_OK
)
1225 command_print(cmd_ctx
, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks", p
->device
->name
);
1227 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1229 command_print(cmd_ctx
, "error when checking for bad blocks on NAND flash device");
1233 command_print(cmd_ctx
, "unknown error when checking for bad blocks on NAND flash device");
1238 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1244 int handle_nand_copy_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1250 return ERROR_COMMAND_SYNTAX_ERROR
;
1254 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1261 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1267 int handle_nand_write_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1272 enum oob_formats oob_format
= NAND_OOB_NONE
;
1276 duration_t duration
;
1277 char *duration_text
;
1283 return ERROR_COMMAND_SYNTAX_ERROR
;
1287 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1295 offset
= strtoul(args
[2], NULL
, 0);
1300 for (i
= 3; i
< argc
; i
++)
1302 if (!strcmp(args
[i
], "oob_raw"))
1303 oob_format
|= NAND_OOB_RAW
;
1304 else if (!strcmp(args
[i
], "oob_only"))
1305 oob_format
|= NAND_OOB_RAW
| NAND_OOB_ONLY
;
1308 command_print(cmd_ctx
, "unknown option: %s", args
[i
]);
1309 return ERROR_COMMAND_SYNTAX_ERROR
;
1314 duration_start_measure(&duration
);
1316 if (fileio_open(&fileio
, args
[1], FILEIO_READ
, FILEIO_BINARY
) != ERROR_OK
)
1321 buf_cnt
= binary_size
= fileio
.size
;
1323 if (!(oob_format
& NAND_OOB_ONLY
))
1325 page_size
= p
->page_size
;
1326 page
= malloc(p
->page_size
);
1329 if (oob_format
& NAND_OOB_RAW
)
1331 if (p
->page_size
== 512)
1333 else if (p
->page_size
== 2048)
1335 oob
= malloc(oob_size
);
1338 if (offset
% p
->page_size
)
1340 command_print(cmd_ctx
, "only page size aligned offsets and sizes are supported");
1341 fileio_close(&fileio
);
1353 fileio_read(&fileio
, page_size
, page
, &size_read
);
1354 buf_cnt
-= size_read
;
1355 if (size_read
< page_size
)
1357 memset(page
+ size_read
, 0xff, page_size
- size_read
);
1363 fileio_read(&fileio
, oob_size
, oob
, &size_read
);
1364 buf_cnt
-= size_read
;
1365 if (size_read
< oob_size
)
1367 memset(oob
+ size_read
, 0xff, oob_size
- size_read
);
1371 if (nand_write_page(p
, offset
/ p
->page_size
, page
, page_size
, oob
, oob_size
) != ERROR_OK
)
1373 command_print(cmd_ctx
, "failed writing file %s to NAND flash %s at offset 0x%8.8x",
1374 args
[1], args
[0], offset
);
1376 fileio_close(&fileio
);
1382 offset
+= page_size
;
1385 fileio_close(&fileio
);
1390 duration_stop_measure(&duration
, &duration_text
);
1391 command_print(cmd_ctx
, "wrote file %s to NAND flash %s up to offset 0x%8.8x in %s",
1392 args
[1], args
[0], offset
, duration_text
);
1393 free(duration_text
);
1394 duration_text
= NULL
;
1398 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1404 int handle_nand_dump_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1410 return ERROR_COMMAND_SYNTAX_ERROR
;
1413 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1419 duration_t duration
;
1420 char *duration_text
;
1427 u32 address
= strtoul(args
[2], NULL
, 0);
1428 u32 size
= strtoul(args
[3], NULL
, 0);
1430 enum oob_formats oob_format
= NAND_OOB_NONE
;
1435 for (i
= 4; i
< argc
; i
++)
1437 if (!strcmp(args
[i
], "oob_raw"))
1438 oob_format
|= NAND_OOB_RAW
;
1439 else if (!strcmp(args
[i
], "oob_only"))
1440 oob_format
|= NAND_OOB_RAW
| NAND_OOB_ONLY
;
1442 command_print(cmd_ctx
, "unknown option: '%s'", args
[i
]);
1446 if ((address
% p
->page_size
) || (size
% p
->page_size
))
1448 command_print(cmd_ctx
, "only page size aligned addresses and sizes are supported");
1452 if (!(oob_format
& NAND_OOB_ONLY
))
1454 page_size
= p
->page_size
;
1455 page
= malloc(p
->page_size
);
1458 if (oob_format
& NAND_OOB_RAW
)
1460 if (p
->page_size
== 512)
1462 else if (p
->page_size
== 2048)
1464 oob
= malloc(oob_size
);
1467 if (fileio_open(&fileio
, args
[1], FILEIO_WRITE
, FILEIO_BINARY
) != ERROR_OK
)
1472 duration_start_measure(&duration
);
1477 if ((retval
= nand_read_page(p
, address
/ p
->page_size
, page
, page_size
, oob
, oob_size
)) != ERROR_OK
)
1479 command_print(cmd_ctx
, "reading NAND flash page failed");
1482 fileio_close(&fileio
);
1488 fileio_write(&fileio
, page_size
, page
, &size_written
);
1489 bytes_done
+= page_size
;
1494 fileio_write(&fileio
, oob_size
, oob
, &size_written
);
1495 bytes_done
+= oob_size
;
1498 size
-= p
->page_size
;
1499 address
+= p
->page_size
;
1506 fileio_close(&fileio
);
1508 duration_stop_measure(&duration
, &duration_text
);
1509 command_print(cmd_ctx
, "dumped %"PRIi64
" byte in %s", fileio
.size
, duration_text
);
1510 free(duration_text
);
1511 duration_text
= NULL
;
1515 command_print(cmd_ctx
, "#%i: not probed");
1520 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1526 int handle_nand_raw_access_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1530 if ((argc
< 1) || (argc
> 2))
1532 return ERROR_COMMAND_SYNTAX_ERROR
;
1535 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1542 if (strcmp("enable", args
[1]) == 0)
1546 else if (strcmp("disable", args
[1]) == 0)
1552 return ERROR_COMMAND_SYNTAX_ERROR
;
1556 command_print(cmd_ctx
, "raw access is %s", (p
->use_raw
) ? "enabled" : "disabled");
1560 command_print(cmd_ctx
, "#%i: not probed");
1565 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
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