1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
6 * drivers/mtd/nand_ids.c *
8 * Copyright (C) 2002 Thomas Gleixner (tglx@linutronix.de) *
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
24 ***************************************************************************/
29 #include "replacements.h"
39 #include "time_support.h"
42 int nand_register_commands(struct command_context_s
*cmd_ctx
);
43 int handle_nand_list_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
44 int handle_nand_probe_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
45 int handle_nand_check_bad_blocks_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
46 int handle_nand_info_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
47 int handle_nand_copy_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
48 int handle_nand_write_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
49 int handle_nand_dump_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
50 int handle_nand_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
52 int handle_nand_raw_access_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
54 int nand_read_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
55 int nand_read_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
56 int nand_read_plain(struct nand_device_s
*device
, u32 address
, u8
*data
, u32 data_size
);
58 int nand_write_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
59 int nand_write_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
61 /* NAND flash controller
63 extern nand_flash_controller_t lpc3180_nand_controller
;
64 /* extern nand_flash_controller_t s3c2410_nand_controller; */
65 /* extern nand_flash_controller_t boundary_scan_nand_controller; */
67 nand_flash_controller_t
*nand_flash_controllers
[] =
69 &lpc3180_nand_controller
,
70 /* &s3c2410_nand_controller, */
71 /* &boundary_scan_nand_controller, */
75 /* configured NAND devices and NAND Flash command handler */
76 nand_device_t
*nand_devices
= NULL
;
77 static command_t
*nand_cmd
;
81 * Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
84 * Pagesize; 0, 256, 512
85 * 0 get this information from the extended chip ID
86 * 256 256 Byte page size
87 * 512 512 Byte page size
89 nand_info_t nand_flash_ids
[] =
91 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
92 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
93 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
94 {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
95 {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
96 {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
97 {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
98 {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
99 {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
100 {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
102 {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
103 {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
104 {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
105 {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
107 {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
108 {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
109 {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
110 {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
112 {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
113 {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
114 {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
115 {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
117 {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
118 {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
119 {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
120 {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
122 {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
123 {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
124 {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
125 {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
126 {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
127 {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
128 {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
130 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
132 {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS
},
133 {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS
},
134 {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16
},
135 {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16
},
137 {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS
},
138 {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS
},
139 {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16
},
140 {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16
},
142 {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS
},
143 {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS
},
144 {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16
},
145 {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16
},
147 {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS
},
148 {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS
},
149 {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16
},
150 {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16
},
152 {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS
},
153 {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS
},
154 {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16
},
155 {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16
},
157 {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS
},
158 {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS
},
159 {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16
},
160 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16
},
165 /* Manufacturer ID list
167 nand_manufacturer_t nand_manuf_ids
[] =
170 {NAND_MFR_TOSHIBA
, "Toshiba"},
171 {NAND_MFR_SAMSUNG
, "Samsung"},
172 {NAND_MFR_FUJITSU
, "Fujitsu"},
173 {NAND_MFR_NATIONAL
, "National"},
174 {NAND_MFR_RENESAS
, "Renesas"},
175 {NAND_MFR_STMICRO
, "ST Micro"},
176 {NAND_MFR_HYNIX
, "Hynix"},
180 /* nand device <nand_controller> [controller options]
182 int handle_nand_device_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
189 WARNING("incomplete flash device nand configuration");
190 return ERROR_FLASH_BANK_INVALID
;
193 for (i
= 0; nand_flash_controllers
[i
]; i
++)
195 nand_device_t
*p
, *c
;
197 if (strcmp(args
[0], nand_flash_controllers
[i
]->name
) == 0)
199 /* register flash specific commands */
200 if (nand_flash_controllers
[i
]->register_commands(cmd_ctx
) != ERROR_OK
)
202 ERROR("couldn't register '%s' commands", args
[0]);
206 c
= malloc(sizeof(nand_device_t
));
208 c
->controller
= nand_flash_controllers
[i
];
209 c
->controller_priv
= NULL
;
210 c
->manufacturer
= NULL
;
213 c
->address_cycles
= 0;
218 if ((retval
= nand_flash_controllers
[i
]->nand_device_command(cmd_ctx
, cmd
, args
, argc
, c
)) != ERROR_OK
)
220 ERROR("'%s' driver rejected nand flash", c
->controller
->name
);
225 /* put NAND device in linked list */
228 /* find last flash device */
229 for (p
= nand_devices
; p
&& p
->next
; p
= p
->next
);
242 /* no valid NAND controller was found (i.e. the configuration option,
243 * didn't match one of the compiled-in controllers)
245 ERROR("No valid NAND flash controller found (%s)", args
[0]);
246 ERROR("compiled-in NAND flash controllers:");
247 for (i
= 0; nand_flash_controllers
[i
]; i
++)
249 ERROR("%i: %s", i
, nand_flash_controllers
[i
]->name
);
255 int nand_register_commands(struct command_context_s
*cmd_ctx
)
257 nand_cmd
= register_command(cmd_ctx
, NULL
, "nand", NULL
, COMMAND_ANY
, NULL
);
259 register_command(cmd_ctx
, nand_cmd
, "device", handle_nand_device_command
, COMMAND_CONFIG
, NULL
);
264 int nand_init(struct command_context_s
*cmd_ctx
)
268 register_command(cmd_ctx
, nand_cmd
, "list", handle_nand_list_command
, COMMAND_EXEC
,
269 "list configured NAND flash devices");
270 register_command(cmd_ctx
, nand_cmd
, "info", handle_nand_info_command
, COMMAND_EXEC
,
271 "print info about NAND flash device <num>");
272 register_command(cmd_ctx
, nand_cmd
, "probe", handle_nand_probe_command
, COMMAND_EXEC
,
273 "identify NAND flash device <num>");
274 register_command(cmd_ctx
, nand_cmd
, "check_bad_blocks", handle_nand_check_bad_blocks_command
, COMMAND_EXEC
,
275 "check NAND flash device <num> for bad blocks [<first> <last>]");
276 register_command(cmd_ctx
, nand_cmd
, "erase", handle_nand_erase_command
, COMMAND_EXEC
,
277 "erase blocks on NAND flash device <num> <first> <last>");
278 register_command(cmd_ctx
, nand_cmd
, "copy", handle_nand_copy_command
, COMMAND_EXEC
,
279 "copy from NAND flash device <num> <offset> <length> <ram-address>");
280 register_command(cmd_ctx
, nand_cmd
, "dump", handle_nand_dump_command
, COMMAND_EXEC
,
281 "dump from NAND flash device <num> <filename> <offset> <size> [options]");
282 register_command(cmd_ctx
, nand_cmd
, "write", handle_nand_write_command
, COMMAND_EXEC
,
283 "write to NAND flash device <num> <filename> <offset> [options]");
284 register_command(cmd_ctx
, nand_cmd
, "raw_access", handle_nand_raw_access_command
, COMMAND_EXEC
,
285 "raw access to NAND flash device <num> ['enable'|'disable']");
291 nand_device_t
*get_nand_device_by_num(int num
)
296 for (p
= nand_devices
; p
; p
= p
->next
)
307 int nand_build_bbt(struct nand_device_s
*device
, int first
, int last
)
315 if ((first
< 0) || (first
>= device
->num_blocks
))
318 if ((last
>= device
->num_blocks
) || (last
== -1))
319 last
= device
->num_blocks
- 1;
321 for (i
= first
; i
< last
; i
++)
323 nand_read_page(device
, page
, NULL
, 0, oob
, 6);
325 if (((device
->device
->options
& NAND_BUSWIDTH_16
) && ((oob
[0] & oob
[1]) != 0xff))
326 || (((device
->page_size
== 512) && (oob
[5] != 0xff)) ||
327 ((device
->page_size
== 2048) && (oob
[0] != 0xff))))
329 WARNING("invalid block: %i", i
);
330 device
->blocks
[i
].is_bad
= 1;
334 device
->blocks
[i
].is_bad
= 0;
337 page
+= (device
->erase_size
/ device
->page_size
);
343 int nand_read_status(struct nand_device_s
*device
, u8
*status
)
346 return ERROR_NAND_DEVICE_NOT_PROBED
;
348 /* Send read status command */
349 device
->controller
->command(device
, NAND_CMD_STATUS
);
354 if (device
->device
->options
& NAND_BUSWIDTH_16
)
357 device
->controller
->read_data(device
, &data
);
358 *status
= data
& 0xff;
362 device
->controller
->read_data(device
, status
);
368 int nand_probe(struct nand_device_s
*device
)
370 u8 manufacturer_id
, device_id
;
371 nand_manufacturer_t
*manufacturer
;
375 /* clear device data */
376 device
->device
= NULL
;
377 device
->manufacturer
= NULL
;
379 /* clear device parameters */
380 device
->bus_width
= 0;
381 device
->address_cycles
= 0;
382 device
->page_size
= 0;
383 device
->erase_size
= 0;
385 /* initialize controller (device parameters are zero, use controller default) */
386 if ((retval
= device
->controller
->init(device
) != ERROR_OK
))
390 case ERROR_NAND_OPERATION_FAILED
:
391 DEBUG("controller initialization failed");
392 return ERROR_NAND_OPERATION_FAILED
;
393 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
394 ERROR("BUG: controller reported that it doesn't support default parameters");
395 return ERROR_NAND_OPERATION_FAILED
;
397 ERROR("BUG: unknown controller initialization failure");
398 return ERROR_NAND_OPERATION_FAILED
;
402 device
->controller
->command(device
, NAND_CMD_RESET
);
403 device
->controller
->reset(device
);
405 device
->controller
->command(device
, NAND_CMD_READID
);
406 device
->controller
->address(device
, 0x0);
408 if (device
->bus_width
== 8)
410 device
->controller
->read_data(device
, &manufacturer_id
);
411 device
->controller
->read_data(device
, &device_id
);
416 device
->controller
->read_data(device
, &data_buf
);
417 manufacturer_id
= data_buf
& 0xff;
418 device
->controller
->read_data(device
, &data_buf
);
419 device_id
= data_buf
& 0xff;
422 device
->manufacturer
= manufacturer
;
424 for (i
= 0; nand_flash_ids
[i
].name
; i
++)
426 if (nand_flash_ids
[i
].id
== device_id
)
428 device
->device
= &nand_flash_ids
[i
];
433 for (i
= 0; nand_manuf_ids
[i
].name
; i
++)
435 if (nand_manuf_ids
[i
].id
== manufacturer_id
)
437 device
->manufacturer
= &nand_manuf_ids
[i
];
442 if (!device
->manufacturer
)
444 device
->manufacturer
= &nand_manuf_ids
[0];
445 device
->manufacturer
->id
= manufacturer_id
;
450 ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
451 manufacturer_id
, device_id
);
452 return ERROR_NAND_OPERATION_FAILED
;
455 DEBUG("found %s (%s)", device
->device
->name
, device
->manufacturer
->name
);
457 /* initialize device parameters */
460 if (device
->device
->options
& NAND_BUSWIDTH_16
)
461 device
->bus_width
= 16;
463 device
->bus_width
= 8;
466 if (device
->device
->page_size
== 0)
468 /* TODO: support reading extended chip id to determine page size */
469 return ERROR_NAND_OPERATION_FAILED
;
471 else if (device
->device
->page_size
== 256)
473 ERROR("NAND flashes with 256 byte pagesize are not supported");
474 return ERROR_NAND_OPERATION_FAILED
;
478 device
->page_size
= device
->device
->page_size
;
481 /* number of address cycles */
482 if (device
->page_size
<= 512)
484 /* small page devices */
485 if (device
->device
->chip_size
<= 32)
486 device
->address_cycles
= 3;
487 else if (device
->device
->chip_size
<= 8*1024)
488 device
->address_cycles
= 4;
491 ERROR("BUG: small page NAND device with more than 8 GiB encountered");
492 device
->address_cycles
= 5;
497 /* large page devices */
498 if (device
->device
->chip_size
<= 128)
499 device
->address_cycles
= 4;
500 else if (device
->device
->chip_size
<= 32*1024)
501 device
->address_cycles
= 5;
504 ERROR("BUG: small page NAND device with more than 32 GiB encountered");
505 device
->address_cycles
= 6;
510 if (device
->device
->erase_size
== 0)
512 /* TODO: support reading extended chip id to determine erase size */
516 device
->erase_size
= device
->device
->erase_size
;
519 /* initialize controller, but leave parameters at the controllers default */
520 if ((retval
= device
->controller
->init(device
) != ERROR_OK
))
524 case ERROR_NAND_OPERATION_FAILED
:
525 DEBUG("controller initialization failed");
526 return ERROR_NAND_OPERATION_FAILED
;
527 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
528 ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
529 device
->bus_width
, device
->address_cycles
, device
->page_size
);
530 return ERROR_NAND_OPERATION_FAILED
;
532 ERROR("BUG: unknown controller initialization failure");
533 return ERROR_NAND_OPERATION_FAILED
;
537 device
->num_blocks
= (device
->device
->chip_size
* 1024) / (device
->erase_size
/ 1024);
538 device
->blocks
= malloc(sizeof(nand_block_t
) * device
->num_blocks
);
540 for (i
= 0; i
< device
->num_blocks
; i
++)
542 device
->blocks
[i
].size
= device
->erase_size
;
543 device
->blocks
[i
].offset
= i
* device
->erase_size
;
544 device
->blocks
[i
].is_erased
= -1;
545 device
->blocks
[i
].is_bad
= -1;
551 int nand_erase(struct nand_device_s
*device
, int first_block
, int last_block
)
559 return ERROR_NAND_DEVICE_NOT_PROBED
;
561 if ((first_block
< 0) || (last_block
> device
->num_blocks
))
562 return ERROR_INVALID_ARGUMENTS
;
564 /* make sure we know if a block is bad before erasing it */
565 for (i
= first_block
; i
<= last_block
; i
++)
567 if (device
->blocks
[i
].is_bad
== -1)
569 nand_build_bbt(device
, i
, last_block
);
574 for (i
= first_block
; i
<= last_block
; i
++)
576 /* Send erase setup command */
577 device
->controller
->command(device
, NAND_CMD_ERASE1
);
579 page
= i
* (device
->erase_size
/ device
->page_size
);
581 /* Send page address */
582 if (device
->page_size
<= 512)
585 device
->controller
->address(device
, page
& 0xff);
586 device
->controller
->address(device
, (page
>> 8) & 0xff);
588 /* 3rd cycle only on devices with more than 32 MiB */
589 if (device
->address_cycles
>= 4)
590 device
->controller
->address(device
, (page
>> 16) & 0xff);
592 /* 4th cycle only on devices with more than 8 GiB */
593 if (device
->address_cycles
>= 5)
594 device
->controller
->address(device
, (page
>> 24) & 0xff);
599 device
->controller
->address(device
, page
& 0xff);
600 device
->controller
->address(device
, (page
>> 8) & 0xff);
602 /* 3rd cycle only on devices with more than 128 MiB */
603 if (device
->address_cycles
>= 5)
604 device
->controller
->address(device
, (page
>> 16) & 0xff);
607 /* Send erase confirm command */
608 device
->controller
->command(device
, NAND_CMD_ERASE2
);
610 if (!device
->controller
->nand_ready(device
, 1000))
612 ERROR("timeout waiting for NAND flash block erase to complete");
613 return ERROR_NAND_OPERATION_TIMEOUT
;
616 if ((retval
= nand_read_status(device
, &status
)) != ERROR_OK
)
618 ERROR("couldn't read status");
619 return ERROR_NAND_OPERATION_FAILED
;
624 ERROR("erase operation didn't pass, status: 0x%2.2x", status
);
625 return ERROR_NAND_OPERATION_FAILED
;
632 int nand_read_plain(struct nand_device_s
*device
, u32 address
, u8
*data
, u32 data_size
)
637 return ERROR_NAND_DEVICE_NOT_PROBED
;
639 if (address
% device
->page_size
)
641 ERROR("reads need to be page aligned");
642 return ERROR_NAND_OPERATION_FAILED
;
645 page
= malloc(device
->page_size
);
647 while (data_size
> 0 )
649 u32 thisrun_size
= (data_size
> device
->page_size
) ? device
->page_size
: data_size
;
653 page_address
= address
/ device
->page_size
;
655 nand_read_page(device
, page_address
, page
, device
->page_size
, NULL
, 0);
657 memcpy(data
, page
, thisrun_size
);
659 address
+= thisrun_size
;
660 data
+= thisrun_size
;
661 data_size
-= thisrun_size
;
669 int nand_write_plain(struct nand_device_s
*device
, u32 address
, u8
*data
, u32 data_size
)
674 return ERROR_NAND_DEVICE_NOT_PROBED
;
676 if (address
% device
->page_size
)
678 ERROR("writes need to be page aligned");
679 return ERROR_NAND_OPERATION_FAILED
;
682 page
= malloc(device
->page_size
);
684 while (data_size
> 0 )
686 u32 thisrun_size
= (data_size
> device
->page_size
) ? device
->page_size
: data_size
;
689 memset(page
, 0xff, device
->page_size
);
690 memcpy(page
, data
, thisrun_size
);
692 page_address
= address
/ device
->page_size
;
694 nand_write_page(device
, page_address
, page
, device
->page_size
, NULL
, 0);
696 address
+= thisrun_size
;
697 data
+= thisrun_size
;
698 data_size
-= thisrun_size
;
706 int nand_write_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
709 return ERROR_NAND_DEVICE_NOT_PROBED
;
712 return nand_write_page_raw(device
, page
, data
, data_size
, oob
, oob_size
);
714 return device
->controller
->write_page(device
, page
, data
, data_size
, oob
, oob_size
);
717 int nand_read_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
720 return ERROR_NAND_DEVICE_NOT_PROBED
;
723 return nand_read_page_raw(device
, page
, data
, data_size
, oob
, oob_size
);
725 return device
->controller
->read_page(device
, page
, data
, data_size
, oob
, oob_size
);
728 int nand_read_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
733 return ERROR_NAND_DEVICE_NOT_PROBED
;
735 if (device
->page_size
<= 512)
737 /* small page device */
739 device
->controller
->command(device
, NAND_CMD_READ0
);
741 device
->controller
->command(device
, NAND_CMD_READOOB
);
743 /* column (always 0, we start at the beginning of a page/OOB area) */
744 device
->controller
->address(device
, 0x0);
747 device
->controller
->address(device
, page
& 0xff);
748 device
->controller
->address(device
, (page
>> 8) & 0xff);
750 /* 4th cycle only on devices with more than 32 MiB */
751 if (device
->address_cycles
>= 4)
752 device
->controller
->address(device
, (page
>> 16) & 0xff);
754 /* 5th cycle only on devices with more than 8 GiB */
755 if (device
->address_cycles
>= 5)
756 device
->controller
->address(device
, (page
>> 24) & 0xff);
760 /* large page device */
761 device
->controller
->command(device
, NAND_CMD_READ0
);
763 /* column (0 when we start at the beginning of a page,
764 * or 2048 for the beginning of OOB area)
766 device
->controller
->address(device
, 0x0);
767 device
->controller
->address(device
, 0x8);
770 device
->controller
->address(device
, page
& 0xff);
771 device
->controller
->address(device
, (page
>> 8) & 0xff);
773 /* 5th cycle only on devices with more than 128 MiB */
774 if (device
->address_cycles
>= 5)
775 device
->controller
->address(device
, (page
>> 16) & 0xff);
777 /* large page devices need a start command */
778 device
->controller
->command(device
, NAND_CMD_READSTART
);
781 if (!device
->controller
->nand_ready(device
, 100))
782 return ERROR_NAND_OPERATION_TIMEOUT
;
786 for (i
= 0; i
< data_size
;)
788 if (device
->device
->options
& NAND_BUSWIDTH_16
)
790 device
->controller
->read_data(device
, data
);
796 device
->controller
->read_data(device
, data
);
805 for (i
= 0; i
< oob_size
;)
807 if (device
->device
->options
& NAND_BUSWIDTH_16
)
809 device
->controller
->read_data(device
, oob
);
815 device
->controller
->read_data(device
, oob
);
825 int nand_write_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
832 return ERROR_NAND_DEVICE_NOT_PROBED
;
834 device
->controller
->command(device
, NAND_CMD_SEQIN
);
836 if (device
->page_size
<= 512)
838 /* column (always 0, we start at the beginning of a page/OOB area) */
839 device
->controller
->address(device
, 0x0);
842 device
->controller
->address(device
, page
& 0xff);
843 device
->controller
->address(device
, (page
>> 8) & 0xff);
845 /* 4th cycle only on devices with more than 32 MiB */
846 if (device
->address_cycles
>= 4)
847 device
->controller
->address(device
, (page
>> 16) & 0xff);
849 /* 5th cycle only on devices with more than 8 GiB */
850 if (device
->address_cycles
>= 5)
851 device
->controller
->address(device
, (page
>> 24) & 0xff);
855 /* column (0 when we start at the beginning of a page,
856 * or 2048 for the beginning of OOB area)
858 device
->controller
->address(device
, 0x0);
859 device
->controller
->address(device
, 0x8);
862 device
->controller
->address(device
, page
& 0xff);
863 device
->controller
->address(device
, (page
>> 8) & 0xff);
865 /* 5th cycle only on devices with more than 128 MiB */
866 if (device
->address_cycles
>= 5)
867 device
->controller
->address(device
, (page
>> 16) & 0xff);
872 for (i
= 0; i
< data_size
;)
874 if (device
->device
->options
& NAND_BUSWIDTH_16
)
876 u16 data_buf
= le_to_h_u16(data
);
877 device
->controller
->write_data(device
, data_buf
);
883 device
->controller
->write_data(device
, *data
);
892 for (i
= 0; i
< oob_size
;)
894 if (device
->device
->options
& NAND_BUSWIDTH_16
)
896 u16 oob_buf
= le_to_h_u16(data
);
897 device
->controller
->write_data(device
, oob_buf
);
903 device
->controller
->write_data(device
, *oob
);
910 device
->controller
->command(device
, NAND_CMD_PAGEPROG
);
912 if (!device
->controller
->nand_ready(device
, 100))
913 return ERROR_NAND_OPERATION_TIMEOUT
;
915 if ((retval
= nand_read_status(device
, &status
)) != ERROR_OK
)
917 ERROR("couldn't read status");
918 return ERROR_NAND_OPERATION_FAILED
;
921 if (status
& NAND_STATUS_FAIL
)
923 ERROR("write operation didn't pass, status: 0x%2.2x", status
);
924 return ERROR_NAND_OPERATION_FAILED
;
930 int handle_nand_list_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
937 command_print(cmd_ctx
, "no NAND flash devices configured");
941 for (p
= nand_devices
; p
; p
= p
->next
)
944 command_print(cmd_ctx
, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
945 i
++, p
->device
->name
, p
->manufacturer
->name
, p
->page_size
, p
->bus_width
, p
->erase_size
);
947 command_print(cmd_ctx
, "#%i: not probed");
953 int handle_nand_info_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
961 if ((argc
< 1) || (argc
> 3))
963 command_print(cmd_ctx
, "usage: nand info <num> [<first> <last>]");
969 first
= last
= strtoul(args
[1], NULL
, 0);
973 first
= strtoul(args
[1], NULL
, 0);
974 last
= strtoul(args
[2], NULL
, 0);
977 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
982 if (first
>= p
->num_blocks
)
983 first
= p
->num_blocks
- 1;
985 if (last
>= p
->num_blocks
)
986 last
= p
->num_blocks
- 1;
988 command_print(cmd_ctx
, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
989 i
++, p
->device
->name
, p
->manufacturer
->name
, p
->page_size
, p
->bus_width
, p
->erase_size
);
991 for (j
= first
; j
<= last
; j
++)
993 char *erase_state
, *bad_state
;
995 if (p
->blocks
[j
].is_erased
== 0)
996 erase_state
= "not erased";
997 else if (p
->blocks
[j
].is_erased
== 1)
998 erase_state
= "erased";
1000 erase_state
= "erase state unknown";
1002 if (p
->blocks
[j
].is_bad
== 0)
1004 else if (p
->blocks
[j
].is_bad
== 1)
1005 bad_state
= " (marked bad)";
1007 bad_state
= " (block condition unknown)";
1009 command_print(cmd_ctx
, "\t#%i: 0x%8.8x (0x%xkB) %s%s",
1010 j
, p
->blocks
[j
].offset
, p
->blocks
[j
].size
/ 1024,
1011 erase_state
, bad_state
);
1016 command_print(cmd_ctx
, "#%i: not probed");
1023 int handle_nand_probe_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1030 command_print(cmd_ctx
, "usage: nand probe <num>");
1034 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1037 if ((retval
= nand_probe(p
)) == ERROR_OK
)
1039 command_print(cmd_ctx
, "NAND flash device '%s' found", p
->device
->name
);
1041 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1043 command_print(cmd_ctx
, "probing failed for NAND flash device");
1047 command_print(cmd_ctx
, "unknown error when probing NAND flash device");
1052 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1058 int handle_nand_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1065 command_print(cmd_ctx
, "usage: nand erase <num> <first> <last>");
1069 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1072 int first
= strtoul(args
[1], NULL
, 0);
1073 int last
= strtoul(args
[2], NULL
, 0);
1075 if ((retval
= nand_erase(p
, first
, last
)) == ERROR_OK
)
1077 command_print(cmd_ctx
, "successfully erased blocks %i to %i on NAND flash device '%s'", first
, last
, p
->device
->name
);
1079 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1081 command_print(cmd_ctx
, "erase failed");
1085 command_print(cmd_ctx
, "unknown error when erasing NAND flash device");
1090 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1096 int handle_nand_check_bad_blocks_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1103 if ((argc
< 1) || (argc
> 3) || (argc
== 2))
1105 command_print(cmd_ctx
, "usage: nand check_bad_blocks <num> [<first> <last>]");
1111 first
= strtoul(args
[1], NULL
, 0);
1112 last
= strtoul(args
[2], NULL
, 0);
1115 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1118 if ((retval
= nand_build_bbt(p
, first
, last
)) == ERROR_OK
)
1120 command_print(cmd_ctx
, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks", p
->device
->name
);
1122 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1124 command_print(cmd_ctx
, "error when checking for bad blocks on NAND flash device");
1128 command_print(cmd_ctx
, "unknown error when checking for bad blocks on NAND flash device");
1133 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1139 int handle_nand_copy_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1146 command_print(cmd_ctx
, "usage: nand copy <num> <offset> <length> <ram-address>");
1150 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1157 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1163 int handle_nand_write_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1168 enum oob_formats oob_format
= NAND_OOB_NONE
;
1171 fileio_image_t image_info
;
1172 int sec_type_identified
= 0;
1173 enum fileio_sec_type sec_type
;
1175 duration_t duration
;
1176 char *duration_text
;
1182 command_print(cmd_ctx
, "usage: nand write <num> <file> <offset> [options]");
1186 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1194 duration_start_measure(&duration
);
1195 strtoul(args
[2], NULL
, 0);
1200 for (i
= 3; i
< argc
; i
++)
1202 if (!strcmp(args
[i
], "oob_raw"))
1203 oob_format
|= NAND_OOB_RAW
;
1204 else if (!strcmp(args
[i
], "oob_only"))
1205 oob_format
|= NAND_OOB_RAW
| NAND_OOB_ONLY
;
1208 if (fileio_identify_image_type(&sec_type
, args
[i
]) == ERROR_OK
)
1210 sec_type_identified
= 1;
1214 command_print(cmd_ctx
, "unknown option: %s", args
[i
]);
1220 /* if no image type option was encountered, set the default */
1221 if (!sec_type_identified
)
1224 fileio_identify_image_type(&sec_type
, NULL
);
1225 sec_type_identified
= 1;
1228 image_info
.base_address
= strtoul(args
[2], NULL
, 0);
1229 image_info
.has_start_address
= 0;
1231 if (fileio_open(&file
, args
[1], FILEIO_READ
,
1232 FILEIO_IMAGE
, &image_info
, sec_type
) != ERROR_OK
)
1234 command_print(cmd_ctx
, "flash write error: %s", file
.error_str
);
1238 /* the offset might have been overwritten by the image base address */
1239 offset
= image_info
.base_address
;
1241 buf_cnt
= binary_size
= file
.size
;
1243 if (!(oob_format
& NAND_OOB_ONLY
))
1245 page_size
= p
->page_size
;
1246 page
= malloc(p
->page_size
);
1249 if (oob_format
& NAND_OOB_RAW
)
1251 if (p
->page_size
== 512)
1253 else if (p
->page_size
== 2048)
1255 oob
= malloc(oob_size
);
1258 if (offset
% p
->page_size
)
1260 command_print(cmd_ctx
, "only page size aligned offsets and sizes are supported");
1270 fileio_read(&file
, page_size
, page
, &size_read
);
1271 buf_cnt
-= size_read
;
1272 if (size_read
< page_size
)
1274 memset(page
+ size_read
, 0xff, page_size
- size_read
);
1280 fileio_read(&file
, oob_size
, oob
, &size_read
);
1281 buf_cnt
-= size_read
;
1282 if (size_read
< oob_size
)
1284 memset(oob
+ size_read
, 0xff, oob_size
- size_read
);
1288 if (nand_write_page(p
, offset
/ p
->page_size
, page
, page_size
, oob
, oob_size
) != ERROR_OK
)
1290 command_print(cmd_ctx
, "failed writing file %s to NAND flash %s at offset 0x%8.8x",
1291 file
.url
, args
[0], offset
);
1294 offset
+= page_size
;
1297 duration_stop_measure(&duration
, &duration_text
);
1298 command_print(cmd_ctx
, "wrote file %s to NAND flash %s at offset 0x%8.8x in %s",
1299 file
.url
, args
[0], image_info
.base_address
, duration_text
);
1300 free(duration_text
);
1304 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1310 int handle_nand_dump_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1316 command_print(cmd_ctx
, "usage: nand dump <num> <filename> <address> <size> [options]");
1320 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1326 fileio_image_t image_info
;
1327 duration_t duration
;
1328 char *duration_text
;
1335 u32 address
= strtoul(args
[2], NULL
, 0);
1336 u32 size
= strtoul(args
[3], NULL
, 0);
1338 enum oob_formats oob_format
= NAND_OOB_NONE
;
1343 for (i
= 4; i
< argc
; i
++)
1345 if (!strcmp(args
[i
], "oob_raw"))
1346 oob_format
|= NAND_OOB_RAW
;
1347 else if (!strcmp(args
[i
], "oob_only"))
1348 oob_format
|= NAND_OOB_RAW
| NAND_OOB_ONLY
;
1350 command_print(cmd_ctx
, "unknown option: '%s'", args
[i
]);
1354 if ((address
% p
->page_size
) || (size
% p
->page_size
))
1356 command_print(cmd_ctx
, "only page size aligned addresses and sizes are supported");
1360 if (!(oob_format
& NAND_OOB_ONLY
))
1362 page_size
= p
->page_size
;
1363 page
= malloc(p
->page_size
);
1366 if (oob_format
& NAND_OOB_RAW
)
1368 if (p
->page_size
== 512)
1370 else if (p
->page_size
== 2048)
1372 oob
= malloc(oob_size
);
1375 image_info
.base_address
= address
;
1376 image_info
.has_start_address
= 0;
1378 if (fileio_open(&file
, args
[1], FILEIO_WRITE
,
1379 FILEIO_IMAGE
, &image_info
, FILEIO_PLAIN
) != ERROR_OK
)
1381 command_print(cmd_ctx
, "dump_image error: %s", file
.error_str
);
1385 duration_start_measure(&duration
);
1390 if ((retval
= nand_read_page(p
, address
/ p
->page_size
, page
, page_size
, oob
, oob_size
)) != ERROR_OK
)
1392 command_print(cmd_ctx
, "reading NAND flash page failed");
1398 fileio_write(&file
, page_size
, page
, &size_written
);
1399 bytes_done
+= page_size
;
1404 fileio_write(&file
, oob_size
, oob
, &size_written
);
1405 bytes_done
+= oob_size
;
1408 size
-= p
->page_size
;
1409 address
+= p
->page_size
;
1418 fileio_close(&file
);
1420 duration_stop_measure(&duration
, &duration_text
);
1421 command_print(cmd_ctx
, "dumped %lli byte in %s", file
.size
, duration_text
);
1422 free(duration_text
);
1426 command_print(cmd_ctx
, "#%i: not probed");
1431 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1437 int handle_nand_raw_access_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1441 if ((argc
< 1) || (argc
> 2))
1443 command_print(cmd_ctx
, "usage: nand raw_access <num> ['enable'|'disable']");
1447 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1454 if (strcmp("enable", args
[1]) == 0)
1458 else if (strcmp("disable", args
[1]) == 0)
1464 command_print(cmd_ctx
, "usage: nand raw_access ['enable'|disable']");
1468 command_print(cmd_ctx
, "raw access is %s", (p
->use_raw
) ? "enabled" : "disabled");
1472 command_print(cmd_ctx
, "#%i: not probed");
1477 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
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|+B . . . |
|Bo. = o S |
|Oo.+ + = |
|oB=.* = . o |
| =+=.+ + E |
|. .=o . o |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)